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Patent # Description
US-1,008,0195 Access and power management for centralized networks
A system and method for managing power in a subnet having a hub in communication with one or more nodes is disclosed. The hub and nodes communicate using one or...
US-1,008,0054 Automatic time extension of program recording
A system (and method) automatically extends a scheduled recording of a live event past its scheduled end time. The system include includes a content interface...
US-1,008,0007 Hybrid tiling strategy for semi-global matching stereo hardware acceleration
Apparatus and methods for disparity cost computation for a stereoscopic image. In an example, a method includes computing partial path matching costs for...
US-1,007,9970 Controlling image focus in real-time using gestures and depth sensor data
A method of controlling image focus in a digital imaging system is provided that includes receiving a depth-scene image pair generated by a depth-scene image...
US-1,007,9604 Staggered switching in a load driver
An apparatus comprises multiple impedances and multiple pairs of transistors. Each pair connects to an impedance. Each pair includes high and low side...
US-1,007,9578 Total harmonic distortion (THD) controlled clip detector and automatic gain limiter (AGL)
The disclosed embodiments include an audio amplifier system configured to provide a total harmonic distortion (THD) controlled clip detector and an automatic...
US-1,007,9540 System and method to improve standby efficiency of LLC converter
A system includes an LLC converter to convert an input DC voltage to an output DC voltage. A burst generator generates a switching signal having a burst time...
US-1,007,9538 Bootstrap circuit for DC/DC converter
A circuit includes a charge pump to generate an output reference voltage. A first bootstrap refresh circuit receives the reference voltage from the charge pump...
US-1,007,9294 Integrated JFET structure with implanted backgate
A semiconductor device contains a JFET with a channel layer having a first conductivity type in a substrate. The JFET has a back gate having a second, opposite,...
US-1,007,9286 Transistor with quantum point contact
Methods and apparatus for quantum point contacts. In an arrangement, a quantum point contact device includes at least one well region in a portion of a...
US-1,007,9227 Apparatus for rectified RC trigger of back-to-back MOS-SCR ESD protection
An apparatus includes: a first SCR device having a first source terminal coupled to a signal terminal, a first body terminal coupled to the first source...
US-1,007,9162 Method for making lead frames for integrated circuit packages
Disclosed examples include a method of making a semiconductor die package comprising arranging at least one preformed die attach pad and at least two preformed...
US-1,007,8551 Streaming engine with error detection, correction and restart
This invention is a streaming engine employed in a digital signal processor. A fixed data stream sequence including plural nested loops is specified by a...
US-1,007,8134 ADC design for differential and common mode signals
The disclosure provides a circuit. The circuit includes a first analog to digital converter (ADC) that generates a coarse output in response to a first input...
US-1,007,8131 Method and apparatus for FMCW radar processing
The disclosure provides a radar apparatus. The radar apparatus includes a transmitter that transmits a first chirp. The first chirp is scattered by one or more...
US-1,007,8115 Control I/O coupling scan test port to test access port
An integrated circuit has controller circuitry having coupled to a test clock and a test mode select inputs, and having state a register clock state output, a...
US-1,007,7186 Integrated circuit package with sensor and method of making
An integrated circuit ("IC") package comprising an IC die having a top surface and a bottom surface, an elongate member having opposite first and second end...
US-1,007,5969 Medium access control schedulers for wireless communication
Wireless communication between a base station and at least one user equipment comprises the following. Each user equipment periodically measures channel quality...
US-1,007,5250 Bias removal in PRBS based channel estimation
A system includes a pseudorandom binary sequence (PRBS) generator configured to generate a first PRBS and a second PRBS and an exclusive-OR logic configured to...
US-1,007,5156 Synchronous clock generation using an interpolator
In some embodiments, an apparatus comprises a device clock configured to generate a device clock signal a synchronization (SYSREF) clock generation circuit...
US-1,007,5080 Three-level converter using an auxiliary switched capacitor circuit
In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first...
US-1,007,5076 Voltage converter with current steering
A voltage converter circuit includes a high side transistor, a high side driver coupled to a control input of the high side transistor, a low side transistor...
US-1,007,4639 Isolator integrated circuits with package structure cavity and fabrication methods
Disclosed examples include integrated circuits with a leadframe structure, a first circuit structure including a light source configured to generate a light...
US-1,007,3696 Streaming engine with cache-like stream data storage and lifetime tracking
A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces...
US-1,007,3478 Voltage regulator for a low dropout operational mode
A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal...
US-1,007,3167 High speed illumination driver for TOF applications
The disclosure provides a circuit. The circuit includes an amplifier and a digital to analog converter (DAC). The amplifier receives a reference voltage at an...
US-1,007,1400 Ultrasonic lens cleaning with travelling wave excitation
Disclosed examples include ultrasonic lens cleaning systems and driver circuits to clean a lens using four or more transducer segments mechanically coupled to...
US-1,007,0491 LED bypass and control circuit for fault tolerant LED systems
A light system (FIG. 2) is disclosed. The light system includes a plurality of series connected light emitting diodes (240-246). Each of a plurality of...
US-1,007,0385 Multi-band concurrent multi-channel receiver
A system of multiple concurrent receivers is described to process multiple narrow bandwidth wireless signals with arbitrary bandwidth and center frequency...
US-1,007,0152 Sample adaptive offset (SAO) parameter signaling
A method for sample adaptive offset (SAO) filtering and SAO parameter signaling in a video encoder is provided that includes determining SAO parameters for...
US-1,007,0106 Optical system designs for generation of light fields using spatial light modulators
In described examples, a method of creating multiple light images uses spatially-separated light sources, arranged in an array, operated in multiplexed fashion,...
US-1,006,9501 Set point adjuster for oscillator driver
A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive...
US-1,006,9420 Systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power...
Example embodiments of the systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power supply based on measured...
US-1,006,9419 Fast mode transitions in a power converter
Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating...
US-1,006,9416 Buck-boost converter controller
A controller for a DC-DC converter includes a state machine and a plurality of drivers for controlling switches in the DC-DC converter, where each state in the...
US-1,006,9065 Low noise graphene hall sensors, systems and methods of making and using same
Graphene Hall sensors, magnetic sensor systems and methods for sensing a magnetic field using an adjustable gate voltage to adapt the Hall sensor magnetic field...
US-1,006,9023 Optical sensor with integrated pinhole
An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the...
US-1,006,8983 High-K metal gate
An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer...
US-1,006,8977 Power MOSFET with a deep source contact
A power MOSFET IC device including an array of MOSFET cells formed in a semiconductor substrate. The array of MOSFET cells comprises an interior region of...
US-1,006,8903 Methods and apparatus for artificial exciton in CMOS processes
Methods and apparatus for artificial exciton devices. An artificial exciton device includes a semiconductor substrate; at least one well region doped to a first...
US-1,006,8816 Scan cell coupled to via ends, buffer coupled to via
The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of...
US-1,006,8802 Threshold mismatch and IDDQ reduction using split carbon co-implantation
An integrated circuit containing MOS transistors may be formed using a split carbon co-implantation. The split carbon co-implant includes an angled carbon...
US-1,006,8786 Data structures for semiconductor die packaging
At least some embodiments are directed to a system that comprises storage comprising a data structure that cross-references an identifier of a semiconductor...
US-1,006,8771 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in...
US-1,006,8769 Methods and apparatus for preventing counter-doping during high temperature processing
In a described example method, semiconductor wafer with a backside silicon nitride layer is encapsulated with a diffusion barrier layer prior to a high...
US-1,006,8638 Apparatus with low power SRAM retention mode
A memory array and an integrated circuit are disclosed. The memory array includes first and second banks of memory elements and five switches. Each memory...
US-1,006,8631 Dual mode memory array security apparatus, systems and methods
Read-only ("RO") data consisting of a physically unclonable function ("PUF") pattern is written to a ferroelectric random-access memory ("FRAM") memory array....
US-1,006,8512 Modulator for a MUX LCD
A modulator can include a common signal modulator that outputs a predetermined number of common signals to a multiplexer interface liquid crystal display (MUX...
US-1,006,7221 Interference detection in a frequency modulated continuous wave (FMCW) radar system
A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF)...
US-1,006,7201 Wiring layout to reduce magnetic field
A magnetic sensor has a circuit segment with a quadrupole region. The quadrupole region includes a supply line, a first return line and a second return line,...
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