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Patent # Description
US-9,872,246 Power conservation in channel hopping wireless network by independent definition of sleep intervals at each node
Power conservation is provided in a network of globally unsynchronized wireless communication devices that use asynchronous channel hopping. Each wireless...
US-9,872,130 PHY layer options for body area network (BAN) devices
In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN)...
US-9,872,044 Optimized edge order for de-blocking filter
A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to...
US-9,871,965 Image processing for wide dynamic range (WDR) sensor data
A signal processing chain implements wide dynamic range (WDR) multi-frame processing including receiving raw image signals from a WDR sensor including a...
US-9,871,630 Hybrid communication networks
Systems and methods for designing, using, and/or implementing hybrid communication networks are described. In various embodiments, these systems and methods may...
US-9,871,514 Methods and apparatus for continuous current limiting for FETS in high inductive load systems
An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the...
US-9,871,495 Thermal compensation for amplifiers
Systems and methods for providing thermal compensation for amplifiers are described. In some embodiments, an electronic circuit may include a main amplifier and...
US-9,871,494 Operational amplifier with class AB output
An operational amplifier includes an output stage, an input stage, a first auxiliary amplifier, and a second auxiliary amplifier. The output stage includes a...
US-9,871,456 Voltage conversion device and method of operation
A voltage conversion device includes a transformer and at least one transistor. The transformer has a primary side and a secondary side, the secondary side...
US-9,871,444 Integrated circuit with configurable control and power switches
Disclosed examples include integrated circuits configurable according to sensed circuit conditions to provide configurable power converter topologies with...
US-9,870,984 Power field-effect transistor (FET), pre-driver, controller, and sense resistor integration for multi-phase...
Techniques are described for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for...
US-9,870,858 Fluxgate device with low fluxgate noise
An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal...
US-9,869,442 Hybrid illumination system having a blue laser diode, dichroic mirror and yellow transmissive phosphor...
An illumination apparatus is provided that includes a yellow phosphor converter to receive a blue laser light beam and to convert a portion of the blue laser...
US-9,867,130 System and method for ultra low power mode transmission
A time slot assignment arrangement for ultralow power devices in a wireless communication network is disclosed. The time slot assigned to ultralow power device...
US-9,866,859 Inter-prediction candidate index coding independent of inter-prediction candidate list construction in video coding
Methods are provided for inter-prediction candidate index coding independent of the construction of the corresponding inter-prediction candidate list, i.e., a...
US-9,866,283 Inductive structures with improved common mode transient immunity
A first inductive structure includes a data coil to transfer data by inductive coupling with a second inductive structure. First and second portions of the data...
US-9,866,237 Low power switched capacitor integrator, analog-to-digital converter and switched capacitor amplifier
Disclosed examples include switched capacitor integrator circuits including an amplifier, a feedback capacitor, a sampling capacitor, a loading capacitor and a...
US-9,866,235 Digital to analog converter
Digital to analog converters have first and second to analog arrays. The first digital to analog array has a reference input, a reference output, a first...
US-9,866,121 Tracking energy consumption using a boost-buck technique
The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least...
US-9,866,118 Dead-time compensation in a power supply system
One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also...
US-9,866,113 Multilevel buck converter with a flying capacitor and charge pump
Methods and apparatus for flying capacitor balancing in multilevel converters are disclosed. Example flying capacitor balancing circuitry can include voltage...
US-9,866,112 Ultra-low power bandgap reference using a clocked amplifier
Methods and apparatus providing an ultra-low power bandgap reference using a clocked amplifier are disclosed. An example apparatus includes a clocked comparator...
US-9,866,099 Adaptive high-side gate drive for ringing mitigation in switching power converters
A power converter includes a high side device, a low side device connected to the high side device at a switch node, an inductor connected to the high side...
US-9,865,729 Laterally diffused metal oxide semiconductor with segmented gate oxide
A power transistor is provided with at least one transistor finger that lies within a semiconductor material. The gate oxide is segmented into a set of segments...
US-9,865,722 Avalanche energy handling capable III-nitride transistors
A semiconductor device includes a GaN FET with an overvoltage clamping component electrically coupled to a drain node of the GaN FET and coupled in series to a...
US-9,865,718 Power MOSFET with metal filled deep sinker contact for CSP
A method of forming an IC including a power semiconductor device includes providing a substrate having an epi layer thereon with at least one transistor formed...
US-9,865,691 Poly sandwich for deep trench fill
A semiconductor device is formed by forming a deep trench in a substrate and a dielectric liner on sidewalls of the deep trench. A first undoped polysilicon...
US-9,865,599 Transistor with deep Nwell implanted through the gate
A method of fabricating a CMOS integrated circuit (IC) includes implanting a first n-type dopant at a first masking level that exposes a p-region of a substrate...
US-9,865,584 Contact array optimization for ESD devices
A contact array optimization scheme for ESD devices. In one embodiment, contact apertures patterned through a pre-metal dielectric layer over active areas may...
US-9,865,582 Integrated thinfilm resistor and MIM capacitor with a low serial resistance
An electronic device comprising a semiconductor structure having a back end capacitor and a back end thin film resistor and a method of manufacturing the same....
US-9,865,555 Self-aligned under bump metal
An integrated circuit including a self-aligned under bump metal pad formed on a top metal interconnect level in a connection opening in a dielectric layer, with...
US-9,865,537 Methods and apparatus for integrated circuit failsafe fuse package with arc arrest
In described examples, an apparatus includes: an integrated circuit die having multiple terminals; the integrated circuit die positioned on a die pad portion of...
US-9,865,527 Packaged semiconductor device having nanoparticle adhesion layer patterned into zones of electrical conductance...
A device comprises a substrate and an adhesive nanoparticle layer patterned into zones of electrical conductance and insulation on top of the substrate surface....
US-9,865,507 Low-cost CMOS structure with dual gate dielectrics and method of forming the CMOS structure
Impurity atoms of a first type are implanted through a gate and a thin gate dielectric into a channel region that has substantially only the first type of...
US-9,865,498 Isolated semiconductor layer over buried isolation layer
An integrated circuit may be formed by forming an isolation recess in a single-crystal silicon-based substrate. Sidewall insulators are formed on sidewalls of...
US-9,864,420 Energy tracking circuit
A circuit, system, and method for tracking energy use in a electronic circuit. A circuit includes a DC-DC converter and a comparator. The DC-DC converter is...
US-9,864,398 Embedded clock in a communication system
A method for transmitting a plurality of data bits and a clock signal on a return to zero (RZ) signal includes: transmitting a first voltage that is greater...
US-9,864,188 Operation/margin enhancement feature for surface-MEMS structure; sculpting raised address electrode
A method of forming a micro-electromechanical systems (MEMS) pixel, such as a DMD type pixel, by forming a substrate having a non-planar upper surface, and...
US-9,860,876 Best-effort scheduled access
Embodiments of the invention provide a best-effort scheduled access method and system that enable nodes to request, and a hub to assign, tentative, but not...
US-9,860,495 Projector with rotating refractive actuator
An image projector includes a digital micro device (DMD) spatial light modulator and a rotatable actuator. The rotatable actuator is disposed in a path of light...
US-9,854,516 Slot skipping techniques for reduced power consumption in time slotted channel hopping MAC protocol
A device may be coupled to a time slot based communication system and receive a timing beacon packet that is broadcast in a time slot of the communication...
US-9,854,252 Method and apparatus of HEVC de-blocking filter
A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of...
US-9,853,956 JSON encryption and hashing with indication added to key-value
Methods and apparatus to provide extended object notation data are disclosed. An example apparatus includes a data handler having a first input to receive...
US-9,853,844 Circuits and methods for frequency offset estimation in FSK communications
Disclosed embodiments include a receiver having an input that receives a frequency shift key (FSK) signal having a preamble comprising preamble symbols, a phase...
US-9,853,703 Codebook sub-sampling for CSI feedback on PUCCH for 4Tx MIMO
Channel state information (CSI) feedback in a wireless communication system is disclosed. User equipment transmits a CSI feedback signal via a Physical Uplink...
US-9,853,657 Delta sigma modulator with dynamic error cancellation
The disclosure provides a delta sigma modulator that includes a first input port and a second input port. These ports receive a differential input signal. A DAC...
US-9,853,651 Systems and methods of low power clocking for sleep mode radios
Systems and methods of low power docking of sleep mode radios are disclosed herein. In an example embodiment, a crystal oscillator is purposefully mistuned to...
US-9,853,649 Phase domain calculator clock, ALU, memory, register file, sequencer, latches
A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit...
US-9,853,638 Touch on glass
A touch-sensitive glass barrier has a conductive coil affixed to the first side of a glass barrier, a capacitor connected to the conductive coil to form a...
US-9,853,547 Methods and apparatus for adaptive timing for zero voltage transition power converters
An example apparatus includes a first switch having a control terminal, coupled to a voltage source and coupled to a switch node; a second switch having a...
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