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Patent # Description
US-1,018,2454 Signaling of random access preamble parameters in wireless networks
User equipment (UE)-initiated accesses within a cellular network are optimized to account for cell size and to reduce signaling overhead. A fixed set of...
US-1,018,2116 Contactless communication for battery information
One example includes a system is comprised of an elongated transmission line and as module. The elongated transmission line includes an arrangement of...
US-1,018,1861 Reference voltage control circuit for a two-step flash analog-to-digital converter
A circuit, which is usable in a flash analog-to-digital converter, includes a first switch configured to provide a first reference voltage to a first reference...
US-1,018,1857 Analog-to-digital converter error correction
An analog-to-digital converter includes an integrator, a single comparator, a successive approximation result register, and correction circuitry. The comparator...
US-1,018,1847 Ring amplitude measurement and mitigation
An apparatus includes a voltage divider circuit including a plurality of series-connected capacitors and including an input terminal of one of the capacitors...
US-1,018,1834 Baluns for RF signal conversion and impedance matching
In described examples of a magnetically coupled structure on a substrate with an integrated circuit device, the structure includes a first coil in a...
US-1,018,1754 Circuit and architecture for a demodulator for a wireless power transfer system and method therefor
A primary side wireless power transmitter inductively couplable to a secondary side wireless power receiver for supplying power to the wireless power receiver...
US-1,018,1721 Area-efficient active-FET ESD protection circuit
An electrostatic discharge (ESD) protection circuit includes a high power supply rail (VDD) and a low power supply rail (VSS). The ESD protection circuit...
US-1,018,1521 Graphene heterolayers for electronic applications
A microelectronic device includes an electrical conductor which includes a graphene heterolayer. The graphene heterolayer includes a plurality of alternating...
US-1,018,1516 Graphene FET with graphitic interface layer at contacts
A method for forming a graphene FET includes providing a graphene layer having a surface. A first metal layer having a work function <4.3 eV is deposited on...
US-1,018,1474 SRAM layout for double patterning
An integrated circuit with a SAR SRAM cell with power routed in metal-1. An integrated circuit with a SAR SRAM cell that has power routed in Metal-1 and has...
US-1,018,1435 Lead frame assembly
A leadframe assembly includes a leadframe having a die attach pad and a first plurality of leads. A first generally sine wave-shaped wire having a first end and...
US-1,018,0695 Dropout recovery with overshoot and inrush current reduction
In a power management device, a hiccup mode is implemented by using, for example, a counter to count the number of cycles for which a current limiting event has...
US-1,018,0454 Systems and methods of testing multiple dies
A method of testing a semiconductor wafer comprising a scribe line and a plurality of dies. The method includes implementing a first landing pad on the scribe...
US-1,018,0351 Dark current compensation for photon counting circuit
A circuit includes a charge sensitive amplifier (CSA) that includes an input to receive current from a photon sensor and generates an output signal that...
US-1,018,0224 Quasi-sparse optical illumination
In described examples, a DMD includes micromirrors. A first light source generates a first beam profile illuminating a first set of micromirrors of the DMD. A...
US-1,017,9730 Electronic sensors with sensor die in package structure cavity
Disclosed examples include sensor apparatus and integrated circuits having a package structure with an internal cavity and an opening that connects of the...
US-1,017,8385 Method and system for video picture intra-prediction estimation
Several systems and methods for intra-prediction estimation of video pictures are disclosed. In an embodiment, the method includes accessing four `N.times.N`...
US-1,017,7885 Small and seamless carrier detector
In a carrier detector, the simple latch is replaced with a pulse timer and reference control module which outputs logic high (H) when more than two consecutive...
US-1,017,7858 Minimum tone separation constrained MFSK scheme for ultrasonic communications
A method of encoding a plurality of data signals is disclosed. The method includes selecting a set of M ultrasonic frequencies, wherein each of the M ultrasonic...
US-1,017,7814 Method to use a preamble with band extension in power line communications
Embodiments include methods of powerline communications using a preamble with band extension is provided. A method may include receiving a packet data unit PDU....
US-1,017,7775 Current source noise cancellation
At least some embodiments are directed to a system that comprises a differential switch network comprising first and second output nodes, first and second...
US-1,017,7747 High resolution capture
A high resolution capture circuit and integrated circuit chip are disclosed and include first and second capture delay lines and an oscillator delay line. The...
US-1,017,7685 Switching converter with improved power density
Disclosed examples include switching power converters, control methods and ripple filter circuits in which first and second switches are connected in series...
US-1,017,7673 LLC resonant frequency auto detection
Generally speaking, a timing circuit helps determine diode conduction time of an LLC converter. In some examples, the circuit includes an LLC converter having a...
US-1,017,7658 Methods and apparatus for adaptive timing for zero voltage transition power converters
Described examples include a method of controlling a power converter including executing a plurality of cycles. Each cycle includes turning on a first switch...
US-1,017,7644 Input current extraction from inductor current in a voltage converter
A voltage converter includes a high side power transistor coupled to an input voltage node and a low side power transistor coupled to the high side power...
US-1,017,7215 Analog capacitor on submicron pitch metal level
A microelectronic device includes a capacitor having a lower plate of interconnect metal, a capacitor dielectric layer with a lower silicon dioxide layer, a...
US-1,017,7214 Metal thin film resistor and process
An integrated circuit with a metal thin film resistor with an overlying etch stop layer. A process for forming a metal thin film resistor in an integrated...
US-1,017,7140 Bipolar transistor including lateral suppression diode
A transistor includes an emitter of a first conductivity type, base of a second conductivity type, collector of the first conductivity type, and cathode of a...
US-1,017,7136 Electrostatic discharge protection device for high voltage
A circuit for protecting against electrostatic discharge events has a semiconductor substrate (200) of first conductivity embedding a first diode in a well...
US-1,017,5981 Method to control the number of active vector lanes for power efficiency
The vector data path is divided into smaller vector lanes. The number of active vector lanes is controllable on the fly by the programmer to match the...
US-1,017,5077 Single transceiver ultrasonic flow meter having an array of transducer elements
Elements of a single beam-forming array of ultrasonic transducer elements are selectively activated to direct two or more ultrasonic beams to a series of...
US-1,017,3243 Transducer driver attenuating input current frequency at maximum mechanical output
A transducer has an input and produces a mechanical output, wherein the magnitude of the mechanical output of the transducer is dependent on the frequency and...
US-1,017,1789 Multi-sensor video frame synchronization apparatus and methods
Apparatus and methods disclosed herein operate to monitor times of receipt of start-of-frame indications associated with frames received from multiple image...
US-1,017,1578 Tapered coax launch structure for a near field communication system
A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver. Each module...
US-1,017,0384 Methods and apparatus providing a graded package for a semiconductor
Methods and apparatus providing a graded package for a semiconductor are disclosed. An example apparatus includes a die; and a graded package encapsulating the...
US-1,016,8992 Interruptible trigonometric operations
Processor architectures and associated methods provide interruptible, instruction-based trigonometric function computation based on CORDIC iterations, receiving...
US-1,016,5276 Method and apparatus for frame coding in vertical raster scan order for HEVC
A method and apparatus for frame coding in adaptive raster scan order. The method includes encoding at least one of image or video utilizing input frames and at...
US-1,016,5270 Intra/inter mode decision for predictive frame encoding
This invention predicts that intra mode prediction is more effective for the macroblocks where motion estimation in inter mode prediction fails. This failure is...
US-1,016,4535 Cycle-by-cycle peak current limiting in current mode buck/boost converters
An SMPS current mode control loop with an adjusted cycle-by-cycle peak current limit for buck and boost (and bidirectional buck/boost) regulators. An SMPS...
US-1,016,4318 Waveguide coupler
An apparatus is provided. In the apparatus, there is an antenna package and an integrated circuit (IC). A circuit trace assembly is secured to the IC. A coupler...
US-1,016,3911 SRAM cell with T-shaped contact
An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate...
US-1,016,3888 Self-biased bidirectional ESD protection circuit
Disclosed examples provide an ESD protection circuit including a protection structure to selectively conduct current between a first terminal at a protected...
US-1,016,3725 High mobility transistors
An integrated circuit containing an n-channel finFET and a p-channel finFET is formed by forming a first polarity fin epitaxial layer for a first polarity...
US-1,016,3680 Sinker to buried layer connection region for narrow deep trenches
A method of forming an IC includes forming a buried layer (BL) doped a second type in a substrate doped a first type. Deep trenches are etched including...
US-1,016,3678 Sinker with a reduced width
Forming a semiconductor structure by forming a plurality of trenches in a semiconductor material, forming a plurality of non-conductive structures in the...
US-1,016,2641 Highly integrated scalable, flexible DSP megamodule architecture
This invention addresses implements a range of interesting technologies into a single block. Each DSP CPU has a streaming engine. The streaming engines include:...
US-1,016,2004 Tap domain selection circuit with AUX buffers and multiplexer
This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial...
US-1,016,2003 DDR TMS/TDI, addressable tap, state machine, and tap state monitor
A process and apparatus provide a JTAG TAP controller (302) to access a JTAG TAP domain (106) of a device using a reduced pin count, high speed DDR interface...
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