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Patent # Description
US-1,012,9927 BLE scatternet system and method
A BLE network includes a first piconet (A) including a first master scanner (3-1) and a first group of low-power slave/advertisers (5-1,2 . . . 5) for...
US-1,012,9907 Implant access in the medical implant communications service band
A system and method for providing communications between a hub (medical controller) and a node (an implant) are disclosed. The hub selects an operating channel...
US-1,012,9725 Wireless sensor network and association request transmission method
A method of transmitting association requests in a wireless sensor network includes transmitting an association request from a leaf node to an intermediate...
US-1,012,9546 Context adaptive binary arithmetic coding (CABAC) with scalable throughput and coding efficiency
A method for encoding a video sequence is provided that includes entropy encoding syntax elements representative of transform coefficients generated as the...
US-1,012,9540 Reduced complexity coefficient transmission for adaptive loop filtering (ALF) in video coding
A method for adaptive loop filtering is provided that includes determining a coefficient value for each coefficient position of an adaptive loop filter,...
US-1,012,9059 Low latency multi-amplitude modulation receiver
A multi-amplitude modulation receiver includes a signal coupler block coupled to a mixer array block receiving a first input signal from the signal coupler...
US-1,012,9009 Electronic device, method and system for half duplex data transmission
An electronic device and method for half duplex data transmission in a long range keyless entry and go system, and more specifically to an RFID transponder, a...
US-1,012,8833 Millivolt power harvesting FET controller
Circuits and methods for controlling a transistor that has first, second and third terminals, wherein a voltage level at said first terminal controls in part a...
US-1,012,8804 Temperature-compensated equalizer
An equalizer, in at least some embodiments, comprises an amplifier configured to produce an amplified voltage signal that is a function of an ambient...
US-1,012,8771 Powering electricity meter circuit front end with coreless PCB transformer
An apparatus. The apparatus includes a source of radio-frequency energy and a first transformer coil coupled to the source of RF energy. A second transformer...
US-1,012,8749 Method and circuitry for sensing and controlling a current
An inductor conducts a first current, which is variable. A first transistor is coupled through the inductor to an output node. The first transistor alternately...
US-1,012,8744 Single and multi-phase DC-DC converter mode control
Disclosed examples include methods and control circuits to operate a single or multi-phase DC-DC converter, including an output that turns a first switch on for...
US-1,012,8555 Metallic waveguide with a dielectric core that is disposed on a non-planar or irregular surface of a substrate
A digital system has a substrate having a top surface on which a waveguide is formed on the top surface of the substrate. The waveguide is formed by a conformal...
US-1,012,8219 Multi-chip module including stacked power devices with metal clip
A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the...
US-1,012,8145 Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using CMOS wells
Integrated circuits and manufacturing methods are presented for creating diffusion resistors (101, 103) in which the diffusion resistor well is spaced from...
US-1,012,6792 Power converter load current control
A power conversion system includes a maximum load current controller that is operable to limit a load current. For example, in a power conversion system...
US-1,012,6364 Tap and auxiliary circuitry with auxiliary output multiplexer and buffers
The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG...
US-1,012,6329 Force biased spring probe pin assembly
A force biased spring probe pin assembly includes a barrel member having a barrel wall defining an elongate internal cavity with a lower end and an upper end....
US-1,012,4966 Transfer track stopper for packaged integrated circuits
A packaged integrated circuit transfer track with a stopper arm that is constrained to vertical motion. A packaged integrated circuit transfer track with a cam...
US-1,012,3746 Accuracy of heart rate estimation from photoplethysmographic (PPG) signals
The disclosure provides a heart rate monitor (HRM) circuit. The HRM circuit includes an analog front end (AFE). The AFE receives a Photoplethysmographic (PPG)...
US-1,012,3114 Brownout response
Brownout management for an audio amplification system. An audio amplification system includes audio volume control circuitry, audio sample interpolation...
US-1,012,3053 Acceleration of bypass binary symbol processing in video coding
A method for encoding a video sequence in a video encoder to generate a compressed video bit stream is provided that includes binarizing a plurality of syntax...
US-1,012,3017 Methods and systems for encoding pictures associated with video data
Several methods and systems for encoding pictures associated with video data are disclosed. In an embodiment, a method includes determining by a processing...
US-1,012,2524 Timing correction in a communication system
One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver...
US-1,012,2371 Reconfigurable calculation unit with atomic computation units and control inputs
A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit...
US-1,012,2367 Isolated phase shifted DC to DC converter with frequency synthesizer to reconstruct primary clock
Disclosed examples include isolated phase shifted dual active bridge DC to DC converters with a first bridge circuit operative according to a primary side clock...
US-1,012,2280 Loop control coefficients in a buck converter
A buck converter includes a high side transistor, a low side transistor, and a controller. The high side transistor is configured to, when ON, connect an...
US-1,012,1891 P-N bimodal transistors
RESURF-based dual-gate p-n bimodal conduction laterally diffused metal oxide semiconductors (LDMOS). In an illustrative embodiment, a p-type source is...
US-1,012,1847 Galvanic isolation device
A galvanic isolation device includes a first integrated circuit (IC) die that has communication circuitry formed in a circuit layer below the top surface. A...
US-1,012,1733 Wire support for a leadframe
A leadframe includes a plurality of interconnected support members. A pair of die pads is connected to the support members and configured to receive a pair of...
US-1,012,1716 Silicon package for embedded semiconductor chip and power converter
A packaged transistor device (100) comprises a semiconductor chip (101) including a transistor with terminals distributed on the first and the opposite second...
US-1,012,1231 Adaptive bilateral (BL) filtering for computer vision
A method for filtering noise for imaging includes receiving an image frame having position and range data. A filter size divides the frame into filter windows...
US-1,012,0408 Event controlled clock switching
A system and method for controlling clock generation. A system includes a processor configured to execute instructions retrieved from memory, and a clock...
US-1,012,0027 Cores with separate serial scan paths and scan path parts
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure describes a method of adapting conventional scan...
US-1,012,0025 Functional core circuitry with serial scan test expected, mask circuitry
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
US-1,012,0023 3D tap and scan port architectures
This disclosure describes die test architectures that can be implemented in a first, middle and last die of a die stack. The die test architectures are mainly...
US-1,012,0022 Tap flip flop, gate, and compare circuitry on rising SCK
The disclosure describes a novel method and apparatus for providing expected data, mask data, and control signals to scan test architectures within a device...
US-1,011,7267 Scheduler for power-efficient time slotted protocol
A network includes a parent node and at least one child node that is configured to communicate with the parent node via a wireless network protocol. The parent...
US-1,011,6931 Hierarchical inter-layer prediction in multi-loop scalable video coding
A method for encoding a video sequence in a scalable video encoder to generate a scalable bitstream is provided that includes encoding the video sequence in a...
US-1,011,6883 System and methods for depth imaging using conventional CCD image sensors
Systems and methods for providing depth imaging using a CCD image sensor. In a method for visual imaging and depth imaging, steps include providing a CCD image...
US-1,011,6575 Flow control for powerline communications
A method of powerline communications in a powerline communications (PLC) network including a first PLC device and at least a second PLC device. The first PLC...
US-1,011,6407 System and method for improving narrowband interference performance
An orthogonal frequency division multiplexing (OFDM) receiver includes detection logic, offset generation logic, tone erasure logic, and correction generation...
US-1,011,6340 Wideband low distortion power amplifier
A circuit and apparatus for filtering harmful harmonics is disclosed. The circuit and apparatus include a power amplifier core that uses equally sized inverter...
US-1,011,6321 Inbuilt threshold comparator
A comparator includes a first input stage coupled to a first signal input and a first reference input, wherein the first input stage is coupled between a first...
US-1,011,6319 Resistive interpolation for an amplifier array
A circuit including an amplifier array including an amplifier stage with M amplifiers (M.gtoreq.2), connected to a resistor interpolator (interpolation order...
US-1,011,6294 High-resolution FET VDS zero-volt-crossing timing detection scheme in a wireless power transfer system
Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a...
US-1,011,6291 Reverse current protection circuit
In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an...
US-1,011,6270 Tunable power amplifier with wide frequency range
A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to...
US-1,011,6222 Soft switching flyback converter with primary control
Disclosed examples include synchronous rectifiers and flyback converters, integrated circuits and operating methods, in which a first switch is turned on to...
US-1,011,5660 Leadframe strip with vertically offset die attach pads between adjacent vertical leadframe columns
A leadframe strip for use in making leaded integrated circuit packages includes a plurality of integrally connected leadframes that each have a die attach pad...
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