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Physical downlink control channel and physical hybrid automatic repeat
request indicator channel enhancements
A wireless transmission system included at least one user equipment and a base station. The base station is operable to form a downlink control information...
CSI measurement and reporting
This invention sets conditions for user equipment responses to channel state indicator request in channel state information that may conflict.
System and method for decoding scalable video coding
A system and method for decoding video encoded using scalable video coding. In one embodiment, a decoder for scalable video coding (SVC) includes an SVC access...
Virtual boundary processing simplification for adaptive loop filtering
(ALF) in video coding
Virtual boundary processing in adaptive loop filtering (ALF) requires that padded values be substituted for unavailable pixel rows outside the virtual...
Routing frame propagation in power line networks
Determination of a transmission through a network having a plurality of nodes using carrier sense multiple access collision avoidance (CSMA/CA) may be performed...
Transmitter and method of transmitting
At least one tone is generated. An output signal is generated in response to an input signal and the at least one tone. The output signal is modulated. The...
Closed-loop high-speed channel equalizer adaptation
A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an...
Code block segmentation and configuration for concatenated turbo and RS
A method for performing code block segmentation for wireless transmission using concatenated forward error correction encoding includes receiving a transport...
Scaled power line based network
A power line communication (PLC) network includes a plurality of PLC devices. One such PLC device may include a transmitter power control system that determines...
Amplifier sharing technique for power reduction in analog-to-digital
A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first...
Reset selection cell to mitigate initialization time
A circuit includes a state capture device to capture a logic state of a reset selection cell in response to a logic state input. A cell reset node defines a...
Ultra-low power comparator with sampling control loop adjusting frequency
and/or sample aperture window
Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a...
Frequency detector and oscillator circuit
Frequency detector and oscillator circuits are disclosed. Example frequency detector and oscillator circuits disclosed herein include a current approximation...
Programmable impedance network in an amplifier
The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A...
System and method for reconfigurable phase shifter and mixer
An analog circuit for generating a periodic signal at a selected phase, including one or more phase interpolators that receive orthogonal differential RF...
Travelling wave motor pre-driver using high resolution PWM generators
A motor driver combination for controlling a travelling wave motor includes a pre-driver including a microcontroller unit (MCU) chip including a plurality of...
Low power radio frequency envelope detector
A low power radio frequency envelope detector includes a charging transistor for controlling the charge supplied to an output capacitor. A first input capacitor...
Dielectric waveguide comprised of a core surrounded by a cladding and
forming integrated periodical structures
A dielectric waveguide interconnect system has a dielectric waveguide (DWG) a core surrounded by a cladding along the length of the DWG. One or more periodic...
Dielectric waveguide with extending connector and affixed deformable
A dielectric wave guide (DWG) has a dielectric core member that has a first dielectric constant value. A cladding surrounding the dielectric core member has a...
MOSFET having dual-gate cells with an integrated channel diode
A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region....
Method for preventing die pad delamination
The invention is directed to a method for inhibiting or preventing delamination at the interface of the die attach/mold compound and the die pad of a...
Multiple-cavity vapor cell structure for micro-fabricated atomic clocks,
magnetometers, and other devices
An apparatus includes a vapor cell having multiple cavities fluidly connected by one or more channels. At least one of the cavities is configured to receive a...
Additional overshoot current HDD write driver circuit
A hard disk drive write drive method and integrated circuit that provide a configurable overshoot current based on the length of the pattern in the write...
Undetectable combining of nonaligned concurrent signals
The approach shown provides for an efficient implementation of time response, level response and frequency response alignment between two audio sources such as...
A cryptographic accelerator performs various modular arithmetic operations producing unreduced results bounded by the double of the modulus (i.e.: 2*M). In...
Sensor synchronized networks using overlapping sensor fields
A method of synchronizing includes providing a sensor network including sensor nodes having object recognition sensors (ORS's) and building automation network...
Material-discerning sensing by measurement of different points of
A material-discerning proximity sensor is arranged to include an antenna that is arranged to radiate a radio-frequency signal. A capacitive sensor is arranged...
Decompressed/compressed data parallel scan paths with input/output shift
The disclosure describes novel methods and apparatuses for accessing test compression architectures (TCA) in a device using either a parallel or serial access...
Addressable tap domain selection circuit, interface select and instruction
This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial...
Method and apparatus for calculating an average value of an inaccessible
current from an accessible current
In a power converter, a circuit determines an average value of an inaccessible current from an average value of an accessible current and a value of the...
Wireless sensor network and association request transmission method
A method of transmitting association requests in a wireless sensor network includes transmitting an association request from a leaf node to an intermediate...
Data frame for PLC having destination address in the PHY header
A physical layer (PHY) data frame for use in conjunction with processor in a node, processor coupled to a program memory for storing a sequence of operating...
Methods and apparatus for multi-channel modem and preamble detection
Methods and apparatus for multiple channel modem and preamble detection. In an example arrangement, a system includes a plurality of communication nodes coupled...
Method and apparatus for die-to-die communication
In apparatus for die-to-die communication, a first die includes at least a first circuit, and a second die includes at least a second circuit. The first die is...
Programmable step attenuator with cross connection
Disclosed examples include a programmable attenuator circuit providing selective cross coupling of impedance components between circuit input nodes and output...
Distributed pole-zero compensation for an amplifier
An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes...
Voltage converter compensation apparatus and methods
On the secondary side of a flyback switching power converter, a compensation diode and a voltage divider with an averaging circuit generate an output...
High efficiency inductive capacitive DC-DC converter
Disclosed examples include high-efficiency integrated circuits and inductive capacitive DC-DC converters with a first converter stage including first and second...
System and method to improve standby efficiency of LLC converter
A system includes an LLC converter to convert an input DC voltage to an output DC voltage. A burst generator generates a switching signal having a burst time...
Method of forming a BICMOS semiconductor chip that increases the betas of
the bipolar transistors
The betas of the bipolar transistors in a BiCMOS semiconductor structure are increased by forming the emitters of the bipolar transistors with two implants: a...
Digital shunt regulator for NFC devices
A digital shunt regulator receives a radio frequency (RF) signal at an antenna which generates a differential output signal over a differential path. A peak...
Voltage regulator stabilization for operation with a wide range of output
A voltage regulator includes a measurement circuit for obtaining a value representing a magnitude of an output capacitance connected at an output node of the...
2-D object detection in radar applications
A set of radar data is organized as a two dimensional (2D) array with multiple lines of data. A 2D cross point analysis is performed on each set of data to...
IC die with channel circuitry, scan and BIST taps, TLM
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously...
Context and bypass encoding video
A method and apparatus for encoding and decoding video data. Including context encoding or decoding at least two bins of each significant transform coefficient...
Memory bandwidth reduction for motion compensation in video coding
Motion compensation requires a significant amount of memory bandwidth, especially for smaller prediction unit sizes. The worst case bandwidth requirements can...
LTE transmission mask adjustment to maximize performance and reduce
System and methods for using channel quality reports to reduce inter-band interference are disclosed. Channel information is received at a first wireless...
Guided near field communication for short range data communication
A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a...
Buffer stack for group IIIA-N devices
A method of fabricating a multi-layer epitaxial buffer layer stack for transistors includes depositing a buffer stack on a substrate. A first voided Group...
Efficient buried oxide layer interconnect scheme
An integrated circuit has a buried interconnect in the buried oxide layer connecting a body of a MOS transistor to a through-substrate via (TSV). The buried...