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Patent # Description
US-9,844,033 System and method for distributed scheduling of transmission resources
In accordance with various embodiments, a system and method of distributed transmission resource management in a wireless network is disclosed. The transmission...
US-9,843,831 Universal remote control with object recognition
Embodiments utilize a camera on a universal remote control to automatically detect which device the remote is pointed at by the user. The image captured by the...
US-9,843,378 Multiple-input multiple-output wireless transceiver architecture
A wireless transceiver contains a receiver and a transmitter. The receiver is operable in single-input single-output (SISO) mode as well as multiple-input...
US-9,843,322 Integrated high-side driver for P-N bimodal power device
An integrated circuit chip includes a bimodal power N-P-Laterally Diffused Metal Oxide Semiconductor (LDMOS) device having an N-gate coupled to receive an input...
US-9,843,204 Systems and methods of direct cell attachment for batteries
Embodiments of the systems and methods of direct cell attachment for battery cells disclosed herein operate without the protection FETs and the protection IC,...
US-9,842,895 Single photomask high precision thin film resistor
An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of...
US-9,842,807 Integrated circuit assembly
An integrated circuit (IC) die including a top surface and a bottom surface, a plurality of spaced apart ground connection traces positioned between the top...
US-9,842,797 Stacked die power converter
A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor...
US-9,842,662 Screening for data retention loss in ferroelectric memories
A data retention reliability screen of integrated circuits including ferroelectric random access memory (FRAM) arrays. Sampled groups of cells in the FRAM array...
US-9,842,572 Methods and apparatus for displaying video including variable frame rates
Methods are described for displaying video including variable frame rates. A method for displaying images includes receiving digital video data including video...
US-9,841,776 Methods and apparatus to improve transient performance in multiphase voltage regulators
Methods and apparatus to improve a transient response of a multi-phase voltage regulator are disclosed. An example apparatus includes a differential amplifier...
US-9,841,507 Wireless device for indoor positioning
A wireless device for indoor positioning has a satellite positioning system, a transceiver, a motion measurement system, and a position estimation system. The...
US-9,840,781 Process for NiFe fluxgate device
An etchant for simultaneously etching NiFe and AlN with approximately equal etch rates that comprises phosphoric acid, acetic acid, nitric acid and deionized...
US-9,835,714 Circuit and method for impedance detection in millimeter wave systems
A method for determining the complex impedance between a first stage and a second stage in a microwave system includes detecting an incident signal emitted by...
US-9,835,678 Through substrate via scan cell with comparator mux, and flip-flop
An integrated circuit die includes a substrate of semiconductor material having a top surface, a bottom surface, and an opening through the substrate between...
US-9,835,663 Capacitive measurement system and method
A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively,...
US-9,834,433 Piezoelectric optical MEMS device with embedded moisture layers
A piezoelectric optical micro-electro-mechanical systems (POMEMS) device includes a glass layer having a bottom surface and a top surface. The device may also...
US-9,832,484 Still block detection in a video sequence
A video display system is configured to receive a sequence of image frames. Each frame is divided into a set of blocks. A center of mass is calculated for each...
US-9,832,028 Automatic power budget management for power-over-Ethernet apparatus
A power-over-Ethernet (PoE) apparatus is provided with PSE controllers that are cooperable to manage a global power budget of the PoE apparatus automatically....
US-9,831,914 Systems and methods for implementing application profiles and device classes in power line communication (PLC)...
Systems and methods for application profiles and device classes in power line communications (PLCs) are described. In some embodiments, a PLC device has the...
US-9,831,909 DSSS inverted spreading for smart utility networks
A method of operating a transmitter (FIGS. 3A and 5A) is disclosed. The method includes receiving a sequence of data bits (DATA), wherein each data bit has a...
US-9,831,886 Background calibration for digital-to-analog converters
A system and method where a comparator is operatively coupled to an output of a Digital-to-analog Converter (DAC). The DAC may comprise a single DAC core or a...
US-9,831,852 Methods and apparatus for a configurable high-side NMOS gate control with improved gate to source voltage...
In described examples, a transistor has: a source and a drain coupled between a supply voltage and an output terminal; and a gate terminal. A charge pump has:...
US-9,831,840 Amplifier circuit and method for adaptive amplifier biasing
Disclosed examples include amplifier circuits with a first stage to amplify an input voltage signal according to a first stage gain to provide a first stage...
US-9,831,767 Modulation circuit for enhanced load transient response
A circuit and method for providing improved load transient response in a DC-DC converter. A DCM modulator is incorporated into the converter controller to...
US-9,831,320 High voltage lateral DMOS transistor with optimized source-side blocking capability
An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an...
US-9,831,231 ESD protection circuit with plural avalanche diodes
An electrostatic discharge (ESD) protection circuit (FIG. 3C) is disclosed. The circuit includes a bipolar transistor (304) having a base, collector, and...
US-9,831,193 Methods and apparatus for scribe street probe pads with reduced die chipping during wafer dicing
An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes....
US-9,831,135 Method of forming a biCMOS semiconductor chip that increases the betas of the bipolar transistors
The betas of the bipolar transistors in a BiCMOS semiconductor structure are increased by forming the emitters of the bipolar transistors with two implants: a...
US-9,830,964 Non-volatile array wakeup and backup sequencing control
Individual first ones of a plurality of non-volatile logic element arrays are designated to restore first in response to entering a wakeup or restoration mode....
US-9,829,581 Enhancing search capacity of global navigation satellite system (GNSS) receivers
Enhancing search capacity of Global Navigation Satellite System (GNSS) receivers. A method for searching satellite signals in a receiver includes performing a...
US-9,829,566 Controlling radar transmission to enable interference mitigation
Radar detection of an object is achieved by identifying a first range associated with a possible object based on a first return from a first radar transmission...
US-9,829,538 IC expected data and mask data on I/O data pads
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
US-9,829,526 Transmission line pulsing
A circuit and method for electrostatic discharge testing using transmission line pulsing. A plurality of transmission line networks may be connected to a device...
US-9,829,501 Rotational sensing based on inductive sensing
A rotational sensing system is adaptable to sensing motor rotation based on eddy current sensing. An axial target surface is incorporated with the motor rotor,...
US-RE46,618 Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
A method for fabricating a low resistance, low inductance device for high current semiconductor flip-chip products. A structure is produced, which comprises a...
US-9,825,564 Circuits and methods of determining position and velocity of a rotor
A motor controller includes a square wave voltage generator and adding circuitry for adding the square wave voltage to a first drive voltage that is connectable...
US-9,825,138 Field effect transistor and method of making
A method of fabricating a FET includes forming a gate on the surface of a substrate. A trench contact extends between a first region located proximate the...
US-9,825,030 High quality deep trench oxide
An integrated circuit including a trench in the substrate with a high quality trench oxide grown on the sidewalls and the bottom of the trench where the ratio...
US-9,824,959 Structure and method for stabilizing leads in wire-bonded semiconductor devices
A semiconductor device having a leadframe including a pad (101) surrounded by elongated leads (110) spaced from the pad by a gap (113) and extending to a frame,...
US-9,824,947 Through silicon via, scan cell stimulus, response to two switches
The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of...
US-9,824,811 Embedded coil assembly and method of making
An embedded coil assembly embodiment includes a ferrite ring having an annular axis. The ferrite ring is positioned on a conductive metal surface. A plurality...
US-9,824,775 Feedback validation of arbitrary non-volatile memory data
An integrated circuit and method of performing a reliability screen of an electrically programmable non-volatile memory array in the integrated circuit. At a...
US-9,824,769 Fusible link cell with dual bit storage
A fuse-programmable register or memory location having a plurality of fusible links of differing electrical characteristics in parallel. In one embodiment,...
US-9,824,045 USB port controller with automatic transmit retries and receive acknowledgements
Described examples include USB controllers and methods of interfacing a host processor with one or more USB ports with the host processor implementing an upper...
US-9,823,340 Method for time of flight modulation frequency detection and illumination modulation frequency adjustment
A method removing adjecent frequency interference from a Time Of Flight sensor system by adaptively adjusting the transmitted infrared illumination frequency of...
US-9,823,306 Measuring internal signals of an integrated circuit
An integrated circuit (IC) is provided with functional logic having a plurality of internal signal lines and test logic. The test logic has a plurality of...
US-9,823,282 On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems
An integrated circuit includes a functional circuit (10) having a power grid (20) with a set of power grid points (30.i) for monitoring; and an electronic...
US-9,820,294 Systems and methods for time optimization for silencing wireless devices in coexistence networks
Embodiments provide a communication device. A device comprises at least two dissimilar network technology subsystems, at least one subsystem of which is lower...
US-9,820,230 Low power packet detection circuit for WLAN recievers
The disclosure provides a low power receiver. The receiver includes a first channel that receives an RF signal and generates an input signal. The receiver also...
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