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Patent # Description
US-1,010,4004 Openflow match and action pipeline structure
An embodiment of the invention includes a packet processing pipeline. The packet processing pipeline includes match and action stages. Each match and action...
US-1,010,3779 Adaptive tone power control in PLC networks
In a powerline communications (PLC) network having a first node and at least a second node on a PLC channel utilizing a band including a plurality of tones,...
US-1,010,3753 Error correcting analog-to-digital converters
A pipeline ADC comprising an ADC segment and a digital backend coupled to the ADC segment. In some examples the ADC is configured to receive an analog signal,...
US-1,010,3278 Silicon IMPATT diode
A method to integrate a vertical IMPATT diode in a planar process.
US-1,010,3261 Transient-insensitive level shifter
In a described example, an apparatus includes at least one latch coupled to a first positive supply voltage and to a first negative supply voltage, the latch...
US-1,010,3258 Laterally diffused metal oxide semiconductor with gate poly contact within source window
An integrated circuit includes a power transistor having at least one transistor finger that lies within a semiconductor material substrate. Each transistor...
US-1,010,3171 Metal on elongated contacts
An integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, and including...
US-1,010,3153 SRAM layout for double patterning
An integrated circuit with a SAR SRAM cell with power routed in metal-1. An integrated circuit with a SAR SRAM cell that has power routed in Metal-1 and has...
US-1,010,2889 Processing device with nonvolatile logic array backup
A processing device is operated using a plurality of volatile storage elements. N groups of M volatile storage elements of the plurality of volatile storage...
US-1,010,2445 Efficient feature point selection
Systems and methods are provided for selecting feature points within an image. A plurality of candidate feature points are identified in the image. A plurality...
US-1,010,2400 Method and system for preventing unauthorized processor mode switches
A system comprising a processor adapted to activate multiple security levels for the system and a monitoring device coupled to the processor and employing...
US-1,010,1438 Noise mitigation in radar systems
A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a...
US-1,010,1391 Adapter circuitry with link and system interfaces to core circuitry
A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to...
US-1,010,1385 Interpose tap, Monitor trigger circuitry coupled to temperature sensor circuitry
The disclosure describes a novel method and apparatus for improving interposers to include embedded monitoring instruments for real time monitoring digital...
US-1,010,1382 Systems and methods for dynamic Rdson measurement
In at least some embodiments, a system comprises a socket gate terminal configured to receive a first voltage to activate and inactivate a device under test...
US-1,010,1361 Method for testing semiconductor devices
A method of testing semiconductor devices includes placing a plurality of semiconductor devices in a carrier assembly and performing at least one testing...
US-1,010,1176 Carrier tape packaging method and apparatus
An apparatus for detecting misplaced units in a moving carrier tape having a plurality of pockets with units positioned therein. The apparatus includes a...
US-1,009,8595 Low power photon counting system
The disclosure provides a circuit that includes a charge sensitive amplifier (CSA) that generates an integrated signal in response to a current signal. An...
US-1,009,7396 TX IQ mismatch pre-compensation
A direct conversion wireless transmitter includes IQ mismatch pre-compensation using direct learning adaptation to adjust IQ pre-compensation filtering....
US-1,009,7371 Carrier sense multiple access (CSMA) protocols for power line communications (PLC)
Systems and methods for carrier sense multiple access (CSMA) protocols for power line communications (PLC) are described. In some embodiments, a method may...
US-1,009,7183 Level shifter and method of calibration
A level shifter includes a signal generator that generates differential signals on a first output and a second output. A first capacitor is coupled between the...
US-1,009,7089 Circuit and method for direct current (DC)-DC voltage converter with adaptive charge transfer
A voltage converter includes a high side transistor, a low side transistor coupled to the high side transistor at a switching node, and an inductor coupled to...
US-1,009,6685 Drift region implant self-aligned to field relief oxide with sidewall dielectric
An integrated circuit which includes a field-plated FET is formed by forming a first opening in a layer of oxide mask, exposing an area for a drift region....
US-1,009,5474 Filler bank control circuit for synchronous FIFO queues and other memory devices
An apparatus includes a controller and logic circuitry. The controller is configured to generate multiple single-bit logic values. Each single-bit logic value...
US-1,009,5252 Voltage-to-current converter
A voltage-to-current converter includes an input stage having a first input and a second input. The first input is connectable to a reference voltage, wherein...
US-1,009,4920 Range resolution in FMCW radars
The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp...
US-1,009,4878 Winding fault detection using inverter harmonics
A controller for driving a motor includes a multiphase driver, an analog-to-digital converter (ADC), impedance estimation circuitry, and fault detection...
US-1,009,4863 High-resolution power electronics measurements
Disclosed examples include systems to determine an on-state impedance of a high voltage transistor, and measurement circuits to measure the drain voltage of a...
US-1,009,4530 Apparatus for spatially and spectrally adaptable dichromatic white light source using spatial light modulator
In described examples of an illumination system, the illumination system includes: at least two illumination modules to output different color light beams to an...
US-1,009,1786 Wideband beacon channel for frequency hopping systems
A method of operating a network on a plurality of frequency hopping channels is disclosed. The method includes transmitting a beacon on a beacon channel...
US-1,009,0299 MOSFET transistors with robust subthreshold operations
An integrated circuit with transistor regions formed on a substrate. Each transistor region includes a channel region and a terminal region. The channel region...
US-1,009,0264 Method to improve CMP scratch resistance for non planar surfaces
A microelectronic device is formed by providing a substrate having a recess at a top surface, and a liner layer formed over the top surface of the substrate,...
US-1,008,9739 Structured light depth imaging under various lighting conditions
A method of image processing in a structured light imaging system is provided that includes receiving a captured image of a scene, wherein the captured image is...
US-1,008,9172 Package on package memory interface and configuration with error code correction
Information communication circuitry, including a first integrated circuit for coupling to a second integrated circuit in a package on package configuration. The...
US-1,008,8856 Methods and apparatus for negative output voltage active clamping using a floating bandgap reference and...
Methods, apparatus, systems and articles of manufacture for negative output voltage active clamping using a floating bandgap reference and temperature...
US-1,008,8527 Differential I/O for parallel scan paths, scan frames, embedded commands
Testing of integrated circuits is achieved by a test architecture utilizing a scan frame input shift register, a scan frame output shift register, a test...
US-1,008,8525 Non-interleaved scan operation for achieving higher scan throughput in presence of slower scan outputs
A scan chain may be formed throughout an integrated circuit in which the scan chain is coupled to a set of pins via bi-directional input/output (I/O) buffers. A...
US-1,008,8456 Scanning acoustic microscopy system and method
A system for scanning and analyzing a device under test includes a transducer. The transducer transmits ultrasonic waves to scan the device under test and...
US-1,008,8311 Analog floating-gate inclinometer
An analog floating-gate (AFG) inclinometer where a plurality of AFG sensors are provided to detect the presence of a discharge caused by settling of a...
US-1,008,4466 Top plate sampling circuit including input-dependent dual clock boost circuits
In some examples, a system includes a first transistor comprising a first source terminal coupled to a first input terminal, a first drain terminal coupled to a...
US-1,008,2527 Removal of higher order magnetic interference in magnetic field based current sensors
A system for measuring current includes a conductive trace comprising N substantially parallel straight sections having a substantially constant cross-section,...
US-1,008,1536 Gasses for increasing yield and reliability of MEMS devices
In described examples, a MEMS device is enclosed within a sealed package including nonmetal oxide gasses at levels greater than 1% by volume. In at least one...
US-1,008,0195 Access and power management for centralized networks
A system and method for managing power in a subnet having a hub in communication with one or more nodes is disclosed. The hub and nodes communicate using one or...
US-1,008,0054 Automatic time extension of program recording
A system (and method) automatically extends a scheduled recording of a live event past its scheduled end time. The system include includes a content interface...
US-1,008,0007 Hybrid tiling strategy for semi-global matching stereo hardware acceleration
Apparatus and methods for disparity cost computation for a stereoscopic image. In an example, a method includes computing partial path matching costs for...
US-1,007,9970 Controlling image focus in real-time using gestures and depth sensor data
A method of controlling image focus in a digital imaging system is provided that includes receiving a depth-scene image pair generated by a depth-scene image...
US-1,007,9604 Staggered switching in a load driver
An apparatus comprises multiple impedances and multiple pairs of transistors. Each pair connects to an impedance. Each pair includes high and low side...
US-1,007,9578 Total harmonic distortion (THD) controlled clip detector and automatic gain limiter (AGL)
The disclosed embodiments include an audio amplifier system configured to provide a total harmonic distortion (THD) controlled clip detector and an automatic...
US-1,007,9540 System and method to improve standby efficiency of LLC converter
A system includes an LLC converter to convert an input DC voltage to an output DC voltage. A burst generator generates a switching signal having a burst time...
US-1,007,9538 Bootstrap circuit for DC/DC converter
A circuit includes a charge pump to generate an output reference voltage. A first bootstrap refresh circuit receives the reference voltage from the charge pump...
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