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Method to obtain fully silicided poly gate
The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a spacer material 160 over gate...
Methods for reducing capacitor dielectric absorption and voltage
Semiconductor devices and fabrication methods are provided in which a capacitor dielectric is provided with phosphorus or other n-type dopants through...
Thermally enhanced BGA package with ground ring
The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or...
Accessing device driver memory in programming language representation
In some embodiments, a storage medium comprises application software that performs one or more operations and that directly manages a device. The application...
Apparatus and method for responding to data retention loss in a
non-volatile memory unit using error checking...
In a non-volatile memory unit such as a flash memory unit, the degradation of charge can result in an error during a read operation. By using the error checking...
A wireless mobile telephone for connecting to multiple networks that includes a cellular module for routing calls through a cellular telephone network, a...
Power and area efficient receiver circuit having constant hysteresis for
A hysteresis receiver containing two inverters and a logic controller. The inverters are implemented with threshold voltages equaling Vil and Vih, which together...
Computationally and memory efficient tone ordering scheme
An integrated circuit 18 is provided that includes a memory 32 and a memory modification component 33. The memory 32 maintains a bits count, a gain, and a tone...
Rapid method for sub-critical fatigue crack growth evaluation
In a method and system for evaluating sub-critical fatigue crack growth in a semiconductor device, a plurality of energy pulses generated by an energy source are...
Circuit and method for gain error correction in ADC
Gain errors are corrected in an ADC chip including an integrator (17), a comparator (30), and a digital filter (37) by storing a gain-adjusted LSB size based on...
Switched capacitor notch filter circuits
Switched capacitor notch filter circuits are disclosed. An example switched capacitor notch filter circuit described herein includes a switched capacitor...
Probe card and temperature stabilizer for testing semiconductor devices
One aspect of the invention provides an apparatus that includes a probe card having probe needles associated therewith. A temperature stabilizer element is...
Apparatus and method for test, characterization, and calibration of
microprocessor-based and digital signal...
A circuit board with a processing unit and a delay line with a controllable number of delay elements fabricated thereon includes apparatus for testing and...
Method for preparing a source material including forming a paste for ion
The present invention provides, for use in a semiconductor manufacturing process, a method (100) of preparing an ion-implantation source material. The method...
Manufacturing a semiconductive device using a controlled atomic layer
A method for manufacturing a semiconductive device comprising forming a mask for a semiconductive device structure over a layer of a semiconductor substrate and...
Identification of outlier semiconductor devices using data-driven
Systems and methods for identification of outlier semiconductor devices using data-driven statistical characterization are described herein. At least some...
Method for generating and evaluating a table model for circuit simulation
A method for generating and evaluating a table model for circuit simulation in N dimensions employing mathematical expressions for modeling a device. The table...
Separately controlled scan paths of functional registers providing
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to...
Low power scan process with connected stimulus and scan paths
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan...
Propagation test strobe circuitry with boundary scan circuitry
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits...
IC input memory with dual data and dual control inputs
An electronic integrated circuit includes a signal path connected between the functional logic and an external input terminal, which signal path includes a...
JTAG circuit transferring data between devices on TCK terminals
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication...
Method and system for obtaining an immediate operand of a bytecode for use
by a micro-sequence
A processor is provided that includes decode logic coupled to an instruction cache and a micro-sequence vector table including entries for each bytecode in an...
Dynamic sound source and listener position based audio rendering
This invention describes the use of dynamic sound source and listener position (DSSLP) based audio rendering to achieve high quality audio effects using only a...
Method and apparatus for efficient multi-stage FIR filters
An interpolation filter without a FIFO memory is configured as a cascade arrangement of simpler interpolation sub-filters that are operated in reverse order. The...
Method of synchronization for packet based, OFDM wireless systems with
multiple receive chains
A system for synchronizing a wireless receiver is provided. The system includes a first antenna (101a) and a second antenna (101b) to receive wireless signals...
Light-emitting element driver
The bias current of a current injection-type light-emitting element is set very close to the threshold current, and to guarantee a stable optical output and...
System and method for access and management of beacon periods in
distributed wireless networks
The present application describes a system and method of managing beacon periods in a distributed wireless network. According to an embodiment, devices move...
Noise analysis in a communication system
A system is provided to automatically estimate performance of a receiver for receiving input signals, the input signals having a carrier frequency and a baud...
Versatile system for optimizing data fragmentation in digital
The present invention provides a versatile system for optimizing data fragmentation in a digital communications--particularly OFDM communications--system. A...
On-the-fly introduction of inter-channel delay in a pulse-width-modulation
A multiple-channel audio processor (10) and an associated plurality of power stages (22) in an audio system are disclosed. The audio processor (10) includes a...
System and method for driving light-emitting diodes (LEDs)
System and method for improving efficiency in driving LEDs. A preferred embodiment comprises a switch current regulator coupled to a current control signal...
IC with comparator receiving expected and mask data from pads
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
Method for forming a fully silicided gate and devices obtained thereof
A method for manufacturing a MOSFET device with a fully silicided (FUSI) gate is described. This method may be used to prevent formation of shorts between the...
Method for transmit pulse design for ultra-wideband communications
Method for designing transmission pulses for ultra-wideband communications systems. A preferred embodiment comprises specifying a spectral description for the...
High performance, low-leakage static random access memory (SRAM)
Systems and methods are provided for reducing leakage current and maintaining high performance in a static random access memory (SRAM). One embodiment discloses...
Systems and methods for efuse fusing time reduction
Various systems and methods for device configuration are disclosed herein. For example, some embodiments of the present invention provide semiconductor devices...
Multiple-gate MOSFET device with lithography independent silicon body
Multi-gate MOS transistors and fabrication methods are described, in which the transistor semiconductor body thickness or width is lithography independent,...
Broken die detect sensor
A broken trim die tool detection sensor. The lands of the tie bar die connect with the leads of the unit to form switches. The states of these switches indicate...
Integrated circuit chip packaging assembly
An integrated circuit chip packaging assembly having a first and second package side. An integrated circuit chip has a substrate side and an active circuit side....
Emulation cache access for tag view reads
A built-in self test unit reads tag bits of a predetermined cache entry and outputs these tag bits via an external interface. The built-in self test unit enters...
Digital storage element with enable signal gating
A digital storage element (e.g., a flip-flop or a latch) comprise a master transparent latch that receives functional data from a data input port and scan data...
Use of supercritical fluid for low effective dielectric constant
An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step...
Cross-referencing cache line addresses with corresponding names
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from caches on different cache...
Representing data having multi-dimensional input vectors and corresponding
output element by piece-wise polynomials
Determining piece-wise polynomials which together would represent large data sets having multi-dimensional input vectors and corresponding output element. In an...
Iterative filtering for dithered imaging
Filtering image information to generate a dithered image includes receiving input image information corresponding to an image generated using a first array...
All-digital frequency synthesis with non-linear differential term for
handling frequency perturbations
An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word...
SRAM cell using separate read and write circuitry
The present invention provides circuitry for writing to and reading from an SRAM cell core, an SRAM cell, and an SRAM device. In one aspect, the circuitry...
Integrated TIR prism and lens element
An optical component includes a prism element adjacent to a lens element, where the two elements are separated by a small air gap. Elements of the optical...
Yokeless hidden hinge digital micromirror device with double binge layer
A micromirror array 110 fabricated on a semiconductor substrate 11. The array 110 is comprised of four operating layers 12, 13, 14, 15. An addressing layer 12 is...