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Patent # Description
US-7,450,672 Using SISO decoder feedback to produce symbol probabilities for use in wireless communications that utilize...
An apparatus and method for transmitting and receiving a bit stream. On the transmission side, coded bits (Y.sub.t) and an interleaved version of the coded bits...
US-7,450,654 Method and apparatus for multicarrier channel estimation and synchronization using pilot sequences
Method and apparatus for OFDM synchronization and channel estimation. In a temporal embodiment, received embedded system pilot symbols are inverse Fourier...
US-7,450,616 Area efficient serializer implementation for small functional-to-serial clock ratios
This invention adds one extra bit which can be viewed as a shadow of most significant bit of the serial register. This extra register bit is referred as...
US-7,450,452 Method to identify or screen VMIN drift on memory cells during burn-in or operation
A method of manufacturing a semiconductor device includes providing an electrical connection to a well of a MOS transistor of a static random access memory...
US-7,450,329 Method to vary symmetry and coupling in symmetrical write drivers for disk driver preamplifiers
The present invention achieves technical advantages as a preamplifier write driver (10) having a varying common-mode output voltage. This varying common-mode...
US-7,450,297 Unique method for manufacturing a digital micromirror device and a method for manufacturing a projection...
The present invention provides a method for manufacturing a digital micromirror device and a method for manufacturing a projection display system. The method for...
US-7,449,959 Methods and apparatus to detect impedance at an amplifier output
Methods and apparatus to detect impedance at an amplifier output are described. In one example, a method of determining a relative value of an amplifier output...
US-7,449,950 Analog signal processing circuit
An analog signal processing block with differential signal inputs and including a differential amplifier with differential inputs is disclosed which is...
US-7,449,947 Reduction of voltage spikes in switching half-bridge stages
A path configuration for a power switch and driver can introduce independent parasitic inductance coupled to the power switch to slow a switching speed of the...
US-7,449,924 Latch-based serial port output buffer
An integrated circuit (22) having a serial interface (25) with improved access times is disclosed. The serial interface (25) includes a serial output port...
US-7,449,873 Voltage controlled current source device
An integrated voltage controlled current source device is provided, that extends the high accuracy, low drift output current over a large current range, and...
US-7,449,783 Nonlinear via arrays for resistors to reduce systematic circuit offsets
A thin film resistor structure includes a plurality of thin film resistor sections. Conductive vias (5) are disposed on a first end of each of the thin film...
US-7,449,773 Microelectromechanical device packages with integral heaters
A microelectromechanical device package with integral a heater and a method for packaging the microelectromechanical device are disclosed in this invention. The...
US-7,449,765 Semiconductor device and method of fabrication
A MEMS (micro electro-mechanical system) semiconductor device and a method for producing such a device. A preferred embodiment of the present invention comprises...
US-7,449,693 System and method for radiation detection and imaging
System and method for detecting and imaging radiation. A preferred embodiment comprises a substrate with electronic circuitry to detect changes in a transduction...
US-7,449,385 Gate dielectric and method
CMOS gate dielectric made of high-k metal silicates by reaction of metal with silicon dioxide at the silicon surface. Optionally, a silicon dioxide monolayer may...
US-7,449,364 Device and method for including passive components in a chip scale package
The invention provides a method and device for building one or more passive components into a chip scale package. The method includes the steps of selecting a...
US-7,449,358 Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from...
US-7,448,395 Process method to facilitate silicidation
The present invention substantially removes dry etch residue from a dry plasma etch process 110 prior to depositing a cobalt layer 124 on silicon substrate...
US-7,448,009 Method of leakage optimization in integrated circuit design
This invention reduces leakage power in an integrated circuit design formed of a plurality of design cells selected from a library of cells. The method of this...
US-7,447,967 MIMO hybrid-ARQ using basis hopping
A Hybrid Automatic Retransmission Request (H-ARQ) technique is provided for Multi-Input Multi-Output (MIMO) systems. The technique changes the basis (V) upon...
US-7,446,785 High bit depth display with low flicker
A method of and system for displaying a high bit depth pulse width modulated image at a low frame rate without image flicker. The frame period (1902) is divided...
US-7,446,606 Methods and apparatus to provide slew enhancement for low power amplifiers
Methods and apparatus to provide increased current to a cascode amplifier to maximize slew rate are disclosed. The amplifier has a first input coupled to an...
US-7,446,553 Semiconductor device testing
An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines...
US-7,446,552 Semiconductor device testing
An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines...
US-7,446,515 Compensating NMOS LDO regulator using auxiliary amplifier
An LDO (low dropout) regulator including a pass transistor having a first electrode coupled to produce an output voltage of the LDO regulator, a control...
US-7,445,960 Adhesion by plasma conditioning of semiconductor chip
A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated...
US-7,444,581 Error handling of storage device data in real time systems
A storage device performs error correction for all data read from media. Correctly read data or data that is corrected following the reading is transferred to a...
US-7,444,573 VLCT programmation/read protocol
An integrated circuit with built-in self test enables internal data registers to be written to or read from via an external tester. In a command phase the...
US-7,444,504 Tracing through reset
A method of tracing a data processor upon reset of the data processor. A data processor reset signal resets the data processor, part of trace collection hardware...
US-7,444,476 System and method for code and data security in a semiconductor device
A system and method for preventing unauthorized access to the software of a semiconductor device is provided. The semiconductor device of the present invention...
US-7,444,474 Determining the presence of a virtual address in a cache
An information carrier medium containing software that, when executed by a processor, causes the processor to receive status information from circuit logic that...
US-7,444,440 Method and device for providing high data rate for a serial peripheral interface
An improved high performance scheme is provided with a serial peripheral interface (SPI) to enable microcontroller-based products and other components and...
US-7,443,937 High resolution digital clock multiplier
A high resolution programmable clock synthesizer that is portable across processes and, thus, process independent is disclosed herein. The clock synthesizer...
US-7,443,935 Apparatus and method for dynamically adjusting receiver bandwidth
An apparatus for adjusting bandwidth for a receiver includes: (a) a receiver clock operating according to receiver clock parameters related to received signals...
US-7,443,913 High speed decision feedback equalizer
An equalizer comprises a sampler, a filter, and a summer. The sampler samples a signal indicative of an input communication signal to determine digital decision...
US-7,443,708 Low resistance plate line bus architecture
An FeRAM memory array wherein the plate lines run in the direction of word lines is described that provides a reduced plate line resistance in arrays having a...
US-7,443,567 Image enhancement of a microdisplay through acoustooptics
A method of processing light includes generating a beam of light and periodically diffracting the beam of light by an acoustooptic cell to produce diffracted...
US-7,443,455 Automatic gain control based on multiple input references in a video decoder
A video decoder (10) for receiving an input video signal and producing output signals for a digital display (12), and involving automatic gain control (AGC)...
US-7,443,454 Method for treating inter-frame motion in a composite video signal
A method for treating inter-frame motion in a series of consecutive signal frames of a composite video signal includes the steps of, for an evaluation pixel...
US-7,443,331 Multiple-bank CMOS image sensor system and method
A CMOS image sensor system includes first and second groups of CMOS sensors each responsive to periodic first and second clock signal edges, the second clock...
US-7,443,324 Apparatus and method for dithering a sigma-delta modulator
A signal processor includes a sigma-delta modulator. The input signal to the signal-delta modulator may contain a dc component that generates spurious tones in...
US-7,443,217 Circuit and method to balance delays through true and complement phases of differential and complementary drivers
A circuit for balancing delays through true and complement phases of complementary drivers includes: a first driver; a second driver; a first delay device...
US-7,443,189 Method to detect and predict metal silicide defects in a microelectronic device during the manufacture of an...
The present teachings provide methods for detection of metal silicide defects in a microelectronic device. In an exemplary embodiment, a portion of a...
US-7,443,140 Method and apparatus for operating a battery to avoid damage and maximize use of battery capacity by...
A method for terminating battery discharge to avoid battery damage and maximize battery usage includes the steps of: (a) determining battery capacity; (b)...
US-7,443,020 Minimizing number of masks to be changed when changing existing connectivity in an integrated circuit
Dummy stacks, each providing a common point of connectivity potentially across all metal layers, are incorporated along with the functional block in an...
US-7,443,007 Trench isolation structure having an implanted buffer layer
The present invention provides a trench isolation structure, a method of manufacture therefor and a method for manufacturing an integrated circuit including the...
US-7,442,972 Semiconductor device and inspection method thereof
A semiconductor device is disclosed. The device has a photodiode isolated by element isolating regions (Ia, 14a, 14b) characterized by the following facts: on...
US-7,442,626 Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse...
US-7,442,597 Systems and methods that selectively modify liner induced stress
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply strain to multiple regions of a...
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