Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,410,841 Building fully-depleted and partially-depleted transistors on same chip
A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and partially-depleted silicon-on-insulator (FD-SOI) transistors (152) on...
US-7,410,840 Building fully-depleted and bulk transistors on same chip
A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and bulk transistors (152) on a semiconductor substrate (104) as part of...
US-7,410,820 MEMS passivation with phosphonate surfactants
Phosphonate surfactants are employed to passivate the surfaces of MEMS devices, such as digital micromirror devices. The surfactants are adsorbed from vapor or...
US-7,410,260 Use of a CCD camera in a projector platform for smart screen capability and other enhancements
An optical projection and capture system includes an image sensor integrated with an optical projection device. Additionally, the integrated device may be...
US-7,409,611 Wrapper instruction/data register controls from test access or wrapper ports
In a first embodiment a TAP 318 of IEEE standard 1149.1 is allowed to commandeer control from a WSP 202 of IEEE standard P1500 such that the P1500 architecture,...
US-7,409,415 Processor system with efficient shift operations including EXTRACT operation
An electronic system (200.sub.1) for manipulating an input data argument (D[31:0]) comprising an integer number of bits. The system comprises an input (R) for...
US-7,408,980 Semi-distributed power spectrum control for digital subscriber line communications
A semi-distributed method of managing the spectral power over multiple digital subscriber line communication loops (LP1, LP2) is disclosed. A central office (CO)...
US-7,408,493 Systems and methods for automatic gain control
Systems and methods for automatic gain control are disclosed. In one aspect of the invention, a system is provided that comprises a programmable gain amplifier...
US-7,408,485 Asynchronous sampling rate converter and method for audio DAC
A sample rate converter suitable for use in an audio DAC includes a first estimating circuit (32A) generating first (TR) and second (STAMPR) signals synchronized...
US-7,408,415 Voltage controlled oscillator phase locked loop circuit with loop filter capacitance tuning
A phase locked loop circuit comprises a voltage controlled oscillator with a control input to which a variable control voltage is applied and a phase-frequency...
US-7,408,392 PWM-to-voltage converter circuit and method
A converter circuit and method for converting a pulse-width modulated input signal into a voltage output signal eliminates an offset due to component mismatch....
US-7,408,369 System and method for determining thermal shutdown characteristics
Systems and methods are disclosed to enable determining thermal protection characteristics of an integrated circuit. In one embodiment, an integrated circuit...
US-7,408,326 Battery pack system interface with multiple mode control states
A system interface having an interface for dual battery packs provides for power up sequencing of battery packs and pack switching under the control of a host...
US-7,408,250 Micromirror array device with compliant adhesive
A microstructure is packaged with a device substrate of the microstructure being attached to a package substrate. For dissipating possible deformation of the...
US-7,407,850 N+ poly on high-k dielectric for semiconductor devices
The present invention facilitates semiconductor fabrication by providing methods of fabrication that employ high-k dielectric layers. An n-type well region (304)...
US-7,407,291 Micromirror projection of polarized light
The micromirror-based projection system of the present invention uses polarized illumination light in producing desired images on a display target. The display...
US-7,406,494 Method of generating a cycle-efficient bit-reverse index array for a wireless communication system
An efficient method of generating a bit-reverse index array in real time without performing any bit manipulation for a wireless communication system.
US-7,406,178 Efficient digital audio automatic gain control
The present invention is a digital dynamic compression or automatic gain control (AGC) (10) adapted for use in high quality audio and hearing aids applications....
US-7,406,028 Memory-efficient ADSL transmission in the presence of TCM-ISDN interferers
A method of communicating data across a channel that experiences near-end cross talk (NEXT) interference and far-end cross talk (FEXT) interference in alternate...
US-7,405,860 Spatial light modulators with light blocking/absorbing areas
A projection system, a spatial light modulator, and a method for forming a micromirror array such as for a projection display are disclosed. The spatial light...
US-7,405,856 Display system timing control method
A display system includes a light source 110 and a spatial light modulator 122 located to receive light from the light source. The spatial light modulator (e.g.,...
US-7,405,685 Negative contributive offset compensation in a transmit buffer utilizing inverse clocking
A novel method and apparatus for a negative contributive offset compensation mechanism for a transmit buffer adapted to compensate for the positive offset...
US-7,404,909 Mirror including dielectric portions and a method of manufacturing the same
The invention provides a method for manufacturing a microelectronic device and a microelectronic device. The method for manufacturing the microelectronic device,...
US-7,404,513 Wire bonds having pressure-absorbing balls
A semiconductor device with a chip having at least one metallic bond pad (101) over weak insulating material (102). In contact with this bond pad is a flattened...
US-7,404,129 TAP IR control with TAP/WSP or WSP DR control
In a first embodiment a TAP of IEEE standard 1149.1 is allowed to commandeer control from a WSP of IEEE standard P1500 such that the P1500 architecture, normally...
US-7,404,128 Serial data I/O on JTAG TCK with TMS clocking
The present disclosure describes a novel method and apparatus of using the JTAG TAP's TMS and TCK terminals as a general purpose serial Input/Output (I/O) bus....
US-7,404,127 Circuitry with multiplexed dedicated and shared scan path cells
An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a...
US-7,404,126 Scan tests tolerant to indeterminate states when employing signature analysis to analyze test outputs
Scan tests tolerant to indeterminate states generated in an integrated circuit (IC) when employing signature analysis to analyze test outputs. Bits with...
US-7,404,106 Apparatus and method for reporting program halts in an unprotected pipeline at non-interruptible points in code...
In a target processor having a non-protected pipeline, the execution code is typically provided with interruptible code portions and with non-interruptible code...
US-7,404,025 Software programmable dynamically reconfigurable scheme for controlling request grant and masking for ultra...
A method for arbitration grants access to an ultra high priority device if the ultra high priority device requests access. This access is limited to a selectable...
US-7,403,963 Re-sampling with an arbitrary scaling ratio
A simple to implement sample rate conversion system consisting of an input/output data flow controller, interpolation coefficient generation, and output data...
US-7,403,881 FFT/IFFT processing system employing a real-complex mapping architecture
The present invention provides an FFT/IFFT processor for use with N data values. In one embodiment, the FFT/IFFT processor includes an even-odd data mapper...
US-7,403,774 Unconnected power save mode for improving battery life of wireless stations in wireless local area networks
An unconnected power save method reduces the battery consumption of a wireless station in a wireless local area network (WLAN). A wireless station enters a sleep...
US-7,403,719 Feedback control for free-space optical systems
Disclosed is a system and method for aligning a free-space optical signal in an optical system having a light modulator having an array of pixels. In this system...
US-7,403,604 Method and apparatus for activating extended services in a user device using a voice over packet gateway
An enhanced services display message protocol (ESDMP) facilitates display of messages in a compliant analog telephony device (ATD). An exemplary gateway device...
US-7,403,569 Efficient low-power mode for multicarrier communications
Multicarrier modulated communications, involving a transmitting modem (30; 30') and a receiving modem (40; 40') that operate according to normal operating mode...
US-7,403,531 WLAN admission control for multimedia service
The present invention provides a system for controlling isochronous data admission, within a WLAN system (102) that transports both isochronous and asynchronous...
US-7,403,511 Low power packet detector for low power WLAN devices
A low power packet detector (LPPD) can significantly reduce the average power consumption of WLAN devices. The LPPD takes advantages of 802.11 protocols to turn...
US-7,403,507 System and method for recovering system time in direct sequence spread spectrum communications
A sleep control system and method are provided that permit a reference clock and the direct sequence spread spectrum (DSSS) modem in a mobile station receiver to...
US-7,403,324 Double substrate reflective spatial light modulator with self-limiting micro-mechanical elements
A spatial light modulator has an array of reflective surfaces of deflectable mirror plates. For improving the reflectivity of the mirror plates, layers that are...
US-7,403,213 Boundary dispersion for artifact mitigation
A method and system providing boundary dispersion to pixel values displayed on a binary spatial light modulator to reduce temporal contouring artifacts. Pixel...
US-7,403,187 Generalized reset conflict resolution of load/reset sequences for spatial light modulators
Disclosed herein are methods for providing a load/reset sequence for a visual display system (100) having a phased reset spatial light modulator (SLM) (14). The...
US-7,403,095 Thin film resistor structure and method of fabricating a thin film resistor structure
A thin film resistor structure and a method of fabricating a thin film resistor structure is provided. The thin film resistor structure includes an electrical...
US-7,403,094 Thin film resistor and dummy fill structure and method to improve stability and reduce self-heating
An integrated circuit thin film resistor structure includes a first dielectric layer (18A) disposed on a semiconductor layer (16), a first dummy fill layer (9A)...
US-7,402,893 System and method for improved auto-boating
According to one embodiment of the invention, a system used in auto-boating includes a tape substrate supported by a boat. The tape substrate includes a pair of...
US-7,402,880 Isolation layer for semiconductor devices and method for forming the same
According to one embodiment of the present invention, a semiconductor device includes a first layer of dielectric material disposed upon an upper surface of a...
US-7,402,878 Packaging method for microstructure and semiconductor devices
A novel method of packaging electronic devices (e.g. any device that receives or transmits electronic signals) including microelectromechanical devices,...
US-7,402,874 One time programmable EPROM fabrication in STI CMOS technology
The formation of a one time programmable (OTP) transistor based electrically programmable read only memory (EPROM) cell (100) is disclosed. The cell (100)...
US-7,402,535 Method of incorporating stress into a transistor channel by use of a backside layer
The present invention provides the method includes forming source/drain regions 170 in a semiconductor wafer substrate 110 adjacent a gate structure 130 located...
US-7,402,524 Post high voltage gate oxide pattern high-vacuum outgas surface treatment
The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.