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Patent # Description
US-7,397,410 Input tracking high-level multibit quantizer for delta-sigma ADC
A quantization circuit includes a plurality of resistors, a plurality of tap points, and a plurality of coarse comparators. Each coarse comparator has a first...
US-7,397,107 Ferromagnetic capacitor
An integrated circuit capacitor having a bottom plate 50a, a dielectric layer 250', and a ferromagnetic top plate 20a.
US-7,397,085 Thermal coupling of matched SOI device bodies
Performance matching devices in SOI are improved by thermally isolating matched devices within a continuous body of active material. Matched devices are isolated...
US-7,397,046 Method for implanter angle verification and calibration
Methods (300, 400) are described for calibrating the implantation angle of an ion implanter utilized in the manufacture of semiconductor products. One method...
US-7,396,755 Process and integration scheme for a high sidewall coverage ultra-thin metal seed layer
The present invention provides a method of forming a metal seed layer 100. The method includes physical vapor deposition of seed metal 200 within an opening 140...
US-7,396,728 Methods of improving drive currents by employing strain inducing STI liners
A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard...
US-7,396,722 Memory device with reduced cell area
The present invention provides for a memory device comprising a bulk substrate. A first lightly doped region is formed in the bulk substrate. A first active...
US-7,396,716 Method to obtain fully silicided poly gate
The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layer 610 over gate...
US-7,395,471 Connection of auxiliary circuitry to tap and instruction register controls
The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG...
US-7,395,467 Remove signal from TAP selection circuitry to multiplexer control circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that is...
US-7,395,413 System to dispatch several instructions on available hardware resources
A processor (e.g., a co-processor) capable of executing instructions sequentially, comprises at least two functional hardware resources. When two instructions...
US-7,395,307 Carry look-ahead circuit and adder using same
A carry look-ahead circuit for an adder to decrease circuit size and power consumption. The carry look-ahead circuit is composed of 2-input NAND gates 101, 102,...
US-7,394,877 Low-power packet detection using decimated correlation
A method and apparatus is presented for detecting the presence of a packet being transmitted on a communications medium using self-correlation of samples taken...
US-7,394,876 Enhanced channel estimator, method of enhanced channel estimating and an OFDM receiver employing the same
The present invention provides an enhanced channel estimator for use with an orthogonal frequency division multiplex (OFDM) receiver employing scattered pilot...
US-7,394,875 Beaulieu series approach to optimal UMTS RACH preamble detection estimation
A method for preamble detection in mobile unit to base unit wireless telephony sets a preamble detection threshold based upon a Beaulieu series computation...
US-7,394,867 Code division multiple access wireless system with closed loop mode using ninety degree phase rotation and...
A wireless communication system (10). The system comprises a user station (12). The user station comprises despreading circuitry (22) for receiving and...
US-7,394,794 Traffic identifier field usage in a polling frame in a packet-based wireless network
An access point in a wireless network transmits polling frames to node wherein the polling frame includes a traffic identifier (TID) value that corresponds to a...
US-7,394,597 SLM projection display with series DMD illuminator
The addition of DMD illumination modulator(s) 702 in series with projection SLM(s) 706/709 to produce high-performance projection displays with improved optical...
US-7,394,412 Unified interleaver/de-interleaver
An interleaver/de-interleaver that may be used for multiple interleaving algorithms and look up tables (LUTs) of one or more interleaving standards. In at least...
US-7,394,316 High speed, high current gain voltage buffer and method
An amplifying circuit which may be useful in a diamond buffer amplifier or operational amplifier includes an input transistor including an emitter, a collector,...
US-7,394,140 Micromirror array device with electrostatically deflectable mirror plates
Disclosed herein is a micromirror array device that comprises an array of reflective deflectable mirror plates each being associated with one single addressing...
US-7,393,787 Formation of nitrogen containing dielectric layers having a uniform nitrogen distribution therein using a high...
The present invention provides a method for manufacturing a gate dielectric, a method for manufacturing a semiconductor device, and a method for manufacturing an...
US-7,393,719 Increased stand-off height integrated circuit assemblies, systems, and methods
Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for...
US-7,392,431 Emulation system with peripherals recording emulation frame when stop generated
In-circuit-emulation of an integrated circuit includes a digital data processor capable of executing program instructions. A first debug event is detected during...
US-7,392,416 Method for controlling power consumption associated with a processor
A method for controlling power consumption associated with a processor in which, depending on the respective embodiment, a relative amount of idle time, activity...
US-7,392,269 Conditional garbage based on monitoring to improve real time performance
A system comprising a counter adapted to monitor the memory consumption of the allocated memory resources. Upon reaching or surpassing the memory resource...
US-7,391,975 Method of synchronizing servo timing in an optical wireless link
A technique for synchronizing the servo control systems between two optical wireless links (OWLs) that are in communication with one another. This...
US-7,391,915 Cache friendly method for performing inverse discrete wavelet transform
This invention is a method for inverse Wavelet transform using a breadth-first output data calculation which uses input data to calculate at least one output...
US-7,391,820 Multitone power spectral density
A method of transmit power adjustment in multitone communication systems is performed by changing a power spectral density for each subchannel k the power...
US-7,391,553 Low cost torsional hinge mirror package with non-rotating magnetic drive
A torsional hinge structure for supporting a functional surface such as a mirror is disclosed. The structure includes at least one torsional hinge extending...
US-7,391,344 High speed data recording with input duty cycle distortion
Data from both a positive edge sample and negative edge sample are used to determine a data bit. The primary and secondary clocks capture two copies of the data....
US-7,391,264 Amplifier
The objective of the invention is to automatically and dynamically change the slew rate corresponding to the change rate and amplitude of the input signal. In...
US-7,391,262 Circuit and method for driving bulk capacitance of amplifier input transistors
Amplifier circuitry includes an input stage having a transconductance stage including first and second input transistors and a first tail current source, gates...
US-7,391,241 Bidirectional deglitch circuit
A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output...
US-7,391,195 Self-oscillating boost DC-DC converters with current feedback and digital control algorithm
In a method and system for controlling a direct current to direct current (DC-DC) converter includes an inductor coupled to receive a voltage input at an input...
US-7,391,111 Systems and methods for maintaining performance at a reduced power
Systems and methods are provided for maintaining performance of an integrated circuit at a reduced power. The systems and methods employ a performance monitor...
US-7,390,700 Packaged system of semiconductor chips having a semiconductor interposer
A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the...
US-7,389,466 ECC in computer system with associated mass storage device, and method for operating same
A computer system (10) and method are presented for performing ECC corrections on data contained in a mass data storage device (20). The computer system (10) has...
US-7,389,456 IC with linking module in series with TAP circuitry
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for...
US-7,389,455 Register file initialization to prevent unknown outputs during test
A system and method for initializing a register file during a test period for an integrated circuit, wherein the register file has one or more input ports. A...
US-7,389,446 Method to reduce soft error rate in semiconductor memory
A method for reducing soft error rates in semiconductor memory. In one embodiment, memory is partitioned into a) boot and download memory, b) program memory and...
US-7,389,438 Method for detecting temperature and activity associated with a processor and using the results for controlling...
A method for detecting temperature and activity associated with a processor, results of the detecting being used for controlling power dissipation associated...
US-7,389,317 Long instruction word controlling plural independent processor operations
A data processing apparatus including a multiplier unit forming a product from L bits of each two data buses of N bits each N is greater than L. The multiplier...
US-7,389,052 Calibration method for station orientation
In optical wireless networks, light beams are transmitted over-the-air and maximum performance is achieved when light beams are aligned with corresponding light...
US-7,388,918 Apparatus and method for the transparent upgrading of technology and applications in digital radio systems...
In a digital radio system including a transmitter unit and at least one receiver unit, changes to the system can implemented without modifying the hardware...
US-7,388,907 Frequency domain equalization
A radio receiver 102 is provided. The radio receiver 102 comprises one or more data Fast Fourier Transformers, each data Fast Fourier Transformer operable to...
US-7,388,899 Spreading code structure for ultra wide band communications
The ultra wide band communication system of the present invention includes a transmitter (station) and a receiver (station). The transmitter and the receiver...
US-7,388,524 Enhancing signal to noise ratio of an interpolated signal
Providing interpolated signals with enhanced signal-to-noise-ratio (SNR). In an embodiment, for each digital sample (of an analog signal) having strength Dn, N...
US-7,388,271 Schottky diode with minimal vertical current flow
A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant...
US-7,387,960 Dual depth trench termination method for improving Cu-based interconnect integrity
A trench is formed in a low K dielectric (100) over a plurality of vias (120) also formed in the low K dielectric layer (100). The vias are separated by a...
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