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Patent # Description
US-7,402,514 Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and...
An embodiment of the instant invention is a method of providing a connection between a first conductor and a second conductor wherein the first conductor is...
US-7,402,458 Stress relieved flat frame for DMD window
An improved window frame and window piece for a micromirror assembly is disclosed herein. The window frame includes a stress-relieving contour positioned in the...
US-7,402,270 Method and system for integrated circuit packaging
According to one embodiment of the invention, a mold tool for packaging integrated circuits includes a first mold press die including a first non-planar surface...
US-7,401,875 Inkjet printhead incorporating a memory array
A thermal inkjet printhead 100 of the present invention includes a heating element 110, an ink chamber, control circuitry 108, an ink reservoir, and a memory...
US-7,400,903 Wireless communications system using both licensed and unlicensed frequency bands
A communications system including devices (10, 20) for transmitting and receiving wireless communications over licensed and unlicensed bands is disclosed. On the...
US-7,400,870 Hardware loop for automatic gain control
A hardware control loop (19) derives an AGC setting for a communication receiver based on signal strength information (16), without incurring program execution...
US-7,400,608 Method and apparatus for spread spectrum interference cancellation
The interference cancellation (IC) system (500) includes a plurality of IC units, for which IC is applied. Each IC unit has its spread spectrum code generator,...
US-7,400,523 8T SRAM cell with higher voltage on the read WL
The present invention provides circuitry for writing to and reading from an SRAM cell core, an SRAM cell, and an SRAM device. In one aspect, the circuitry...
US-7,400,130 Integrated circuit device
An integrated circuit device comprises internally on-chip an oscillator with a signal output. The device has a reference clock input, a first counter with a...
US-7,400,128 Current-mode bandgap reference voltage variation compensation
A circuit and method for reducing the variation of a reference voltage as a function of resistivity .rho. in a current-mode bandgap reference circuit generating...
US-7,400,121 Soft-start system for voltage regulator and method of implementing soft-start
A system and method to provide a slow start up voltage, such as that can slowly ramp up or down by cyclically coupling a pair of associated energy storage...
US-7,400,064 DC/DC power converter
A switching regulation system and control scheme efficiently enables driving multiple loads from a common energy storage element, such as an inductor. The...
US-7,400,025 Integrated circuit inductor with integrated vias
Integrated circuit inductors (5) are formed by interconnecting various metal layers (10) in an integrated circuit with continuous vias (200). Using continuous...
US-7,398,493 Isolated pwell tank verification using node breakers
A technique for checking a layout design of an integrated circuit is disclosed. The technique has application to converting the design of a circuit from...
US-7,397,870 Ultra-wideband (UWB) receiver
System and method for maximizing a signal strength of a received signal pulse. A preferred embodiment comprises a self-adjusting correlator/integrator (for...
US-7,397,779 Minimizing handoffs and handoff times in wireless local area networks
A method for reducing the number of channels that are scanned during a handoff situation for a wireless endpoint station in a wireless local area network (WLAN),...
US-7,397,410 Input tracking high-level multibit quantizer for delta-sigma ADC
A quantization circuit includes a plurality of resistors, a plurality of tap points, and a plurality of coarse comparators. Each coarse comparator has a first...
US-7,397,107 Ferromagnetic capacitor
An integrated circuit capacitor having a bottom plate 50a, a dielectric layer 250', and a ferromagnetic top plate 20a.
US-7,397,085 Thermal coupling of matched SOI device bodies
Performance matching devices in SOI are improved by thermally isolating matched devices within a continuous body of active material. Matched devices are isolated...
US-7,397,046 Method for implanter angle verification and calibration
Methods (300, 400) are described for calibrating the implantation angle of an ion implanter utilized in the manufacture of semiconductor products. One method...
US-7,396,755 Process and integration scheme for a high sidewall coverage ultra-thin metal seed layer
The present invention provides a method of forming a metal seed layer 100. The method includes physical vapor deposition of seed metal 200 within an opening 140...
US-7,396,728 Methods of improving drive currents by employing strain inducing STI liners
A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard...
US-7,396,722 Memory device with reduced cell area
The present invention provides for a memory device comprising a bulk substrate. A first lightly doped region is formed in the bulk substrate. A first active...
US-7,396,716 Method to obtain fully silicided poly gate
The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layer 610 over gate...
US-7,395,471 Connection of auxiliary circuitry to tap and instruction register controls
The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG...
US-7,395,467 Remove signal from TAP selection circuitry to multiplexer control circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that is...
US-7,395,413 System to dispatch several instructions on available hardware resources
A processor (e.g., a co-processor) capable of executing instructions sequentially, comprises at least two functional hardware resources. When two instructions...
US-7,395,307 Carry look-ahead circuit and adder using same
A carry look-ahead circuit for an adder to decrease circuit size and power consumption. The carry look-ahead circuit is composed of 2-input NAND gates 101, 102,...
US-7,394,877 Low-power packet detection using decimated correlation
A method and apparatus is presented for detecting the presence of a packet being transmitted on a communications medium using self-correlation of samples taken...
US-7,394,876 Enhanced channel estimator, method of enhanced channel estimating and an OFDM receiver employing the same
The present invention provides an enhanced channel estimator for use with an orthogonal frequency division multiplex (OFDM) receiver employing scattered pilot...
US-7,394,875 Beaulieu series approach to optimal UMTS RACH preamble detection estimation
A method for preamble detection in mobile unit to base unit wireless telephony sets a preamble detection threshold based upon a Beaulieu series computation...
US-7,394,867 Code division multiple access wireless system with closed loop mode using ninety degree phase rotation and...
A wireless communication system (10). The system comprises a user station (12). The user station comprises despreading circuitry (22) for receiving and...
US-7,394,794 Traffic identifier field usage in a polling frame in a packet-based wireless network
An access point in a wireless network transmits polling frames to node wherein the polling frame includes a traffic identifier (TID) value that corresponds to a...
US-7,394,597 SLM projection display with series DMD illuminator
The addition of DMD illumination modulator(s) 702 in series with projection SLM(s) 706/709 to produce high-performance projection displays with improved optical...
US-7,394,412 Unified interleaver/de-interleaver
An interleaver/de-interleaver that may be used for multiple interleaving algorithms and look up tables (LUTs) of one or more interleaving standards. In at least...
US-7,394,316 High speed, high current gain voltage buffer and method
An amplifying circuit which may be useful in a diamond buffer amplifier or operational amplifier includes an input transistor including an emitter, a collector,...
US-7,394,140 Micromirror array device with electrostatically deflectable mirror plates
Disclosed herein is a micromirror array device that comprises an array of reflective deflectable mirror plates each being associated with one single addressing...
US-7,393,787 Formation of nitrogen containing dielectric layers having a uniform nitrogen distribution therein using a high...
The present invention provides a method for manufacturing a gate dielectric, a method for manufacturing a semiconductor device, and a method for manufacturing an...
US-7,393,719 Increased stand-off height integrated circuit assemblies, systems, and methods
Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for...
US-7,392,431 Emulation system with peripherals recording emulation frame when stop generated
In-circuit-emulation of an integrated circuit includes a digital data processor capable of executing program instructions. A first debug event is detected during...
US-7,392,416 Method for controlling power consumption associated with a processor
A method for controlling power consumption associated with a processor in which, depending on the respective embodiment, a relative amount of idle time, activity...
US-7,392,269 Conditional garbage based on monitoring to improve real time performance
A system comprising a counter adapted to monitor the memory consumption of the allocated memory resources. Upon reaching or surpassing the memory resource...
US-7,391,975 Method of synchronizing servo timing in an optical wireless link
A technique for synchronizing the servo control systems between two optical wireless links (OWLs) that are in communication with one another. This...
US-7,391,915 Cache friendly method for performing inverse discrete wavelet transform
This invention is a method for inverse Wavelet transform using a breadth-first output data calculation which uses input data to calculate at least one output...
US-7,391,820 Multitone power spectral density
A method of transmit power adjustment in multitone communication systems is performed by changing a power spectral density for each subchannel k the power...
US-7,391,553 Low cost torsional hinge mirror package with non-rotating magnetic drive
A torsional hinge structure for supporting a functional surface such as a mirror is disclosed. The structure includes at least one torsional hinge extending...
US-7,391,344 High speed data recording with input duty cycle distortion
Data from both a positive edge sample and negative edge sample are used to determine a data bit. The primary and secondary clocks capture two copies of the data....
US-7,391,264 Amplifier
The objective of the invention is to automatically and dynamically change the slew rate corresponding to the change rate and amplitude of the input signal. In...
US-7,391,262 Circuit and method for driving bulk capacitance of amplifier input transistors
Amplifier circuitry includes an input stage having a transconductance stage including first and second input transistors and a first tail current source, gates...
US-7,391,241 Bidirectional deglitch circuit
A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output...
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