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Patent # Description
US-7,362,380 Equilibrium based vertical sync phase lock loop for video decoder
The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync...
US-7,362,362 Reformatter and method
A programmable data reformatter reorders output from an image sensor to yield various formats. The reformatting applies to reduced resolution output from large...
US-7,362,250 Dynamic dither for sigma-delta converters
A sigma-delta converter having dynamic dithering that reduces or removes idle-channel tones and increase linearity of the converter. The dither is differentiated...
US-7,362,188 System-on-a-chip (SoC) clock management--a scalable clock distribution approach
System and method for providing clocks to digital circuitry with a need for multiple clocks. A preferred embodiment comprises an oscillator controller...
US-7,362,176 High efficiency linear amplifier
A linear amplifier is configured with a current-feedback amplifier followed by a voltage-feedback amplifier to drive a totem-pole output stage. The output stage...
US-7,362,152 Apparatus and method for digital phase control of a pulse width modulation generator for microprocessor/DSP in...
In a digital pulse width modulation generator unit, a phase register is coupled to the clocked counter providing the generator unit time base. In response to a...
US-7,362,120 Method and apparatus for die testing on wafer
An integrated circuit includes switching means for selectively connecting the bond pads to functional core logic and isolating the bond pads from second...
US-7,362,093 IC selectively connecting logic and bypass conductors between opposing pads
In a functional mode, the functional core logic of a die is connected to the input and output pads and the die performs its intended function. In a bypass mode,...
US-7,362,083 DC-DC converter with modulator circuit having a feed forward structure
A DC-DC converter with an inductor connected in series with a power transistor between first and second terminals of a DC supply source, and with a modulator...
US-7,362,058 Method and device for controlling the light intensity in a multi-lamp illumination device for a display panel
For controlling the light intensity in a multi-lamp illumination device an automatic sequencing of the PWM dimming distributes the burst dimming pulses during...
US-7,361,977 Semiconductor assembly and packaging for high current and low inductance
A device comprising a semiconductor chip (110) having a side edge (111) and a plurality of metal bond pads (120, 121) near the edge; the pads are aligned to form...
US-7,361,949 Method of making a haze free, lead rich PZT film
An embodiment of the invention is a method of fabricating a haze free, phase pure, PZT layer, 3, where a lead rich PZT film, 102, is formed over a phase pure...
US-7,361,599 Integrated circuit and method
A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with...
US-7,361,570 Semiconductor device having an implanted precipitate region and a method of manufacture therefor
The present invention provides a semiconductor device, a method of manufacture therefor and an integrated circuit including the same. The semiconductor device...
US-7,361,016 Temperature control assembly for use in etching processes and an associated retrofit method
A temperature control assembly for use in etching processes includes a housing, a cooling conduit, fasteners, and a mounting block. The fasteners couple to the...
US-7,360,905 Compact optical engine for very small personal projectors using LED illumination
According to various illustrative embodiments of the present invention, a device for a light projection system includes a single light emitting diode array...
US-7,360,902 System and method for light source modulation
In one embodiment, a method for modulating light in an image display system includes generating a plurality of light beams. The amount of light beams that are...
US-7,360,060 Using IMPDEP2 for system commands related to Java accelerator hardware
A processor (e.g., a co-processor) comprising a decoder adapted to decode instructions from a first instruction set in a first mode and a second instruction set...
US-7,359,813 Outlier screening technique
Multiple parameters of manufactured units are continually measured until some of the units fail, where failure can be accelerated by adjusting operating...
US-7,359,684 Wireless communication system with variable intermediate frequency transmitter
A wireless communication device (UST), comprising an input for receiving baseband data (I, Q) in a first signal having a first frequency. The device also...
US-7,359,430 CDMA multicode channel processing
A demodulator such as a Fast Hadamard Transform (FHT) based demodulator is used to demodulate all channels in a code space with code length equal to the data...
US-7,359,409 Packet loss concealment for voice over packet networks
A method to reduce memory requirements for a packet loss concealment algorithm in the event of packet loss in a receiver of pulse code modulated voice signals....
US-7,359,173 System and method for protecting IC components
One embodiment provides a system for protecting at least one component in an integrated circuit (IC). The system includes a disconnect element that is...
US-7,359,107 Analog MEMS with non-linear support
The disclosed embodiments reveal an analog MEMS device with a pivotal micromirror that is supported by one or more beams that provide non-linear resistance. An...
US-7,358,801 Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage
Equal common mode voltage is present at the input terminals of an operational amplifier with amplifies the residue signal in a stage of an ADC in two phases...
US-7,358,617 Bond pad for ball grid array package
A device (100) and a method (200) for controlling resin bleed, the device comprising a substrate (105) having a surface (107), an integrated circuit (115) having...
US-7,356,745 IC with parallel scan paths and compare circuitry
A scan test architecture facilitates low power testing of semiconductor circuits by selectively dividing the serial scan paths into shorter sections....
US-7,356,624 Interface between different clock rate components
A circuit for interfacing between a first component 11 operating at a first clock rate and a second component 12 operating at a second clock rate, wherein the...
US-7,356,424 Diagnostic compiler for pipeline analog-to-digital converter, method of compiling and test system employing the...
The present invention is directed to a diagnostic compiler for use with a pipeline analog-to-digital converter (ADC) having code sequences corresponding to...
US-7,356,107 Flying-adder frequency synthesizer-based digital-controlled oscillator and video decoder including the same
A video decoder (52, 152) including a digital-control oscillator (DCO) (60, 160) is disclosed. The DCO (60, 160) includes a first flying-adder frequency...
US-7,356,088 M-dimension M-PAM trellis code system and associated trellis encoder and decoder
An M-dimension M-PAM trellis code encoder, a method of encoding user bits and a decoder. In one embodiment, the encoder includes: (1) a convolutional encoder...
US-7,356,069 Spread spectrum demodulation using a subsampling communication receiver architecture
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
US-7,356,021 Increasing the throughput of voice over internet protocol data on wireless local area networks
A system and method are provided for improving the throughput of wireless networks, such as IEEE 802.11 networks. Individual devices in the network determine the...
US-7,355,976 Method and apparatus for providing retry control, buffer sizing and management
A retry algorithm determines the maximum number of transmissions and retransmissions that may be attempted for the frame in the head of a transmit queue or...
US-7,355,777 Energy storage structures using electromechanically active materials for micro electromechanical systems
System and method for storing energy using electromechanically active materials in micro electromechanical systems. A preferred embodiment comprises a movable...
US-7,355,655 Systems and methods for separating luma and chroma information in a composite video signal
Systems and method are provided for luma-chroma separation. A demodulator system demodulates a composite video signal to produce at least two baseband chroma...
US-7,355,430 Parallel scan distributors and collectors and process of testing integrated circuits
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
US-7,355,255 Nickel silicide including indium and a method of manufacture therefor
The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same....
US-7,354,865 Method for removal of pattern resist over patterned metal having an underlying spacer layer
A method of removing the pattern resist that remains on a microchip wafer after etching a patterned layer that is supported by a spacer layer. After the etch,...
US-7,354,854 Nickel silicide method and structure
Nickel silicide contact regions are formed on a source (2), drain (3) and polycrystalline silicon gate (5) of an integrated circuit transistor by annealing it...
US-7,354,853 Selective dry etching of tantalum and tantalum nitride
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in...
US-7,353,307 Linking addressable shadow port and protocol for serial bus networks
Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of...
US-7,353,217 Intelligent realtime management of processing resources
A method and system for ordering a priority for a function to receive any type of processing resources in a system that includes a plurality of functions. The...
US-7,352,823 Algorithm for computing distances to a received point in an ADSL system
Method for computing distances to received data points. A preferred embodiment comprises determining a first point on a grid nearest to the received point,...
US-7,352,820 DMT system with variable subchannel spacing in TCM ISDN noise
A device comprises a first component operable to produce a plurality of discrete multitone symbols based in part on a subchannel spacing and a cyclic extension...
US-7,352,818 Short and long sequence boundary detection algorithm for wireless LAN modems
A method for detecting a boundary between two sequences in a wireless local area network is presented that permits rapid detection of the boundary. The method...
US-7,352,801 Selecting one of multiple antennas to receive signals in a wireless packet network
Selecting one of multiple antennas to receive signals in a wireless packet network. Correlation value and gain needed to boost the signal up to a desired power...
US-7,352,691 Double difference phase detection
A method that allows a digital communications system to detect the presence of transmitted messages in noisy environments. The system includes an OFDM...
US-7,352,251 Systems and methods for suppressing feedback and reference noise in a phase lock loop circuit
Various systems and methods for clock management. As one example, a system for clock management is disclosed that includes a controllable oscillator, an...
US-7,352,231 Method and circuit for perturbing removable singularities in coupled translinear loops
A translinear network (34) has first (Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4) and second (Q.sub.4, Q.sub.3, Q.sub.5, Q.sub.6) translinear loops. A Trafton-Hastings...
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