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Over-current detection for a power field-effect transistor (FET)
A system and method is provided for detecting an over-current condition in a power field-effect transistor (FET). In one embodiment, an over-current detection...
Electro-migration (EM) and voltage (IR) drop analysis of integrated
circuit (IC) designs
Performing approximate analysis of modules based on corresponding layout files while requiring fewer computations than performing a transistor level simulation...
Systems and methods for improved memory scan testability
A method and system for testing a device that includes both a digital and analog portion. The digital portion includes a plurality of latch devices, and the...
Software controlled hard reset of mastering IPS
A system-on-chip integrated circuit includes a peripheral initialization register has a bit corresponding to each module. Each bit indicates a normal mode or a...
Multiply-accumulate modules and parallel multipliers and methods of
designing multiply-accumulate modules and...
A multiply-accumulate module (100) includes a multiply-accumulate core (120), which includes a plurality of Booth encoder cells (104a). The multiply-accumulate...
Correlating on-chip data processor trace information for export
In producing data processor emulation information, program counter values used by a data processor are provided in a program counter trace stream, and a...
Enhanced negative constraint calculation for event driven simulations
A technique to enable accurate timing and functional verification in a negative constraint calculation (NCC) implemented event-driven logic simulators when there...
Low-noise sigma-delta frequency synthesizer
A sample-and-hold (SAH) phase detector (PD) is clocked in such a way (using a reverse clocking mode) so as to avoid quantization noise increases due to folding...
Interpolator based clock and data recovery (CDR) circuit with digitally
programmable BW and tracking capability
The present invention facilitates clock and data recovery (330,716/718) for serial data streams (317,715) by providing a mechanism that can be employed to...
Channel monitoring for improved parameter selection in a communication
A method is provided for automatically improving throughput of an active channel in a communication system comprising: receiving input from one or more modules...
Random access memory based space time switch architecture
A data switching circuit (10). The data switching circuit comprises at least one input (10.sub.in) for receiving during a same time period a plurality of data...
Deinterleaving transpose circuits in digital display systems
The present invention provides a method and apparatus of converting a stream of pixel data in space and time into a stream of bitplane data. In particular, the...
Method for converting data from pixel format to bitplane format
This invention efficiently converts normal pixel data into bit plane data. A sequence of pack, bitwise shuffle, masking, rotate and merging operations transform...
Digital storage element architecture comprising dual scan clocks and reset
A digital storage element comprising a master transparent latch that receives functional data from a data input port and scan data from a scan input port and...
Single-supply voltage translator input having low supply current
A voltage translator circuit is disclosed herein that eliminates the need for two supply voltages to achieve voltage translation through the use of supplying a...
Circuit to observe internal clock and control signals in a receiver with
integrated termination and common mode...
A serial data receiver circuit includes a pair of differential input nodes, and receiver circuitry and a termination circuit coupled between the differential...
Masking layer in substrate cavity
A package that resists creation of particles in a package cavity. A package according to one embodiment of the present invention contains a mechanical device...
Application of different isolation schemes for logic and embedded memory
The present invention facilitates semiconductor device fabrication by providing mechanisms for utilizing different isolation schemes within embedded memory and...
Implementation of a secure computing environment by using a secure
bootloader, shadow memory, and protected memory
A computer system with a secure bootloading function is disclosed. Security logic (20) is implemented on-chip with a central processing unit (CPU) (10), and...
Method and system for determining the location of a potential defect in a
device based on a temperature profile
According to one embodiment of the invention a method for determining the location of a potential defect in a device includes scanning a surface of the device...
Wavelet analysis of one or more time domain reflectometry (TDR) signals to
determine one or more...
In one embodiment, a method for wavelet analysis of one or more time domain reflectometry (TDR) signals to determine one or more characteristics of one or more...
Efficient bit interleaver for a multi-band OFDM ultra-wideband system
An efficient bit interleaving scheme for a multi-band OFDM ultra-wideband (UWB) system. The encoded bits of the multi-band OFDM system are interleaved within...
Spectrally compatible mask for enhanced upstream data rates in DSL systems
A method and apparatus for providing extended upstream data transmission in a band having a lowest frequency f.sub.0 by an end user terminal unit in an...
Microelectromechanical devices with low inertia movable elements
A microelectromechanical device having a movable element with low mass inertia is disclosed herein. The movable element is held on a substrate such that the...
Apparatus and method for sigma delta signal treatment
A sigma delta signal treating apparatus includes: (a) a low pass filtered signal path including at least one low pass filter; and (b) a quantization noise...
Trading off visibility for volume of data when profiling memory events
When tracing memory events the required bandwidth may be reduced by forming a logical OR of several memory event signals to determine the location of memory...
Reliable high-voltage junction field effect transistor and method of
The present invention provides a high-voltage junction field effect transistor (JFET), a method of manufacture and an integrated circuit including the same. One...
System for ultraviolet atmospheric seed layer remediation
The present invention provides a system for removing organic contaminants (216) from a copper seed layer that has been deposited on a semiconductor substrate...
Stacked capacitor and method of fabricating same
The invention relates to a stacked capacitor (10) comprising a silicon base plate (16), a poly-silicon center plate (32) arranged above the base plate (16), a...
JTAG state machines with respective enable input and select input
A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
Apparatus and method for trace stream identification of a processor debug
When a DEBUG HALT signal is generated in a target processor during a test procedure, a debug halt sync marker is generated in a program counter trace stream. The...
Group decision rule in code tracking using a delay lock loop (DLL)
System and method for code acquisition in a wireless communications system with a delay lock loop. A preferred embodiment comprises assigning a delay lock loop...
Reducing the time to convert an analog input sample to a digital code in
an analog to digital converter (ADC)
A stage of a pipeline ADC which uses separate pairs of sampling network and amplifier (in a sample and hold circuit (SHA)) to provide inputs to quantizer (which...
Chopper-stabilized operational amplifier and method
An amplifier circuit includes an input chopping circuit for chopping first and second input signals, a transconductance stage for amplifying an output of the...
Leadframes for improved moisture reliability of semiconductor devices
A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (402) and a plurality of...
Method for improving reliability of copper interconnects
Doping copper interconnects (100) with silicon (115) has been shown to improve Electromigration and Via Stress Migration reliability. After copper (118) is...
Low profile, chip-scale package and method of fabrication
Disclosed is a semiconductor device that includes an electrically insulating, sheet-like substrate with first and second surfaces, at least one opening, and a...
Addressable tap domain selection circuit with TDI/TDO external terminal
This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial...
SRAM device and a method of operating the same to reduce leakage current
during a sleep mode
An SRAM device and a method of operating an SRAM device. In one embodiment, the SRAM device includes (1) an SRAM array coupled to row peripheral circuitry by a...
Methods for depositing, releasing and packaging micro-electromechanical
devices on wafer substrates
A projection system, a spatial light modulator, and a method for forming a MEMS device is disclosed. The spatial light modulator can have two substrates bonded...
Apparatus and method for affecting operation of a signal treating device
An apparatus for affecting operation of a signal treating device that is provided an operating voltage ranging between an upper voltage limit and a lower voltage...
Adaptive voltage control and body bias for performance and energy
A device for adaptively controlling a voltage supplied to circuitry in close proximity to the device, comprising a processing module and a first tracking element...
EEPROM with etched tunneling window
A method forming a current path in a substrate (322) having a first conductivity type is disclosed. The method includes forming an impurity region (314) having a...
Reduced hydrogen sidewall spacer oxide
An embodiment of the invention is a method of making a semiconductor structure 10 where the spacer oxide layer 90 is formed by a hydrogen free precursor CVD...
Semiconductor wafer cutting blade and method
The invention provides apparatus and methods for sawing and singulating individual devices from a silicon or glass-bonded semiconductor wafer. Using methods of...
Method of fixing frequency complex up-conversion phase and gain
A technique associated with transceiver systems solves transmitter impairments when the system has both receiver and transmitter operating with the same local...
Systems and methods for packet flow control
Systems and methods for transmitting packets and controlling packet flow are provided in wireless communication systems. A time stamping technique synchronizes...
Implementation for a 5 sample guard interval for multi-band OFDM
A sequence of data samples and a sequence of non-data samples are provided. Four input samples from one of the data samples and the non-data samples are selected...
Ferroelectric memory with wide operating voltage and multi-bit storage per
Apparatus and methods are described for a multi-level FeRAM memory device. Using write and read circuits associated with the memory device, multiple data states...
Integrated circuit having independently formed array and peripheral
The invention comprises a method of forming an integrated circuit, the method comprising: (1) forming a first dielectric layer disposed outwardly from a...