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Patent # Description
US-9,520,307 Method and nozzle for hermetically sealed packaged devices
Microelectromechanical systems (MEMS) such as digital micromirror devices (DMD) are manufactured in arrays. Covers, packages, and lids are placed around each...
US-9,519,839 Illumination estimation using natural scene statistics
A method for estimating illumination of an image captured by a digital system is provided that includes computing a feature vector for the image, identifying at...
US-9,519,617 Processor with instruction variable data distribution
A vector processor includes a plurality of execution units arranged in parallel, a register file, and a plurality of load units. The register file includes a...
US-9,519,025 Tap and aux circuitry with multiplexers on TDI, TDO, AUXI/O
The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG...
US-9,518,959 Structural health monitoring system and method
A method includes: transmitting, via a signal generator, an electrical driving signal, the electrical driving signal having a mean square error; transmitting,...
US-9,517,938 Applying spatial gradient magnetic field to metallic/semiconducting SWNTs in fluid
A process of sorting metallic single wall carbon nanotubes (SWNTs) from semiconducting types by disposing the SWNTs in a dilute fluid, exposing the SWNTs to a...
US-9,516,663 Data and control multiplexing in PUSCH in wireless networks
Transmission of information in a wireless network is performed by allocating a channel from a transmitter to a receiver. The channel has at least one time slot...
US-9,516,580 Enabling down link reception of system and control information from intra-frequency neighbors without gaps in...
Simplified communication between user equipment and a neighboring cell not the primary cell is achieved by restricting the transmission parameters, such as...
US-9,516,500 ID-based control unit-key fob pairing
A method for pairing a key fob with a vehicle is provided. A pairing device and a key fob execute an ID authenticated key agreement protocol based on a KFID to...
US-9,515,672 Analog-to-digital converter
A system includes an analog-to-digital converter receiving a plurality of input signals. One particular input signal has a particular analog value and the...
US-9,515,667 Oscillator with frequency control loop
Circuitry for providing an oscillating output signal. The circuitry comprises a transconductance circuit having a first input, a second input, and an output....
US-9,515,655 Multiplexing voltages on functional input pin with pass device
A circuit includes an input pin connected to an integrated circuit (IC) that receives an input voltage that is provided to a first voltage circuit within the...
US-9,515,604 Driving crystal oscillator startup at above, below and operating frequency
A circuit includes a crystal oscillator to generate an output frequency for a circuit. A driving oscillator generates a startup signal having a driving...
US-9,515,367 Radiating sub-terahertz signal from tapered metallic waveguide into dielectric waveguide
A metallic waveguide is mounted on a multilayer substrate. The metallic waveguide has an open end formed by a top, bottom and sides configured to receive a core...
US-9,515,366 Printed circuit board dielectric waveguide core and metallic waveguide end
A dielectric waveguide may be manufactured by forming a set of parallel channels in a planar sheet that has a lower dielectric constant value. The set of...
US-9,515,363 Dielectric waveguide (DWG) filter having curved first and second DWG branches where the first branch forms a...
Signals on a dielectric waveguide are filtered to pass or block selected frequencies. A combined signal is received in the DWG, wherein the combined signal...
US-9,515,059 Proximity sensor having light-blocking structure in leadframe and method of making same
A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is...
US-9,515,009 Packaged semiconductor device having leadframe features preventing delamination
A semiconductor device has a leadframe with a first (401a) and a parallel second surface, and an assembly pad (410) bordered by two opposing sides, which...
US-9,514,059 Hiding page translation miss latency in program memory controller by selective page miss translation prefetch
This invention hides the page miss translation latency for program fetches. In this invention whenever an access is requested by CPU, the L1I cache controller...
US-9,514,058 Local page translation and permissions storage for the page window in program memory controller
This invention provides a current page translation register storing virtual to physical address translation data for a single current page and optionally access...
US-9,513,741 Low noise capacitive sensor with integrated bandpass filter
A bandpass sense amplifier circuit (FIG. 2A) is disclosed. The circuit includes a capacitor (C0) having a first terminal coupled to receive an input signal...
US-9,513,456 Lens driver circuit with ringing compensation
A lens driver circuit determines the resonant frequency at a number of positions that a lens can move to so that the lens can move from an old position to a new...
US-9,513,374 Measurement error covariance in GNSS receiver circuitry, pseudoranges, reference position
A Global Navigation Satellite System (GNSS) receiver determines a measurement error covariance from a reference position and a set of measured pseudoranges from...
US-9,513,336 Tap dual port router circuitry with update and capture inputs
This disclosure describes a test architecture that supports a common approach to testing individual die and dies in a 3D stack arrangement. The test...
US-9,510,391 Network configuration for devices with constrained resources
A method includes receiving a wireless beacon from an ad hoc network at a wireless device, wherein the wireless beacon includes a data structure that encodes at...
US-9,510,319 Method and system for location estimation
Several methods and systems for location estimation are disclosed. In an embodiment, the method includes performing a primary wireless scan to identify a first...
US-9,510,288 Concurrent, reconfigurable, low power harmonic wake-up and main radio receiver
A wireless receiver includes a receiver front-end where the input of the LNA and the mixer have separate main radio and wake-up modes, where same DC voltage is...
US-9,510,139 Phy layer options for body area network (BAN) devices
In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN)...
US-9,510,138 PHY layer parameter for body area network (BAN) devices
In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN)...
US-9,509,945 Automatic program clock reference correction
A data stream that contains periodic time reference values referenced to a first reference clock is received for transcoding. The received data stream is...
US-9,509,909 Method and apparatus for a surround view camera system photometric alignment
A method, apparatus and a surround view camera system. The method includes extracting block samples from at least one of a composite view geometric LUT, input...
US-9,509,325 Diagnostic monitoring for analog-to-digital converters
The present disclosure describes a channel selector for use in an analog-to-digital converter that has a sampling circuit for converting an analog input to a...
US-9,509,323 Fractional-N synthesizer with pre-multiplication
A fractional-N frequency synthesizer that suppresses integer boundary spurs. A frequency synthesizer includes a fractional-N phase locked loop (PLL) and a...
US-9,509,220 Bi-modal voltage converter
A bi-modal voltage converter and associated method for reducing stress on secondary rectifiers and decreasing switching losses. An embodiment of the voltage...
US-9,508,869 High voltage depletion mode N-channel JFET
An integrated circuit and method having a JFET with a buried drift layer and a buried channel in which the buried channel is formed by implanting through...
US-9,508,708 Poly resistor for metal gate integrated circuits
An integrated circuit containing a metal gate transistor and a thin polysilicon resistor may be formed by forming a first layer of polysilicon and removed it in...
US-9,508,707 Quantum well-modulated bipolar junction transistor
A semiconductor device includes a quantum well-modulated bipolar junction transistor (QW-modulated BJT) having a base with an area for a modulatable quantum...
US-9,508,633 High performance power transistor having ultra-thin package
A field-effect transistor package includes a leadframe with a first linear thickness (150a) and a leadframe pad (151) of a reduced thickness; a first terminal...
US-9,508,601 Method to form silicide and contact at embedded epitaxial facet
An integrated circuit with an MOS transistor abutting field oxide and a gate structure on the field oxide adjacent to the MOS transistor and a gap between an...
US-9,508,018 Systems and methods for object detection
An object detection system and a method of detecting an object in an image are disclosed. In an embodiment, a method for detecting the object includes computing...
US-9,507,679 At speed tap with dual port router and command circuit
This disclosure describes different ways to improve the operation of a device's 1149.1 TAP to where the TAP can perform at-speed Update & Capture, Shift &...
US-9,507,600 Processor loop buffer
A method and apparatus for executing program loops. A processor, includes an execution unit and an instruction fetch buffer. The execution unit is configured to...
US-9,507,409 Transition rate controlled bus driver circuit with reduced load sensitivity
A bus driver circuit (FIG. 2) is disclosed. The circuit includes a signal lead of a bus (200) and a reference terminal (Vss). A first transistor (MN0) has a...
US-9,506,985 TMS/TDI and SIPO controller circuitry with tap and trace interfaces
An address and command port interface selectively enables JTAG TAP domain operations and Trace domain operations within an IC. The port carries TMS and TDI...
US-9,506,882 Portable fluoroscopy system with spatio-temporal filtering
A system for processing real-time fluoroscopy image sequences. A first image frame is loaded into an upper level memory of a hierarchical memory system that is...
US-9,503,737 Low-complexity two-dimensional (2D) separable transform design with transpose buffer management
Methods are provided for reducing the size of a transpose buffer used for computation of a two-dimensional (2D) separable transform. Scaling factors and clip...
US-9,503,734 Signaling signed band offset values for sample adaptive offset (SAO) filtering in video coding
A method for signaling sample adaptive offset (SAO) band offset syntax elements in a video encoder is provided that includes receiving a plurality of band...
US-9,503,722 Line-based compression for digital image data
A method of compressing digital image data is provided that includes selecting an entropy code for encoding a line of pixels in the digital image data, wherein...
US-9,503,717 Context adaptive binary arithmetic coding (CABAC) with scalable throughput and coding efficiency
A method for encoding a video sequence is provided that includes entropy encoding syntax elements representative of transform coefficients generated as the...
US-9,503,265 Scheduler and context cache controller and storage for security context
An electronic circuit (200) includes one or more programmable control-plane engines (410, 460) operable to process packet header information and form at least...
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