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Method and structure to reduce risk of gold embrittlement in solder joints
A method for reducing gold embrittlement in solder joints, and a copper-bearing solder according to the method, are disclosed. Embodiments of the invention...
Work function control of metals
Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal, which is a `mid gap` metal, is manipulated in...
Lubricating micro-machined devices using fluorosurfactants
A method of lubricating MEMS devices using fluorosurfactants 42. Micro-machined devices, such as a digital micro-mirror device (DMD.TM.) 940, which make repeated...
Power profiling system and method for correlating runtime information
Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of...
Automatic language independent triphone training using a phonetic table
A method for training acoustic models for a new target language is provided using a phonetic table, which characterizes the phones, used in one or more reference...
A wireless system (e.g., Bluetooth, WCDMA, etc.) with multiple antenna communication channel eigenvector weighted transmissions including possibly differing...
Memory array with a delayed wordline boost
Methods and a circuit for writing to an SRAM memory cell of an array are discussed that provide improved static noise margin, and minimal risk of data upsets...
Pulsed LED scan-ring array for boosting display system lumens
A display apparatus 200 includes a substrate 219 and a number of light emitting diodes (LEDs) 202 coupled to the substrate. An optical element 207 such as a...
Decoding variable length codes while using optimal resources
In one aspect, code-words of variable lengths are decoded using a multi-stage decoding approach, with different stages being of different sizes (and thus...
Versatile system for cross-lateral junction field effect transistor
The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage,...
Method for robust, flexible reconfiguration of transceive parameters for
A communications system 400 includes a transmitter 410 that transmits information to a receiver 440 over communication channels 420 and 430. The receiver 440...
Plural circuit selection using role reversing control inputs
Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode...
Methods for depositing, releasing and packaging micro-electromechanical
devices on wafer substrates
A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from...
Defective pixel filtering for digital imagers
Defective pixels in a CMOS array give rise to spot noise that diminishes the integrity of the resulting image. Because CMOS arrays and digital logic can be...
Method and system for amplifying a signal
According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that...
Lateral bipolar junction transistor in CMOS flow
An improved lateral bipolar junction transistor and a method of forming such a lateral bipolar transistor without added mask in CMOS flow on a p-substrate are...
Minimizing computational complexity in cell-level noise characterization
Reducing the number of computations required to pre-characterize cells in a cell-library. In an embodiment, a worst case vector which propagates most noise on an...
JTAG circuit transferring data between devices on TMS terminals
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication...
System and method for reducing clock skew
In one embodiment, a method for balancing clock signals in a clock tree includes, at a register, receiving a divided input clock signal and a non-divided input...
Real time interrupt module for operating systems and time triggered
An interrupt timer module comprises a prescale counter (PSC) incremented by a real-time interrupt clock signal (RTICLK), a prescale compare value register (CVR)...
Processor having real-time power conservation
A processor, comprising a monitor for, depending on the respective embodiment, measuring a relative amount of idle time, activity time, or idle time and activity...
Automatic line pair detection in a modem
The present invention provides a solution that automatically detects and connects the properly terminated line pair and then allows modem training to proceed....
Signal processing approach for channel coding based on
An inter-symbol-interference (ISI) coder with mapper and linear filter and a technique of channel encoding deliberately inserts inter-symbol-interference (ISI)...
Network manager for a hybrid network environment
A system, apparatus and method are disclosed for implementing a managed network in a hybrid network environment to support nodes having managed network...
Integrated reverse battery protection circuit for an external MOSFET
A reverse battery protection circuits that provides an integrated reverse battery condition solution for protection of external NMOS switches during the reverse...
Automatic level control (ALC) for video signals
Disclosed are methods and systems for automatic level control (ALC) in a video signal processing system. The new ALC of the invention takes into account the gain...
High-speed, high-resolution voltage output digital-to-analog converter and
A string DAC having 2.sup.M string resistors includes a plurality of switches for selectively coupling, according to the decoding of an M-bit MSB subword, the...
Circuit for detecting transitions on either of two signal lines referenced
at different power supply levels
A transition detect circuit includes: a first input port referenced to a first supply voltage node and a second input port referenced to a second supply voltage...
System and method for IDDQ measurement in system on a chip (SOC) design
System and method for detecting transistor failure in large-scale integrated circuits by measuring IDDQ. A preferred embodiment comprises a switch structure for...
Active dropout optimization for current mode LDOs
A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter...
Guardwall structures for ESD protection
A semiconductor circuit for protecting an I/O pad against ESD events comprising a pMOS transistor (510) in a first n-well (511) having its source connected to...
Plasma treatment for silicon-based dielectrics
An embodiment of the invention is a method of manufacturing a semiconductor wafer. The method includes depositing spin-on-glass material over the semiconductor...
Microelectromechanical device packages with integral heaters
A microelectromechanical device package with integral a heater and a method for packaging the microelectromechanical device are disclosed in this invention. The...
System and method for modeling an integrated circuit system
The teachings of the present invention provide a method for modeling an integrated circuit system including a microchip, an integrated circuit package, and a...
Data retaining boundary scan cell
Scan testing of plural target electrical circuits, such as circuits 1 through N, becomes accelerated by using the scan test response data output from one...
VLSI architecture and implementation for single cycle insertion of
multiple records into a priority sorted list
A data processing apparatus simultaneously sorts n input data words into a sorted list of m list entries. The apparatus includes a pre-sorting network sorting...
Low-complexity hierarchical decoding for communications systems using
multidimensional QAM signaling
A reduced search space minimum distance decoding method provides average probability of error performance close to optimal MAP decoding. The decoding algorithm...
Parallel interference cancellation device for multi-user CDMA systems
This invention provide parallel interference cancellation for wireless communication base stations. Received user inputs symbols are spread by means of...
ESD protection for RF power amplifier circuits
An electrostatic discharge (ESD) device for protecting a power amplifier circuit is disclosed. The ESD device comprises a first ESD protection circuit coupled...
Method and apparatus for rendering large patterns in a small memory
A method of performing a pattern fill operation of a pattern into a clipping region divides dividing the pattern into a plurality of bands. For each band the...
Methods and apparatus for converting an orthogonal pixel format to a
diamond pixel format
Apparatus for converting orthogonal data to a format suitable for displaying the image on a diamond-shaped pixel array. A stream of digital data formatted for...
Pixel data preprocessing methods and systems
Methods and systems are disclosed for preprocessing video display pixel data. A preprocessor is provided with a selectable gamma correction mode and a selectable...
Fully differential large swing variable gain amplifier
The fully differential large swing variable gain amplifier circuit includes: a first 5-transistor transconductor having a common mode node; and a second...
Systems for pseudo-BD modulation
An amplifier system in accordance with an aspect of the present invention comprises a switching amplifier that drives a load with a pulse-width modulated (PWM)...
Expeditious and low cost testing of RFID ICs
System and method for integrated circuit manufacturing. A preferred embodiment comprises transmitting a first set of data to integrated circuits (ICs) while they...
Semiconductor device with an analog capacitor
A method for manufacturing a semiconductor device that comprises forming an oxide layer over a substrate. A polysilicon layer is disposed outwardly from the...
Tailoring channel strain profile by recessed material composition control
The present invention facilitates semiconductor fabrication by providing methods of fabrication that tailor applied strain profiles to channel regions of...
Shallow trench isolation method
A method (200) of forming an isolation structure is presented, in which a hard mask layer (304, 308) is formed (204, 206) over the isolation and active regions...
Vertically stacked semiconductor device
A semiconductor device including a vertical assembly of semiconductor chips interconnected on a substrate with one or more metal standoffs providing a fixed...
Temperature control assembly for use in etching processes
A temperature control assembly for use in etching processes includes a housing, a cooling conduit, fasteners, and a mounting block. The fasteners couple to the...