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Patent # Description
US-7,272,750 Expert system for intelligent testing
A computer method for testing a test unit that includes receiving an output of the test unit into a testing system, providing an expert system operably connected...
US-7,272,523 Trimming for accurate reference voltage
A method for trimming reference voltage circuitry includes defining a desired target reference voltage for a set of at least one die. At least two reference...
US-7,272,358 Channelization scheme for wireless local area networks
A four channel wireless network channelization scheme is described that is particularly usable in the ISM frequency band between 2400 MHz and 2483.5 MHz. The...
US-7,272,156 Phased transmit architecture
A Phased Transmit Architecture that allows the embedded processor of an IEEE 802.11e wireless communication device to have a significant number of additional...
US-7,271,748 System and method for providing a thermometer coded output filter
Systems and methods are provided for providing a filtered, thermometer coded output signal from an N bit digital input, where N is an integer greater than one. A...
US-7,271,663 Operational amplifier output stage and method
An operational amplifier includes an input stage for producing a voltage signal in response to an input signal. An output stage includes an output transistor...
US-7,271,494 Adhesion by plasma conditioning of semiconductor chip surfaces
A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated...
US-7,271,462 Solid-state image sensing device
A solid-state image sensing device that is free of kTC noise, can eliminate black smear and dark current, has a larger numerical aperture, and can eliminate the...
US-7,271,030 Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers...
US-7,269,849 Method and system for access to development environment of another
A highly secure "Design Zones" system is described that promotes collaboration between a manufacturer and owner of compute systems and its partners such as...
US-7,269,848 Method and system for access to development environment of another in a secure zone
A "Design Zones" system provides a highly secure common resource computing environment or design zone with services on the common resource or design zone being...
US-7,269,769 AC propagation testing preventing sampling test data at Capture-DR state
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits...
US-7,269,707 Multiple patches to on-chip ROM in a processor with a multilevel memory system without affecting performance
A programmable address decoder is common to the on-chip ROM and on-chip RAM. The programmable address decoder conditionally routes accesses to portions of the...
US-7,269,670 Analog ethernet detector having first logic circuit and second logic circuit coupled to output signal detectors...
An analog Ethernet detector determines if an IEEE 1394b long haul application using Category 5 (CAT 5 UTP) cable, is connected to an Ethernet which share certain...
US-7,269,558 Decoding multiple HMM sets using a single sentence grammar
For a given sentence grammar, speech recognizers are often required to decode M sets of HMMs each of which models a specific acoustic environment. In order to...
US-7,269,528 Method evaluating threshold level of a data cell in a memory device
A method evaluating threshold of a data cell in a memory device including a programming locus coupled with the data cell for receiving a programming signal...
US-7,269,175 AAL2 transmitter for voice-packed and signaling management-packed interleaving on an ATM connection
The present invention provides an apparatus, system and method for transmitting asynchronous transfer mode (ATM) data cells on an ATM adaptation layer (AAL)...
US-7,268,934 Micromirror and post arrangements on substrates
A micromirror of a micromirror array of a spatial light modulator used in display systems comprises a mirror plate attached to a hinge that is supported by two...
US-7,268,837 Method and system for automated convergence and focus verification of projected images
A method and system that objectively measures the convergence and focus of a 2 or 3 spatial light modulator (SLM) projection display. The system uses five (5)...
US-7,268,571 Method for validating and monitoring automatic test equipment contactor
A method and apparatus is provided for characterizing a contactor for automated semiconductor device testing, the method first comprising placing the contactor...
US-7,268,561 USB attach detection for USB 1.1 and USB OTG devices
An apparatus for detection of a USB host or a USB OTG device being attached to Vbus connector terminal of a USB device includes an attach detection pull down...
US-7,268,415 Semiconductor device having post-mold nickel/palladium/gold plated leads
A semiconductor device having a leadframe comprised of a base metal (110, e.g., copper), a chip mount pad (103) and a plurality of lead segments (104). Each of...
US-7,268,399 Enhanced PMOS via transverse stress
In the present invention, a PMOS device comprises a channel region formed in {100} silicon with first and second source/drain region disposed on either side of...
US-7,268,394 JFET structure for integrated circuit and fabrication method
Junction field effect transistors (JFETs) can be fabricated with an epitaxial layer that forms a sufficiently thick channel region to enable the JFET for use in...
US-7,268,088 Formation of low leakage thermally assisted radical nitrided dielectrics
One or more aspects of the present invention relate to forming a dielectric suitable for use as a gate dielectric in a transistor. The gate dielectric is formed...
US-7,268,073 Post-polish treatment for inhibiting copper corrosion
Methods (102) are presented for protecting copper structures (26) from corrosion in the fabrication of semiconductor devices (2), wherein a thin semiconductor or...
US-7,268,045 N-channel LDMOS with buried P-type region to prevent parasitic bipolar effects
An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions,...
US-7,267,861 Solder joints for copper metallization having reduced interfacial voids
A metal interconnect structure (100) comprising a bond pad (101), which has copper with at least 70 volume percent composed of crystal grains expanding more than...
US-7,267,726 Method and apparatus for removing polymer residue from semiconductor wafer edge and back side
A method for cleaning a semiconductor device has the steps of securing a wafer (16) with a modified chuck (11) and applying a cleaning solution (18) to the...
US-7,266,824 Address space priority arbitration
A digital system and method of operation is provided in which several processors (400[]) are connected to a shared resource (432). Each processor has a...
US-7,266,619 Framework for high-performance hardware abstraction
In some embodiments, a system comprises a processor that executes an algorithm. Coupled to the processor is memory that stores the algorithm. In addition, the...
US-7,265,926 High speed hard disk drive with symmetric writer
A disk drive data storage system, comprising a magnetic disk a head for writing data to the disk, and circuitry for providing a first voltage (HWX) to a first...
US-7,265,892 Micromirror array devices with light blocking areas
Disclosed herein is a micromirror array device package having a light blocking area for reducing unexpected light scattering from the surfaces of the posts.
US-7,265,887 Two axis low inertia torsional hinged optical device
A low inertia two axis torsional hinged device formed from a single piece of silicon. The two axis torsional hinged device uses a pair of diametrally charged...
US-7,265,794 Managing the color temperature for a light source array
Providing color management includes receiving measurements of the intensity of colors. A light source generates light beams to yield the colors, where the light...
US-7,265,766 Method and system for adaptive bit depth enhancement for displays
According to one embodiment, a method for compensating for inadequate bit resolution in a light processing system includes receiving a plurality of values each...
US-7,265,694 System and method for successive approximation
A system and method for providing successive approximation, such as can be used by a successive approximation converter or by a coherent undersampling digitizer....
US-7,265,690 Simplified data recovery from high speed encoded data
The present invention facilitates data recovery without requiring selection of a sample phase. The data is recovered by sampling a received signal to obtain a...
US-7,265,679 Apparatus and method for indicating onset of high-voltage at an output locus of a signal converter device
An apparatus for indicating detection of an onset of a high-voltage condition at an output locus of a signal converter device, the signal converter device...
US-7,265,445 Integrated circuit package
An IC package includes a package body of non-conductive material. A conductive heat-sink pad includes an interior pad portion located within an interior of the...
US-7,265,443 Wire bonded semiconductor device having low inductance and noise
A semiconductor device has a semiconductor chip with a periphery and an IC organized in a core portion and a peripheral portion. The IC has a top level of...
US-7,264,179 Method and apparatus for MEMS device nebulizer lubrication system
A nebulization system, which creates a uniform fog of tiny suspended liquid droplets, to lubricate the surfaces of MEMS devices. These droplets fall over the...
US-7,263,684 Correcting a mask pattern by selectively updating the positions of specific segments
Correcting a mask pattern includes accessing the mask pattern segmented into segments. An attribute value is established for each segment, where the attribute...
US-7,263,617 Method and system for detecting a security violation using an error correction code
A system and method for detecting a security violation using an error correction code. Some illustrative embodiments may be a method used in a computing system...
US-7,263,455 Apparatus and methods for ferroelectric ram fatigue testing
Apparatus are provided for fatigue testing ferroelectric material in a wafer, including an on-chip oscillator to provide a bipolar waveform to a ferroelectric...
US-7,263,144 Method and system for digital equalization of non-linear distortion
A method is provided for equalization of nonlinear distortion in a distorted signal comprising the steps of: digitizing the distorted signal and passing the...
US-7,262,900 Utilizing a protective plug to maintain the integrity of the FTP shrink hinge
As robust hinge post structure for use with torsional hinged devices such as micromirrors and method of manufacturing is disclosed. The fabrication process uses...
US-7,262,894 Method for aligning bi-directional images in a mirror display
A mirror display system comprising a multiplicity of scan lines that are combined to generate an image. The multiplicity of scan lines are orthogonally...
US-7,262,817 Rear projection TV with improved micromirror array
In order to minimize light diffraction along the direction of switching and more particularly light diffraction into the acceptance cone of the collection...
US-7,262,716 Asynchronous sample rate converter and method
An asynchronous sample rate converter interpolates and filters a digital audio input signal to produce a filtered, up-sampled first signal. A FIFO memory...
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