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Patent # Description
US-1,007,5156 Synchronous clock generation using an interpolator
In some embodiments, an apparatus comprises a device clock configured to generate a device clock signal a synchronization (SYSREF) clock generation circuit...
US-1,007,5080 Three-level converter using an auxiliary switched capacitor circuit
In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first...
US-1,007,5076 Voltage converter with current steering
A voltage converter circuit includes a high side transistor, a high side driver coupled to a control input of the high side transistor, a low side transistor...
US-1,007,4639 Isolator integrated circuits with package structure cavity and fabrication methods
Disclosed examples include integrated circuits with a leadframe structure, a first circuit structure including a light source configured to generate a light...
US-1,007,3696 Streaming engine with cache-like stream data storage and lifetime tracking
A streaming engine employed in a digital data processor specifies a fixed read only data stream defined by plural nested loops. An address generator produces...
US-1,007,3478 Voltage regulator for a low dropout operational mode
A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal...
US-1,007,3167 High speed illumination driver for TOF applications
The disclosure provides a circuit. The circuit includes an amplifier and a digital to analog converter (DAC). The amplifier receives a reference voltage at an...
US-1,007,1400 Ultrasonic lens cleaning with travelling wave excitation
Disclosed examples include ultrasonic lens cleaning systems and driver circuits to clean a lens using four or more transducer segments mechanically coupled to...
US-1,007,0491 LED bypass and control circuit for fault tolerant LED systems
A light system (FIG. 2) is disclosed. The light system includes a plurality of series connected light emitting diodes (240-246). Each of a plurality of...
US-1,007,0385 Multi-band concurrent multi-channel receiver
A system of multiple concurrent receivers is described to process multiple narrow bandwidth wireless signals with arbitrary bandwidth and center frequency...
US-1,007,0152 Sample adaptive offset (SAO) parameter signaling
A method for sample adaptive offset (SAO) filtering and SAO parameter signaling in a video encoder is provided that includes determining SAO parameters for...
US-1,007,0106 Optical system designs for generation of light fields using spatial light modulators
In described examples, a method of creating multiple light images uses spatially-separated light sources, arranged in an array, operated in multiplexed fashion,...
US-1,006,9511 Lossless data compression
A method of data compression includes obtaining binary sensor data having rows with multi-bit data samples. The rows are divided into data groups each including...
US-1,006,9501 Set point adjuster for oscillator driver
A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive...
US-1,006,9420 Systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power...
Example embodiments of the systems and methods of non-invasive continuous adaptive tuning of digitally controlled switched mode power supply based on measured...
US-1,006,9419 Fast mode transitions in a power converter
Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating...
US-1,006,9416 Buck-boost converter controller
A controller for a DC-DC converter includes a state machine and a plurality of drivers for controlling switches in the DC-DC converter, where each state in the...
US-1,006,9065 Low noise graphene hall sensors, systems and methods of making and using same
Graphene Hall sensors, magnetic sensor systems and methods for sensing a magnetic field using an adjustable gate voltage to adapt the Hall sensor magnetic field...
US-1,006,9023 Optical sensor with integrated pinhole
An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the...
US-1,006,8983 High-K metal gate
An integrated circuit containing metal replacement gates may be formed by forming a nitrogen-rich titanium-based barrier between a high-k gate dielectric layer...
US-1,006,8977 Power MOSFET with a deep source contact
A power MOSFET IC device including an array of MOSFET cells formed in a semiconductor substrate. The array of MOSFET cells comprises an interior region of...
US-1,006,8903 Methods and apparatus for artificial exciton in CMOS processes
Methods and apparatus for artificial exciton devices. An artificial exciton device includes a semiconductor substrate; at least one well region doped to a first...
US-1,006,8816 Scan cell coupled to via ends, buffer coupled to via
The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of...
US-1,006,8802 Threshold mismatch and IDDQ reduction using split carbon co-implantation
An integrated circuit containing MOS transistors may be formed using a split carbon co-implantation. The split carbon co-implant includes an angled carbon...
US-1,006,8786 Data structures for semiconductor die packaging
At least some embodiments are directed to a system that comprises storage comprising a data structure that cross-references an identifier of a semiconductor...
US-1,006,8771 System and method for mitigating oxide growth in a gate dielectric
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in...
US-1,006,8769 Methods and apparatus for preventing counter-doping during high temperature processing
In a described example method, semiconductor wafer with a backside silicon nitride layer is encapsulated with a diffusion barrier layer prior to a high...
US-1,006,8638 Apparatus with low power SRAM retention mode
A memory array and an integrated circuit are disclosed. The memory array includes first and second banks of memory elements and five switches. Each memory...
US-1,006,8631 Dual mode memory array security apparatus, systems and methods
Read-only ("RO") data consisting of a physically unclonable function ("PUF") pattern is written to a ferroelectric random-access memory ("FRAM") memory array....
US-1,006,8512 Modulator for a MUX LCD
A modulator can include a common signal modulator that outputs a predetermined number of common signals to a multiplexer interface liquid crystal display (MUX...
US-1,006,7221 Interference detection in a frequency modulated continuous wave (FMCW) radar system
A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF)...
US-1,006,7201 Wiring layout to reduce magnetic field
A magnetic sensor has a circuit segment with a quadrupole region. The quadrupole region includes a supply line, a first return line and a second return line,...
US-1,006,7188 Test port, decompressor, compactor with I/O on opposite die surfaces
A test control port (TCP) includes a state machine SM, an instruction register IR, data registers DRs, a gating circuit and a TDO MX. The SM inputs TCI signals...
US-1,006,6799 Pixelated projection for automotive headlamp
An automotive headlamp is provided that includes a digital micromirror device (DMD) headlight module, the DMD headlight module including a DMD, a white light...
US-1,006,4218 Channel hopping aware channel access and re-transmission
A method of channel access for a radio device in an asynchronous channel hopping wireless network. A backoff time is set from an Interference Avoidance Delay...
US-1,006,4202 Assigning frequency sub-bands for LTE transmissions to provide improved performance and reduced interference
Disclosed embodiments include a base station. The base station includes a receiver that receives a channel quality report identifying one or more particular...
US-1,006,3871 Saving minimum macroblock data for subsequent encoding of other macroblocks
A video encoder including a first buffer containing a plurality of data values defining a macroblock of pixels of a video frame. The video encoder also includes...
US-1,006,3866 Multi-pass video encoding
Systems, methods and computer readable mediums are presented for encoding a stream of input video frames, in which the input video frames are down sampled and...
US-1,006,3170 Methods and apparatus for robust and efficient stepper motor BEMF measurement
In a described example an apparatus includes: an FET driver circuit configured to supply current to a coil in a stepper motor, the FET driver circuit configured...
US-1,006,3143 Fixed frequency DC-DC converter
In a power converter system, circuitry generates first and second PWM signals during a PWM cycle for controlling application of power to an inductor. Circuitry...
US-1,006,2777 Trench gate trench field plate vertical MOSFET
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the...
US-1,006,2624 Silicon package for embedded semiconductor chip and power converter
A packaged transistor device (100) comprises a semiconductor chip (101) including a transistor with terminals distributed on the first and the opposite second...
US-1,006,2451 Background memory test apparatus and methods
A schedulable memory scrubbing circuit and/or a known-state memory test circuit (collectively, background memory test apparatus ("BGMTA")) are located on-chip...
US-1,006,2448 Zero bias fuse cell
A circuit includes a fuse cell with a current mirror. The first leg of the current minor includes first and second N-type transistors coupled in series between...
US-1,006,2443 Memory circuit with leakage compensation
A memory array comprising a word line and a bit line is disclosed. Each of a plurality of memory cells of the memory array has a first terminal connected to the...
US-1,006,1675 Streaming engine with deferred exception reporting
This invention is a streaming engine employed in a digital signal processor. A fixed data stream sequence is specified by a control register. The streaming...
US-1,006,1028 Time-of-flight (TOF) assisted structured light imaging
A method for computing a depth map of a scene in a structured light imaging system including a time-of-flight (TOF) sensor and a projector is provided that...
US-1,006,1016 Phase noise measurement in a cascaded radar system
A cascaded radar system is provided that includes a master radar system-on-a-chip (SOC) with transmission signal generation circuitry and a slave radar SOC...
US-1,006,1015 Multi-chip transceiver testing in a radar system
A radar system is provided that includes a first radar transceiver integrated circuit (IC) including transmission signal generation circuitry operable to...
US-1,006,0980 Two signal JTAG with TLM, scan domain and diagnostics domain
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously...
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