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Bipolar transistor having base over buried insulating and polycrystalline
A bipolar transistor in a monocrystalline semiconductor substrate (101), which has a first conductivity type and includes a surface layer (102) of the opposite...
Ferroelectric capacitor with parallel resistance for ferroelectric memory
Ferroelectric memory cells (3) are presented, in which a cell resistor (R) is integrated into the cell capacitor (C) to inhibit charge accumulation or charge...
Hydrogen plasma photoresist strip and polymeric residue cleanup process
for low dielectric constant materials
A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position...
Use of supercritical fluid for low effective dielectric constant
An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step...
Semiconductor assembly having substrate with electroplated contact pads
An apparatus comprising an insulating substrate (101) having first and second surfaces (101a, 101b) and a plurality of metal-filled vias (102) extending from the...
Phosphorus activated NMOS using SiC process
A method (10) of forming a transistor (100) includes treating (12) at least some of a semiconductor substrate (102) with carbon and then forming (18) a gate...
Method and tool for verification of algorithms ported from one instruction
set architecture to another
The invention relates to a software system and method for automatically verifying the correct execution of an application ported from one instruction set...
Hardware-efficient low density parity check code for digital
A low density parity check (LDPC) code that is particularly well adapted for hardware implementation of a belief propagation decoder circuit is disclose& The...
Linking addressable shadow port and protocol for serial bus networks
Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of...
Speculative load of look up table entries based upon coarse index
calculation in parallel with fine index...
A computer implemented method accesses data in a look up table via an index divided into a coarse index and a fine index. The method calculates the coarse index...
Simplified noise suppression circuit
A system for reducing noise in an acoustical signal comprises a sampler (104) for obtaining discrete samples of the acoustical signal, an analog to digital...
Speech transfer over packet networks using very low digital data
A method of communicating speech across a communication link using very low digital data bandwidth is disclosed, having the steps of: translating speech into...
System and method for generating and measuring noise parameters
A method for measuring noise parameters includes generating a noise signal at a noise source. The noise signal includes a first input signal at a first frequency...
System and method for the exchange of location information in a telephone
A wireless communications system is presented where a mobile station is able to automatically determine its proximity to a second mobile station or landline...
Reducing noise and distortion in a receiver system
A receiver, implemented with low noise and low distortion, to process an input signal containing signals of interest and unwanted interference signal. In an...
Hybrid control of phase locked loops
A hybrid digital and analog phase locked loop. A voltage controlled oscillator is provided, having a fine tune input, a coarse tune input and an output. A...
Power efficient ADSL central office downstream class G power switch
Systems and methods are provided for switching between power supply rail voltages for a differential driver device of a class G amplifier device. The amplifier...
TTY communication over packet networks
A system to enable TTY communication between a legacy TTY phone and an IP phone over a packet network using a TTY relay protocol established between the IP phone...
Calculation of clock skew using measured jitter buffer depth
A system and method to measure the clock skew between transmitting and receiving devices operating with independent clock sources over a packet network is...
Clamping circuit for video signals
An apparatus, system and method for clamping a video signal input to a coupling capacitor (215) for providing a clamping voltage. A charging current is applied...
Reduced area digital sigma-delta modulator
A digital sigma-delta modulator requiring minimal die area and dissipating minimal power is formed with a plurality of integration stages coupled in tandem...
Video coding with CABAC
Context-based adapative binary arithmetic coding (CABAC), as used in video standards such as H.264/AVC, with a renormalization of the interval low value plus...
CMOS class AB folded cascode operational amplifier for high-speed
An operational amplifier (1A or 1B) includes a translinear transconductance stage (2B or 2C) receiving an input signal (Vin) of the operational amplifier and...
Avoiding excessive cross-terminal voltages of low voltage transistors due
to undesirable supply-sequencing in...
Ensuring sufficient bias current is provided to a portion of a circuit containing low voltage transistors operating with a high supply voltage. Such a sufficient...
Bootstrapped switch with an input dynamic range greater than supply
A bootstrapping circuit capable of sampling inputs beyond a supply voltage which includes a bootstrapped switch coupled between an input node and an output node,...
Integrated loss of signal detection with wide threshold range and precise
A loss-of-signal (LOS) detector includes a variable gain amplifier with an input receiving an input signal, a threshold comparator with a first input receiving a...
Drain-extended MOS transistors and methods for making the same
Drain-extended MOS transistors (T1, T2) and semiconductor devices (102) are described, as well as fabrication methods (202) therefor, in which a p-buried layer...
Semiconductor CMOS devices and methods with NMOS high-k dielectric present
in core region that mitigate damage...
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS...
Methodology for coordinating and tuning application power
Methods and systems are provided for developing a power management strategy for an application as the application is developed. These methods and systems broadly...
Temperature field controlled scheduling for processing systems
A multiprocessor system (10) includes a plurality of processing modules, such as MPUs (12), DSPs (14), and coprocessors/DMA channels (16). Power management...
Random access preamble coding for initiation of wireless mobile
A method of operating a wireless communications unit (UE) to request a connection with a base station (10) is disclosed. The wireless unit (UE) receives a signal...
Path to trapezoid decomposition of polygons for printing files in a page
A computer implemented method of rasterizing a page in a page description language efficiently utilizes the resources of a multiprocessor integrated circuit by...
Integrated raster image processor and electro-photographic engine
This invention comprises a converged printer architecture for controlling both electro-photographic (EP) processing and raster image processing (RIP) of data for...
Equilibrium based horizontal sync detector for video decoder
The present invention discloses a horizontal sync detector circuit (10) comprising a filter portion (12), an equilibrium accumulator portion (14) coupled to the...
Method and apparatus for providing position feedback of an optical
According to one embodiment, a method for providing position feedback for a device includes providing a photointerrupter having a light-emitting diode, a...
Reducing the coupling between LC-oscillator-based phase-locked loops in
Disclosed are integrated circuits having multiple electromagnetically emissive devices, such as LC oscillators. The devices are formed on an integrated circuit...
Daisy chaining of serial I/O interface on stacking devices
A bottom die and a top die stacked on the bottom die are configured to provide a daisy chain function. Both die include an input/output function control bonding...
Reduced hydrogen sidewall spacer oxide
An embodiment of the invention is a method of making a semiconductor structure 10 where the spacer oxide layer 90 is formed by a hydrogen free precursor CVD...
Method to selectively strain NMOS devices using a cap poly layer
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply tensile strain to channel regions of...
Methods and apparatus for a system clock divider
A power-saving clock divider scheme is cost-effective, flexible, jitterless, and allows the user to keep track of time. In general, the clock divider selectively...
Progressive extended compression mask for dynamic trace
This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least...
Circuits, systems, and methods implementing approximations for logarithm,
inverse logarithm, and reciprocal
A digital signal system (30) for determining an approximate logarithm of a value of x having a base b is described. The system comprises circuitry for storing x...
System and method for the analysis of semiconductor test data
According to one embodiment, a method of analyzing semiconductor test data includes receiving a plurality of raw data entries from a testing system. Each raw...
Method to improve an extinction ratio of an optical device
A method to improve an extinction ratio of an optical device, the method includes positioning at least a majority of a plurality of micro-mirrors in an off-state...
Alignment mark for e-beam inspection of a semiconductor wafer
An alignment mark to be used in conjunction with e-beam imaging to identify specific feature locations on a chip including a unique "L" shaped pattern of...
A circuit for receiving multiple serial datastreams in parallel is disclosed. A bit clock is recovered from each data stream, there being one data bit for each...
Complexity-scalable intra-frame prediction technique
This invention is a method of encoding intra frames when encoding a motion picture. A set of intra frame prediction modes includes a low-complexity subset. A...
Methods and apparatus for an ADSL transceiver
An ADSL transceiver hybrid circuit uses one or more isolated couplers (optical couplers, capacitors, or the like) configured to minimize the transmit signal...
Distributed device identifier numbering and total device counting
algorithm with smart time division...
A distributed method and apparatus for assigning a unique identifier number to devices connected in a sequential fashion and determining a total device count is...
Removable face plate compressed digital music player
This invention comprises a two part audio system in which all of the processing power is allocated to a small, lightweight satellite part that is the face unit....