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Patent # Description
US-7,194,169 Notched adjustable aperture
An adjustable aperture system includes a stationary aperture operable to remove a portion of a lower intensity light communicated through a light bundle. The...
US-7,194,024 Method for adaptive hybrid selection during ADSL modem training
The methodology accomplishes adaptive hybrid selection during ADSL modem training. The adaptive hybrid selection method maximizes performance for ADSL modems in...
US-7,193,880 Plateline voltage pulsing to reduce storage node disturbance in ferroelectric memory
Methods (50, 70) and ferroelectric devices (102) are presented, in which pulses (113) are selectively applied to platelines (PL) of one or more non-selected...
US-7,193,739 Real time fax-over-packet for broadband access gateways
The invention teaches elimination of the need for allocating a telephony port or equivalent processor resource for realtime facsimile transmission through a...
US-7,193,554 Quantizer circuit
According to an aspect of present invention, a quantizer is provided with reduced power consumption and area. Such a feature is attained by providing the input...
US-7,193,469 System and method for testing gate oxide of an amplifier
An amplifier system and method is provided for performing gate oxide integrity (GOI) testing of a power output field effect transistor (FET) of the amplifier...
US-7,193,442 USB 1.1 for USB OTG implementation
This invention enables a USB 1.1 device and a USB 1.1 host to communicate seamlessly with a USB OTG device. The invention complies with both USB 1.1 and OTG...
US-7,193,403 Current driver
A current driver that can control variation in the consumed current in conjunction with variation in the setting value of the driving current. The mirror current...
US-7,193,277 Application of different isolation schemes for logic and embedded memory
The present invention facilitates semiconductor device fabrication by providing mechanisms for utilizing different isolation schemes within embedded memory and...
US-7,192,894 High performance CMOS transistors using PMD liner stress
A silicon nitride layer (110) is formed over a transistor gate (40) and source and drain regions (70). The as-formed silicon nitride layer (110) comprises a...
US-7,192,880 Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching
The present invention provides a method for etching a substrate 100. The method includes conducting a first etch on an anti-reflective layer 170 and a portion of...
US-7,192,877 Low-K dielectric etch process for dual-damascene structures
A method includes performing a first etch process to form a via hole in a dual-damascene integrated circuit structure comprising a first dielectric layer and a...
US-7,192,863 Method of eliminating etch ridges in a dual damascene process
A dual damascene process employs a via fill material (38) with an etch rate that is within 60% of an etch rate that an underlying dielectric layer (34) etches...
US-7,192,861 Wire bonding for thin semiconductor package
An assembly of a semiconductor chip (301) having an integrated circuit (IC) including at least one contact pad (320) on its surface (301a), wherein the contact...
US-7,192,838 Method of producing complementary SiGe bipolar transistors
Method of producing complementary SiGe bipolar transistors. In a method of producing complementary SiGe bipolar transistors, interface oxide layers (38, 58) for...
US-7,192,809 Low cost method to produce high volume lead frames
A method (300) for fabricating a lead frame (100), comprising forming a plurality of external leads (122) in a lead frame material (108), plating a metal (222)...
US-7,191,446 Method for resource management in a real-time embedded system
A method is disclosed for allocating processing resources, such as instruction execution which can be measured in MIPs or memory capacity, or other resources of...
US-7,191,445 Method using embedded real-time analysis components with corresponding real-time operating system software objects
An operating system (OS) is used in a system with a processor that includes embedded real-time analysis components. The OS includes software objects which...
US-7,191,199 Method and device for computing an absolute difference
Computing an absolute difference includes receiving a first value and a second value. Propagate terms are determined according to the first value and the second...
US-7,191,162 FIFO interface for flag-initiated DMA frame synchro-burst operation
The invention describes a modification of FIFO hardware to allow improved use of FIFOs for burst reading from or writing to a processor direct memory access unit...
US-7,191,025 Variable digital high and low pass filters
A system (10) for providing an integer number N of filters. The system comprises an input (D.sub.i) for receiving a digital audio signal and an output (D.sub.o)...
US-7,190,717 System and method for tone ordering in discrete multi-tone (DMT) modems
A system and method for reordering tones of a DMT signal within a communication system is described. Cross tone correlated noise in a received signal is...
US-7,190,665 Blind crosstalk cancellation for multicarrier modulation
Crosstalk can be cancelled in a composite communication signal (y.sub.m) which includes a primary signal component associated with communication data and which...
US-7,190,598 Three-phase low noise charge pump and method
A low noise charge pump circuit includes a first terminal of a first flying capacitor selectively coupled to a first voltage during a first recharging phase and...
US-7,190,541 Hi-speed preamplifier write driver for hard drive with improved symmetry
A write driver (38) produces balanced voltages across head (32) by using the input write data (WDX and WDY) drive transistors of a slower transistor type...
US-7,190,400 Charge multiplier with logarithmic dynamic range compression implemented in charge domain
A CCD device incorporates Charge Multiplication in its CCD registers together with charge domain Dynamic Range compression. This structure preserves the high...
US-7,190,214 Amplifier apparatus for use with a sensor
An apparatus for use with a sensor includes first and second signal treating circuit segments coupled with the sensor for presenting a substantially balanced...
US-7,189,938 Process and system to package residual quantities of wafer level packages
Various preferred processes and equipment are described herein that more efficiently handle residual semiconductor parts during packaging. The processes include...
US-7,189,627 Method to improve SRAM performance and stability
A technique is disclosed for increasing the width of a transistor (300) while the transistor itself may be scaled down. The transistor width (382) is increased...
US-7,189,615 Single mask MIM capacitor and resistor with in trench copper drift barrier
The formation of a MIM (metal insulator metal) capacitor (164) and concurrent formation of a resistor (166) is disclosed. A copper diffusion barrier (124) is...
US-7,189,601 System and method for forming mold caps over integrated circuit devices
A compression molding method for forming a mold cap over an integrated circuit structure is provided. A film is positioned adjacent a first die structure such...
US-7,189,332 Apparatus and method for detecting an endpoint in a vapor phase etch
Processes for the removal of a layer or region from a workpiece material by contact with a process gas in the manufacture of a microstructure are enhanced by the...
US-7,187,917 Current interpolation in multi-phase local oscillator for use with harmonic rejection mixer
A circuit provides a reduced harmonic content output signal OUTA and/or OUTB that is modulated according to an input signal 231. The circuit has an oscillator...
US-7,187,909 Current mode transmitter
A current-domain transmitter is configured to receive an input signal and provide a transmitted signal. The transmitter has a plurality of elements, operatively...
US-7,187,734 Method of slip compensation for integer frequency offset correction in a wireless communication system
A method of correctly estimating the frequency offset when the CPE modem has already acquired and is tracking the OFDM burst boundaries in an OFDM-based,...
US-7,187,712 Efficient framing of overhead channel for ADSL modems
An efficient framing scheme is described for the transmission of frame overhead data in next generation ADSL modems. As a result of this new framing scheme, the...
US-7,187,484 Digital micromirror device with simplified drive electronics for use as temporal light modulator
A digital micromirror device (DMD) modified for use as a temporal light modulator. The DMD is modified so that the mirrors of the DMD have a preferential tilt...
US-7,187,483 Magnet on frame oscillating device
An oscillating torsional hinged device, such as a mirror, having the advantages of an oscillating device with permanent magnets mounted on the hinges, but...
US-7,187,207 Leakage balancing transistor for jitter reduction in CML to CMOS converters
The CML (current mode logic) to CMOS converter with a leakage balancing transistor for jitter reduction includes: a differential input stage; an output stage...
US-7,187,180 Method of sensing motor winding current in integrated stepper motor buffer
A method and motor controller for sensing motor winding current. An FET drive transistor has its ON resistance periodically increased to about five times the...
US-7,187,080 Semiconductor device with a conductive layer including a copper layer with a dopant
A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (202), forming a dielectric layer (204) over the...
US-7,187,034 Distributed power MOSFET
Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and...
US-7,187,033 Drain-extended MOS transistors with diode clamp and methods for making the same
High side extended-drain MOS driver transistors (T2) are presented in which an extended drain (108, 156) is separated from a first buried layer (120) by a second...
US-7,186,651 Chemical mechanical polishing method and apparatus
A method for removing material from the surface of a semiconductor wafer with a chemical mechanical polishing process is described. The method uses a polishing...
US-7,185,250 Tap with separate scan cell in series with instruction register
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these ports...
US-7,185,037 Video block transform
Integer transforms of 4.times.4 blocks of the type used in proposed H.26L but adapted to 16-bit arithmetic by shifts after matrix multiplications and integer...
US-7,184,721 Transmit power control in a wireless communication device
A method and apparatus permit a wireless communication device to be calibrated during manufacturing and subsequently re-calibrated while in use to correct for...
US-7,184,499 Method of timing compensation for OFDM-based wireless communication system coded parameter signaling (CPS)...
A method of determining CPS data in an OFDM-based, wireless communication system resolves the phase angle difference between training tones in a burst without...
US-7,184,485 Time-domain windowing of multi-band OFDM system to enable spectral sculpting
A method of wirelessly communicating is disclosed. The method comprises generating a plurality of tones for a wideband orthogonal frequency division multiplex...
US-7,184,472 Time domain equalizer and method
Time domain equalizer determination for discrete multitone systems by tone error minimization from a starting point of a single-tone equalizer.
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