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Patent # Description
US-7,061,989 Fully digital transmitter including a digital band-pass sigma-delta modulator
A digital transmitter (20) that may be advantageously used in a high-frequency transceiver, such as a wireless telephone handset, is disclosed. The transmitter...
US-7,061,820 Voltage keeping scheme for low-leakage memory devices
The present invention facilitates memory device operation by mitigating power consumption during suspend modes of operation, also referred to as sleep/data...
US-7,061,540 Programmable display timing generator
A display timing generator is provided for selecting line types and providing synchronization timing signals for video signals. The display timing generator...
US-7,061,512 Constant-weight bit-slice PWM method and system for scrolling color display systems
A display system 100 includes a light source 110 and a color wheel 114. An optical section 112 is arranged to receive light from the light source 110 and to...
US-7,061,332 Process tracking limiter for VCO control voltages
A control voltage window generator that tracks process, voltage supply, and temperature variations for a voltage controlled oscillator includes: a first...
US-7,061,325 Digital compensation for offset and gain correction
A system and method for providing digital compensation and correction for an amplifier. The system is configured to provide a digitally compensated ...
US-7,061,323 Apparatus and method for controlling operation of an amplifier device when supply voltage varies
An apparatus for controlling operation of an amplifier device when supply voltage provided to the amplifier device varies at an input voltage supply locus. The...
US-7,061,291 Linear voltage tracking amplifier for negative supply slew rate control
Circuitry is provided for controlling the slew rate of a negative output supply. The slew rate control circuitry includes an NMOS FET, a feedback resistor...
US-7,061,217 Integrated power switching circuit
A power switching circuit includes a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage,...
US-7,061,214 Single inductor dual output buck converter with frequency and time varying offset control
A single-inductor dual-output buck converter and control method that facilitates power conversion by converting a single DC power source/supply into two separate...
US-7,061,204 Motor starter device having reduced power consumption
A motor starter for use with a motor (20) having a main winding (M) and a start winding (S). The starter has a PTC thermistor (30) connected in series with the...
US-7,061,114 Structure and method for contact pads having a protected bondable metal plug over copper-metallized integrated...
An integrated circuit having copper interconnecting metallization (311, 312) protected by a first, inorganic overcoat layer (320), portions of the metallization...
US-7,061,108 Semiconductor device and a method for securing the device in a carrier tape
A method for packing a semiconductor device 301 in a carrier tape 406 without damage to the leads 302 includes an interlocking mechanism between the molded...
US-7,061,058 Forming a retrograde well in a transistor to enhance performance of the transistor
A method of forming a retrograde well in a transistor is provided. A transistor structure having a substrate, a gate, and a gate oxide layer between the...
US-7,060,633 Planarization for integrated circuits
A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In...
US-7,060,607 Circuit method integrating the power distribution functions of the circuits and leadframes into the chip surface
An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are...
US-7,060,579 Increased drive current by isotropic recess etch
A method (100) of forming a transistor includes forming a gate structure (108) over a semiconductor body and forming recesses (112) using an isotropic etch using...
US-7,060,556 Drain extended MOS transistors with multiple capacitors and methods of fabrication
Multi-capacitor drain extended transistor devices and methods are provided. A first capacitor structure comprises a first dielectric layer (14) and a first gate...
US-7,060,538 Versatile system for electrostatic discharge protection utilizing silicon controlled rectifier
The present invention provides a system for electrostatic discharge protection in a semiconductor device, utilizing a silicon-controlled rectifier (502). The...
US-7,059,191 Determining defective devices which generate sound during operation
Determining whether a device is defective by analyzing the sound signals generated by the device. Digital samples are generated to represent the sound signals....
US-7,058,912 Notifying status of execution of jobs used to characterize cells in an integrated circuit
The status of execution of jobs (used to characterize cells) is notified asynchronously. As a result, the processing and network resources may be optimally used....
US-7,058,871 Circuit with expected data memory coupled to serial input lead
A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register...
US-7,058,862 Selecting different 1149.1 TAP domains from update-IR state
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for...
US-7,058,765 Processor with a split stack
Methods and apparatuses are disclosed for implementing a processor with a split stack. In some embodiments, the processor includes a main stack and a...
US-7,058,188 Configurable digital loudness compensation system and method
An audio loudness compensation system includes a level sensor receiving an audio input signal and operable to estimate a level of the audio input signal over a...
US-7,058,126 Digital graphametric equalizer
A graphametric equalizer has graphic and parametric equalization capabilities within a single non-redundant system. A translation function capability converts...
US-7,058,114 Wireless device and method
A high speed Bluetooth system with switch-to quadrature amplitude modulation allows for simple mobile devices with video data rates in applications such as...
US-7,058,074 Unified channel access for supporting quality of service (QoS) in a local area network
Contention communications often requires a station to wait an inordinate amount of time before the station is able to transmit its data successfully. In many...
US-7,057,982 Servo error detector for optical disk
A servo error detector usable in an optical disk system is provided. An envelope detecting unit (24) detects the top envelopes and bottom envelopes of RF signals...
US-7,057,540 Sigma-delta (.SIGMA..DELTA.) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer
A sigma-delta analog-to-digital converter-offers advantages such as noise shaping and high frequency operation. However, a sampling circuit needed to provide a...
US-7,057,409 Method and apparatus for non-invasively testing integrated circuits
The preferred embodiments of the present invention provide non-invasive approaches of testing ICs that use photon emission from semiconductor devices to provide...
US-7,057,284 Fine pitch low-cost flip chip substrate
A package is disclosed, which includes a substrate, a solder masker, and a first aperture through the solder mask. The substrate has a surface on which metal...
US-7,056,767 Method and apparatus for flip chip device assembly by radiant heating
A flip chip semiconductor device having non-solder contact terminals is assembled by securing the chip and substrate with a rapidly thermosetting adhesive. The...
US-7,056,752 Fabricating a die with test enable circuits between embedded cores
Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test...
US-7,055,212 Clean gas injector system for reactor chamber
An improvement to a Novellus HDP SPEED reactor chamber is described. An evacuation port of the Novellus SPEED Chamber is at one location in the chamber to remove...
US-7,055,136 Configurable debug system with dynamic menus
The invention relates to a software system and method for dynamically varying context sensitive menus of a software system. In this method, a menu item is added...
US-7,054,958 Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in...
In a data processing system including a plurality of digital signal processor subsystems, selected peripheral components are shared by the digital signal...
US-7,054,698 System for tracking operator certification of FAB equipment and processes
A software system is provided that tracks employee and contractor operation/certification of fabrication equipment and processes is provided to ensure that only...
US-7,054,393 Short and long sequence boundary detection algorithm for wireless LAN modems
A method for detecting a boundary between two sequences in a wireless local area network is presented that permits rapid detection of the boundary. The method...
US-7,054,091 Digital processor controlled method and circuit for retracting a head carriage assembly to a parked position in...
A retract circuit (40) for retracting a data transducer carriage assembly (17) of a mass data storage device (10) to a retracted position has a digital state...
US-7,053,808 Suppressing digital-to-analog converter (DAC) error
A digital-to-analog converter (DAC) error suppression arrangement suppresses DAC error arising from mismatched elements contained in a DAC (640 and/or 645) that...
US-7,053,465 Semiconductor varactor with reduced parasitic resistance
A semiconductor varactor with reduced parasitic resistance. A contact isolation structure (32) is formed in a well region (20). The gate contact structures (70)...
US-7,052,150 Rod integrator
An integrating rod (200) for use with a multiple segment dynamic filter, such as a spiral dichroic color wheel having three or more narrow filters adjacent to...
US-7,051,427 Integrated circuit trimming device broken die sensor
A broken trim die tool detection sensor. The lands of the tie bar die connect with the leads of the unit to form switches. The states of these switches indicate...
US-7,051,257 Means scanning scan path parts sequentially and capturing response simultaneously
A Scan-BIST architecture is adapted into a low power Scan-BIST architecture. A generator 102, compactor 106, and controller 110 remain the same as in the known...
US-7,051,256 Processor emulator transferring data with emulation controller continuously without interruption
An emulator for emulating operations of data processing circuitry normally connected to and cooperable with a peripheral circuit includes serial scanning...
US-7,051,197 Tracing through reset
A method of tracing a data processor upon reset of the data processor. A data processor reset signal resets the data processor, part of trace collection hardware...
US-7,050,768 Signal field controller, method of controlling and MIMO transmitter employing the same
For use with a multiple-input, multiple-output (MIMO) transmitter, a signal field controller, a method of controlling signal fields and a MIMO transmitter...
US-7,050,576 Double talk, NLP and comfort noise
A state machine for attenuating the transition into and out of NLP state to reduce voice clipping and to reduce echo leak in a voice over packet signal...
US-7,050,552 System and method to mitigate pots ringing interference in DSL
A system and method are disclosed to mitigate the interference on DSL due to high frequency components associated with a change in a POTS condition, such as POTS...
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