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Patent # Description
US-7,091,766 Retention register for system-transparent state retention
State retention registers for use in low-power standby modes of digital IC operation are provided, wherein: a differential circuit (M1-M3; M1-M4) is used to load...
US-7,091,556 High voltage drain-extended transistor
The present invention provides, in one embodiment, a transistor (100). The transistor (100) comprises a doped semiconductor substrate (105) and a drain-extended...
US-7,091,119 Encapsulated MOS transistor gate structures and methods for making the same
Transistor gate structures, encapsulation structures, and fabrication techniques are provided, in which sidewalls of patterned gate structures are conditioned by...
US-7,090,787 Drying getters
A zeolite and an organic binder are mixed with a solvent to form a paste (302). The paste is then cast or molded (304) into the desired shape. A portion of the...
US-7,089,447 Apparatus and method for compression based error correction procedure in a data processing system
In a data processing system in which the complete set of op-code signal groups are stored in a ROM unit, a programmable, non-volatile memory unit stores the...
US-7,089,437 Apparatus for determining power consumed by a bus of a digital signal processor using counted number of logic...
In order to measure the power consumed by a bus in a digital signal processor, each bus conductor has a lead electrically coupled thereto. The lead is coupled to...
US-7,089,183 Accumulating transformations for hierarchical linear regression HMM adaptation
A new iterative hierarchical linear regression method for generating a set of linear transforms to adapt HMM speech models to a new environment for improved...
US-7,089,004 Method and apparatus for scheduling cell search in CDMA mobile receivers
Search scheduling circuitry for use with a wireless communication device, such as a mobile telephone, includes a search time calculator, a search period...
US-7,088,791 Systems and methods for improving FFT signal-to-noise ratio by identifying stage without bit growth
Systems and methods are provided for performing signal processing on communication data utilizing scale reduced Fast Fourier Transform computations. The present...
US-7,088,785 Block level space time transmit diversity in wireless communications
Space time transmit diversity (9, 14, 17, 19) is applied at the block level to an original block of bits (12) in order to reduce the effects of fading in...
US-7,088,607 Static memory cell and SRAM device
The objective of this invention is to provide a static memory cell and an SRAM device that can improve the write margin while preventing degradation of the...
US-7,088,602 Active gate clamp circuit for self driven synchronous rectifiers
A DC-DC converter circuit includes a transformer with a resonate filter or snubber connected at a primary side and a switch for controlling operation of the...
US-7,088,486 Yokeless hidden hinge micromirror device with double binge layer
A micromirror array 110 fabricated on a semiconductor substrate 11. The array 110 is comprised of four operating layers 12, 13, 14, 15. An addressing layer 12 is...
US-7,088,274 Difference amplifier for digital-to-analog converter
An improved circuit is provided that buffers the output of a DAC while improving the bandwidth and linearity of the circuit. A DAC comprises an output signal of...
US-7,088,273 Reducing noise in switched capacitor amplifier circuit
A switched capacitor environment in which a feedback capacitor of a stage is flipped to be used as a sampling capacitor of the next stage. Due to such use of the...
US-7,088,182 Class AB output stage circuit with stable quiescent current
A class-AB output stage circuit is configured with controllable reference voltages for providing stable quiescent current. An exemplary output stage circuit...
US-7,088,177 Amplifier apparatus
An amplifier apparatus includes: (a) an integrator having an input for receiving an input signal, and integrating the input signal to present an integrated...
US-7,088,171 Charge pump with constant output current
An improved charge pump circuit that is capable of producing a constant output current. The charge pump circuit includes a controllable current source, at least...
US-7,088,149 Enhancing SNR and throughput performance of integrated circuits
Low voltage transistors are used in high voltage environment. The low voltage transistors may be used in the path of processing of a signal to increase the...
US-7,088,123 System and method for extraction of C-V characteristics of ultra-thin oxides
In one embodiment, a method for extracting C-V characteristics of ultra-thin oxides includes coupling a device under test to a testing structure, in which the...
US-7,088,070 Resonant scanning mirror driver circuit
A resonant scanning mirror driver configured to drive a micro-electro-mechanical system (MEMS) mirror to a desired deflection utilizes a PWM pattern selected...
US-7,087,518 Method of passivating and/or removing contaminants on a low-k dielectric/copper surface
One aspect of the invention relates to a method of removing contaminants from a low-k film. The method involves forming a sacrificial layer over the contaminated...
US-7,087,493 Memory with 6T small aspect ratio cells having metal.sub.--1 elements physically connected to metal.sub.--0...
A method of forming a memory circuit comprising six transistor memory cells. The memory cells comprise first and second inverters. The inverters comprise...
US-7,087,479 Method of forming integrated circuit contacts
Contacts are formed to integrated circuit devices by first forming a conductive layer (80) on a semiconductor device. An optional dielectric layer (130) is...
US-7,087,440 Monitoring of nitrided oxide gate dielectrics by determination of a wet etch
The present invention provides, in one embodiment, a method method of monitoring a process for forming a nitridated oxide gate dielectric. A nitrided oxide...
US-7,085,977 Method and system for detecting an outlying resistance in a plurality of resistive elements
In one aspect of the invention, a semiconductor die includes a plurality of resistive elements operable to receive a voltage differential between at least two of...
US-7,085,957 Upgrading of firmware with tolerance to failures
The firmware may contain multiple application modules, which can operate independent of each other such that upgrade of one application module does not affect...
US-7,085,699 Wire bonding simulation
Embodiments of the present invention may provide ways and uses for correlating actual wire bonding machine adjustment parameters to inputs needed for FEA...
US-7,085,325 Serial interface unit with transmit monitor
In a serial interface unit (10) for the transmission and reception of data under the control of clock signals, the data are output from a data source to a data...
US-7,085,150 Methods for enhancing performance of ferroelectic memory with polarization treatment
The present invention facilitates data retention lifetimes for ferroelectric devices by improving switched polarization of ferroelectric memory cells. A...
US-7,085,088 Method of controlling reader amplifier gain variations of a HDD preamplifier, or the like
An amplifier (70) has a differential input stage (84,86). An output transistor (102) is connected to receive a single ended output developed by transistor 86....
US-7,084,864 Computer display with switched capacitor power supply
A computer (80) includes a display assembly 10 which uses a backlight power supply 40 to power a fluorescent tube 18 for backlighting purposes. The power supply...
US-7,084,701 Preventing power-on audio output noise in a wireless telephone handset
A wireless telephone (10) including audio amplifier circuitry (20) that produces reduced "pop" noise in speakers such as in handsfree headsets (HS) is disclosed....
US-7,084,611 DC/DC converter
The invention relates to a DC/DC converter including an input to which an input voltage Vin is applied, a inductance L whose one terminal is connected to the...
US-7,084,500 Semiconductor circuit with multiple contact sizes
A semiconductor circuit comprising a semiconductor die and a package substrate. In one embodiment, a first plurality of conductive bumps serves as a portion of a...
US-7,084,494 Semiconductor package having integrated metal parts for thermal enhancement
A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and...
US-7,084,011 Forming a chip package having a no-flow underfill
A method of forming an underfilled chip package is provided. No-flow underfill material is deposited over a surface of a package substrate to form an underfill...
US-7,083,328 Remote diode temperature sense method with parasitic resistance cancellation
The temperature of an internally or remotely sensed diode is determined using sequential currents applied to the diode, while compensating for parasitic...
US-7,082,558 Increasing possible test patterns which can be used with sequential scanning techniques to perform speed analysis
A non-robust test pattern, which causes a transition on a path of interest as well as off-paths, may be selected as being suitable for performing delay analysis...
US-7,082,170 Spectral power management for constrained transmissions using constellation shaping
In frequency channel communications, constraints on transmit power characteristics can be complied with by implementing constellation shaping (15, 71) in the...
US-7,081,791 Automatically adjusting low noise amplifier
A low noise amplifier circuit (10) includes an attenuator (12) for receiving a calibration signal and generating an attenuated calibration signal. A low noise...
US-7,081,635 High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation...
The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable...
US-7,080,386 Architecture with digital signal processor plug-ins for general purpose processor media frameworks
A plug-and-play architecture including an extension of a general purpose processor media framework for adjoining DSP processing power.
US-7,080,337 Non-uniform decoupling capacitor distribution for providing more uniform noise reduction across chip
An embodiment of the present invention includes a method of providing a non-uniform distribution of decoupling capacitors to provide a more uniform noise level...
US-7,080,267 Methodology for managing power consumption in an application
Methods and systems are provided for dynamically managing power consumption in a digital system. These methods and systems broadly provide for permitting clients...
US-7,080,005 Compact text-to-phone pronunciation dictionary
A typical English pronunciation dictionary takes up to 1,826,302 bytes in ASCII to store. A five times compression while maintaining computability is achieved by...
US-7,079,826 Digitally controlled analog RF filtering in subsampling communication receiver architecture
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
US-7,079,697 Image compression with transform coefficient analysis
A method of image/video compression with intra-coding blocks analyzed for sum of absolute magnitudes of AC coefficients of DCT of block to determine whether to...
US-7,079,646 ADSL receiver high pass filter architecture
An ADSL receiver HPF architecture 300 that reduces the number of Op Amps below that required for known ADSL receiver HPFs. The ADSL receiver HPF 300 is...
US-7,079,612 Fast bit-error-rate (BER) test
A bit-error-rate (BER) test is a crucial test for wireless devices to pass, since a device with a high BER does not perform at its best. BER tests are both...
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