Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,064,593 Bus-hold circuit
A bus hold circuit that satisfies both the over-voltage tolerance and maximum leakage current `I.sub.off` specification without incorporating a diode in pull-up...
US-7,064,587 Output Buffer
A low-noise output buffer for a digital signal is based on an analog amplifier having bandwidth greater than the switching rate of the digital logic signal. A...
US-7,064,399 Advanced CMOS using super steep retrograde wells
The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer...
US-7,064,043 Wafer bonded MOS decoupling capacitor
A technique for forming a MOS capacitor (100) that can be utilized as a decoupling capacitor is disclosed. The MOS capacitor (100) is formed separately from the...
US-7,064,039 Method to produce localized halo for MOS transistor
Methods are discussed for forming a localized halo structure and a retrograde profile in a substrate of a semiconductor device. The method comprises providing a...
US-7,064,008 Semiconductor leadframes plated with thick nickel, minimum palladium, and pure tin
A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering the base metal; a plated layer of pure...
US-7,062,762 Partitioning symmetric nodes efficiently in a split register file architecture
The present invention provides methods specifically geared to finding natural splits in wide, nearly symmetric dependence graphs and assigning the components of...
US-7,062,680 Expert system for protocols analysis
An expert system that provides an analysis of protocol exchanges and protocol relationships across multiple data units, such as packets, of a network and within...
US-7,062,635 Processor system and method providing data to selected sub-units in a processor functional unit
A processor (50) operable in response to an instruction set comprising a plurality of instructions. The processor comprises a functional unit (52) comprising an...
US-7,062,526 Microprocessor with rounding multiply instructions
A functional unit in a digital system is provided with a rounding Multiplication instruction, wherein a most significant product of first pair of elements is...
US-7,062,433 Method of speech recognition with compensation for both channel distortion and background noise
A method of speech recognition with compensation is provided by modifying HMM models trained on clean speech with cepstral mean normalization. For all speech...
US-7,062,430 Designing boundary filters for a biorthogonal filter bank
A signal processing device includes a biorthogonal filter bank that processes a finite length signal including a left boundary and a right boundary. The...
US-7,062,304 Task based adaptative profiling and debugging
A multiprocessor system (10) includes a plurality of processing modules, such as MPUs (12), DSPs (14), and coprocessors/DMA channels (16). Power management...
US-7,062,244 Speed-up mode implementation for direct conversion receiver
A speed-up mode control system is operative to generate a speed-up mode signal based on a gain control signal from associated digital circuitry. The speed-up...
US-7,062,037 Generic line impedance matching circuit using decomposed configurable transfer functions
A technique for implementing impedance matching circuits 100 that use the transfer functions of each line impedance model. This technique allows implementation...
US-7,062,003 Self-tuning baud rate generator for UART applications
The invention describes a baud rate generator for use in a sampled data system. This generator makes possible the sampling of asynchronous digital input data...
US-7,061,989 Fully digital transmitter including a digital band-pass sigma-delta modulator
A digital transmitter (20) that may be advantageously used in a high-frequency transceiver, such as a wireless telephone handset, is disclosed. The transmitter...
US-7,061,820 Voltage keeping scheme for low-leakage memory devices
The present invention facilitates memory device operation by mitigating power consumption during suspend modes of operation, also referred to as sleep/data...
US-7,061,540 Programmable display timing generator
A display timing generator is provided for selecting line types and providing synchronization timing signals for video signals. The display timing generator...
US-7,061,512 Constant-weight bit-slice PWM method and system for scrolling color display systems
A display system 100 includes a light source 110 and a color wheel 114. An optical section 112 is arranged to receive light from the light source 110 and to...
US-7,061,332 Process tracking limiter for VCO control voltages
A control voltage window generator that tracks process, voltage supply, and temperature variations for a voltage controlled oscillator includes: a first...
US-7,061,325 Digital compensation for offset and gain correction
A system and method for providing digital compensation and correction for an amplifier. The system is configured to provide a digitally compensated ...
US-7,061,323 Apparatus and method for controlling operation of an amplifier device when supply voltage varies
An apparatus for controlling operation of an amplifier device when supply voltage provided to the amplifier device varies at an input voltage supply locus. The...
US-7,061,291 Linear voltage tracking amplifier for negative supply slew rate control
Circuitry is provided for controlling the slew rate of a negative output supply. The slew rate control circuitry includes an NMOS FET, a feedback resistor...
US-7,061,217 Integrated power switching circuit
A power switching circuit includes a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage,...
US-7,061,214 Single inductor dual output buck converter with frequency and time varying offset control
A single-inductor dual-output buck converter and control method that facilitates power conversion by converting a single DC power source/supply into two separate...
US-7,061,204 Motor starter device having reduced power consumption
A motor starter for use with a motor (20) having a main winding (M) and a start winding (S). The starter has a PTC thermistor (30) connected in series with the...
US-7,061,114 Structure and method for contact pads having a protected bondable metal plug over copper-metallized integrated...
An integrated circuit having copper interconnecting metallization (311, 312) protected by a first, inorganic overcoat layer (320), portions of the metallization...
US-7,061,108 Semiconductor device and a method for securing the device in a carrier tape
A method for packing a semiconductor device 301 in a carrier tape 406 without damage to the leads 302 includes an interlocking mechanism between the molded...
US-7,061,058 Forming a retrograde well in a transistor to enhance performance of the transistor
A method of forming a retrograde well in a transistor is provided. A transistor structure having a substrate, a gate, and a gate oxide layer between the...
US-7,060,633 Planarization for integrated circuits
A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In...
US-7,060,607 Circuit method integrating the power distribution functions of the circuits and leadframes into the chip surface
An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are...
US-7,060,579 Increased drive current by isotropic recess etch
A method (100) of forming a transistor includes forming a gate structure (108) over a semiconductor body and forming recesses (112) using an isotropic etch using...
US-7,060,556 Drain extended MOS transistors with multiple capacitors and methods of fabrication
Multi-capacitor drain extended transistor devices and methods are provided. A first capacitor structure comprises a first dielectric layer (14) and a first gate...
US-7,060,538 Versatile system for electrostatic discharge protection utilizing silicon controlled rectifier
The present invention provides a system for electrostatic discharge protection in a semiconductor device, utilizing a silicon-controlled rectifier (502). The...
US-7,059,191 Determining defective devices which generate sound during operation
Determining whether a device is defective by analyzing the sound signals generated by the device. Digital samples are generated to represent the sound signals....
US-7,058,912 Notifying status of execution of jobs used to characterize cells in an integrated circuit
The status of execution of jobs (used to characterize cells) is notified asynchronously. As a result, the processing and network resources may be optimally used....
US-7,058,871 Circuit with expected data memory coupled to serial input lead
A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register...
US-7,058,862 Selecting different 1149.1 TAP domains from update-IR state
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for...
US-7,058,765 Processor with a split stack
Methods and apparatuses are disclosed for implementing a processor with a split stack. In some embodiments, the processor includes a main stack and a...
US-7,058,188 Configurable digital loudness compensation system and method
An audio loudness compensation system includes a level sensor receiving an audio input signal and operable to estimate a level of the audio input signal over a...
US-7,058,126 Digital graphametric equalizer
A graphametric equalizer has graphic and parametric equalization capabilities within a single non-redundant system. A translation function capability converts...
US-7,058,114 Wireless device and method
A high speed Bluetooth system with switch-to quadrature amplitude modulation allows for simple mobile devices with video data rates in applications such as...
US-7,058,074 Unified channel access for supporting quality of service (QoS) in a local area network
Contention communications often requires a station to wait an inordinate amount of time before the station is able to transmit its data successfully. In many...
US-7,057,982 Servo error detector for optical disk
A servo error detector usable in an optical disk system is provided. An envelope detecting unit (24) detects the top envelopes and bottom envelopes of RF signals...
US-7,057,540 Sigma-delta (.SIGMA..DELTA.) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer
A sigma-delta analog-to-digital converter-offers advantages such as noise shaping and high frequency operation. However, a sampling circuit needed to provide a...
US-7,057,409 Method and apparatus for non-invasively testing integrated circuits
The preferred embodiments of the present invention provide non-invasive approaches of testing ICs that use photon emission from semiconductor devices to provide...
US-7,057,284 Fine pitch low-cost flip chip substrate
A package is disclosed, which includes a substrate, a solder masker, and a first aperture through the solder mask. The substrate has a surface on which metal...
US-7,056,767 Method and apparatus for flip chip device assembly by radiant heating
A flip chip semiconductor device having non-solder contact terminals is assembled by securing the chip and substrate with a rapidly thermosetting adhesive. The...
US-7,056,752 Fabricating a die with test enable circuits between embedded cores
Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.