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Patent # Description
US-7,055,212 Clean gas injector system for reactor chamber
An improvement to a Novellus HDP SPEED reactor chamber is described. An evacuation port of the Novellus SPEED Chamber is at one location in the chamber to remove...
US-7,055,136 Configurable debug system with dynamic menus
The invention relates to a software system and method for dynamically varying context sensitive menus of a software system. In this method, a menu item is added...
US-7,054,958 Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in...
In a data processing system including a plurality of digital signal processor subsystems, selected peripheral components are shared by the digital signal...
US-7,054,698 System for tracking operator certification of FAB equipment and processes
A software system is provided that tracks employee and contractor operation/certification of fabrication equipment and processes is provided to ensure that only...
US-7,054,393 Short and long sequence boundary detection algorithm for wireless LAN modems
A method for detecting a boundary between two sequences in a wireless local area network is presented that permits rapid detection of the boundary. The method...
US-7,054,091 Digital processor controlled method and circuit for retracting a head carriage assembly to a parked position in...
A retract circuit (40) for retracting a data transducer carriage assembly (17) of a mass data storage device (10) to a retracted position has a digital state...
US-7,053,808 Suppressing digital-to-analog converter (DAC) error
A digital-to-analog converter (DAC) error suppression arrangement suppresses DAC error arising from mismatched elements contained in a DAC (640 and/or 645) that...
US-7,053,465 Semiconductor varactor with reduced parasitic resistance
A semiconductor varactor with reduced parasitic resistance. A contact isolation structure (32) is formed in a well region (20). The gate contact structures (70)...
US-7,052,150 Rod integrator
An integrating rod (200) for use with a multiple segment dynamic filter, such as a spiral dichroic color wheel having three or more narrow filters adjacent to...
US-7,051,427 Integrated circuit trimming device broken die sensor
A broken trim die tool detection sensor. The lands of the tie bar die connect with the leads of the unit to form switches. The states of these switches indicate...
US-7,051,257 Means scanning scan path parts sequentially and capturing response simultaneously
A Scan-BIST architecture is adapted into a low power Scan-BIST architecture. A generator 102, compactor 106, and controller 110 remain the same as in the known...
US-7,051,256 Processor emulator transferring data with emulation controller continuously without interruption
An emulator for emulating operations of data processing circuitry normally connected to and cooperable with a peripheral circuit includes serial scanning...
US-7,051,197 Tracing through reset
A method of tracing a data processor upon reset of the data processor. A data processor reset signal resets the data processor, part of trace collection hardware...
US-7,050,768 Signal field controller, method of controlling and MIMO transmitter employing the same
For use with a multiple-input, multiple-output (MIMO) transmitter, a signal field controller, a method of controlling signal fields and a MIMO transmitter...
US-7,050,576 Double talk, NLP and comfort noise
A state machine for attenuating the transition into and out of NLP state to reduce voice clipping and to reduce echo leak in a voice over packet signal...
US-7,050,552 System and method to mitigate pots ringing interference in DSL
A system and method are disclosed to mitigate the interference on DSL due to high frequency components associated with a change in a POTS condition, such as POTS...
US-7,050,463 Automatic bit-rate detection scheme for use on SONET transceiver
An automatic bit-rate detection scheme (30) for use in SONET/SDH transceivers (12, 14) that uses only one clocking frequency (clk), is all digital, and requires...
US-7,050,402 Wireless communications with frequency band selection
A probe, listen and select (PLS) technique can be used to select from an available frequency spectrum a frequency band whose communication quality is suitable...
US-7,050,323 Ferroelectric memory
A nonvolatile memory cell in the form of an SRAM is composed of ferroelectric capacitors and transistors for amplification. The memory cell comprises a first...
US-7,050,211 Torsional hinged mirror assembly with central spines and perimeter ridges to reduce flexing
A torsional hinged mirror design with reduced flexing. In addition to a central spine to prevent or reduce flexing of the tips, the mirror layer also includes...
US-7,050,191 Sub-banding of display list and video buffer for page rendering in a digital signal processor
A print method converts page description data specifying a print document into pixel data. The print system includes a central processing unit, a first memory...
US-7,050,187 Real time fax-over-packet packet loss compensation
A device and method for providing real time compensation for packet loss in the transmission of facsimile data over packet networks to avoid the generation of...
US-7,049,986 Fuse link trim algorithm for minimum residual
A parameter of an integrated circuit including a first trim array and a second trim array is trimmed by measuring an initial value of the parameter, determining...
US-7,049,842 Simultaneous pin short and continuity test on IC packages
An integrated circuit functionality test determining shorts between adjacent pins of all the IC pins while simultaneously determining pin continuity in only...
US-7,049,242 Post high voltage gate dielectric pattern plasma surface treatment
The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage...
US-7,047,823 Apparatus for mounting electronic module assembly in sensor
An occupant weight sensor (1) for placement between a frame (7) fixed to the chassis of a vehicle and a second frame (8) supporting a vehicle seat has a sense...
US-7,047,451 Tracing program counter addresses using native program counter format and instruction count format
A method of tracing program counter activity in a data processor periodically transmits a program counter sync point including the current program counter...
US-7,047,284 Transfer request bus node for transfer controller with hub and ports
A transfer request bus and transfer request bus node is described which is suitable for use in a data transfer controller processing multiple concurrent transfer...
US-7,047,272 Rounding mechanisms in processors
An arithmetic unit, for example a multiply and accumulate (MAC) unit 42, for a processing engine includes a partial product reduction tree 480. The partial...
US-7,047,270 Reporting a saturated counter value
A saturating count counts received event signals up to a first predetermined number. An overflow counter counts overflows up to a second predetermined number....
US-7,047,268 Address generators for mapping arrays in bit reversed order
A method and apparatus to reduce the amount of required memory and instruction cycles when implementing Fast Fourier Transforms (FFTs) on a computer system is...
US-7,047,263 Fast-settling digital filter and method for analog-to-digital converters
A technique and circuit is provided for facilitating a faster settling time for a digital filter for use with an analog-to-digital converter. An exemplary...
US-7,047,178 Emulation pause and reset tracing of multiple sync points pointing to different addresses
A method of tracing data processor activity includes trace data markers indicating initiation and termination of at least one trace function at a specified...
US-7,047,097 High performance controller for shifting resonance in micro-electro-mechanical systems (MEMS) devices
Devices being controlled electronically via physical manipulation often display a resonance. In many circumstances, the frequency range of operation is not close...
US-7,046,963 Method and apparatus of signal estimation over generalized fading channel
A methodology of signal estimation over the generalized fading channel can be applied to any parameter whose dB value is required to be estimated. The estimator...
US-7,046,306 Processing a video signal using motion estimation to separate luminance information from chrominance...
In one embodiment, a method for processing a video signal includes: (1) receiving and storing luminance and chrominance information for each pixel in a first...
US-7,046,105 System and method for threaded plunger assembly
A system and method for a plunger assembly includes a tuning slug with a bore in the stem, a tuning screw rotatably disposed in the stem, and a coupling assembly...
US-7,046,098 All-digital frequency synthesis with capacitive re-introduction of dithered tuning information
An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word...
US-7,046,069 Method to reduce inductive effects of current variations by internal clock phase shifting
Modularized clock decoupling and signal delay management is provided for the purpose of reducing simultaneous binary signal switch-induced inductive voltage...
US-7,046,044 Differential preamplifier having balanced resistor network
The present invention comprises a pair of circuits (171, 172) within the first stage (100) of an AC signal pre-amplifier. The present invention reduces the...
US-7,045,904 Patterned plasma treatment to improve distribution of underfill material
A patterned plasma treatment may be provided on the chip and/or the substrate to enhance the distribution of underfill material between the chip and the...
US-7,045,903 Integrated power circuits with distributed bonding and current flow
A semiconductor integrated circuit comprises contact pads located over active components, which are positioned to minimize the distance for power delivery...
US-7,045,456 MOS transistor gates with thin lower metal silicide and methods for making the same
Methods are presented for fabricating transistor gate structures, wherein upper and lower metal suicides are formed above a gate dielectric. In one example, the...
US-7,045,436 Method to engineer the inverse narrow width effect (INWE) in CMOS technology using shallow trench isolation (STI)
A method (200) of forming an isolation structure is disclosed, and includes forming an isolation trench in a semiconductor body (214) associated with an...
US-7,045,431 Method for integrating high-k dielectrics in transistor devices
Methods are disclosed that fabricating semiconductor devices with high-k dielectric layers. The invention removes portions of deposited high-k dielectric layers...
US-7,045,425 Bird's beak-less or STI-less OTP EPROM
The present invention facilitates semiconductor fabrication by maintaining uniform thickness of a gate oxide layer (112) during the oxide growth process of...
US-7,045,418 Semiconductor device including a dielectric layer having a gettering material located therein and a method of...
The present invention provides a semiconductor device (200), a method of manufacture therefor and an integrated circuit including the same. In one embodiment of...
US-7,045,410 Method to design for or modulate the CMOS transistor threshold voltage using shallow trench isolation (STI)
A method (200) of forming an isolation structure is disclosed, and includes forming a patterned isolation hard mask layer (206, 212) having an isolation opening...
US-7,044,356 Roller wire brake for wire bonding machine
While fabricating a packaged semiconductor chip, a wire is bonded on a chip contact pad using a wire bonding machine. A bond head of the wire bonding machine is...
US-7,044,304 Anti-corrosion overcoat cover tape
A flexible carrier tape system suitable for transporting and/or storing an electrical component, which has an exposed metal surface sensitive to corrosion. The...
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