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Low power input with hysteresis circuit and methods therefor
A low power input with hysteresis circuit provides input hysteresis (for instance, from supply voltage ranges of 0.8 volt to 5.5 volts), while reducing the...
Static logic design for CMOS
A static logic circuit with a pull-up network (155) and a pull-down network (160). The network is fabricated on SOI substrates and the pull-up network comprises...
Efficient frequency compensation for linear voltage regulators
The present application describes a frequency compensation scheme for a linear voltage regulator circuit, or its special case, a low-drop out voltage regulator...
Method and apparatus for fabricating self-aligned contacts in an integrated
An integrated circuit includes a substrate with a gate section projecting upwardly between spaced source and drain regions. Side walls project upwardly beyond...
Method for removing particles on semiconductor wafers
The purpose of the present invention is to remove minute particles adhered to the surface of semiconductor wafers effectively in the cleaning process of...
Interleaved coder and method
Turbo encoder with even-odd bit interleaving for upper and lower component convolutional encoders and symbol-level interleaving after mapping to modulation...
Apparatus for the mobile communication device in low power consumption
using LDO regulator with sleep mode
A mobile communications device (50) includes a plurality of LDOs (30) for supplying a stable voltage to various circuits on the device. In a normal mode, the...
Dynamic extension of frequency hopping patterns in wireless communications
In a duplex link (40, 60, 90, 116) coupling first and second frequency hopping wireless communication devices, either or both of the frequency hopping patterns...
Circuit structure integrating the power distribution functions of circuits
and leadframes into the chip surface
An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are...
Dual metal Schottky diode
An embodiment of the invention is a Schottky diode 22 having a semiconductor substrate 3, a first metal 24, a barrier layer 26, and second metal 28. Another...
Sub-lithographics opening for back contact or back gate
A low resistance buried back contact for SOI devices. A trench is etched in an insulating layer at minimum lithographic dimension, and sidewalls are deposited in...
Crossbar circuit having a plurality of repeaters forming different repeater
A crossbar circuit (30, 40, 50, 60, 70, 80, 90, 100) having programmable repeater structures adapted to allow configuration of the crossbar with inputs at...
Using PCMCIA/PCI drivers to control USB ports
A filter driver (125) can communicate with the USB stack and controller and with the CardBay, CardBus, and flashmedia stack and controller. This can allow the...
Method and device for providing and external interface using a programmed
configuration bit in flash memory
An external interface for a microprocessor system uses a programmed configuration bit to establish the functionality of a computer port, which improves external...
Method and apparatus to measure jitter
A method of determining jitter is provided by providing a sample, performing an unwrap of the data and then performing a Fast Fourier Transform (FFT) of the...
High-speed, high granularity baud clock generation
A baud clock (15) for use by a serial communication interface (67) is generated by dividing a base clock of the serial communication interface by one of a...
Adjustment of slave frequency hopping pattern to improve channel
measurement opportunities in wireless...
The frequency hopping pattern of a first wireless communication device is modified such that each transmission (73) to a second wireless communication device is...
Enhanced performance in frequency hopping wireless communications by
combining frequency dwelling with data...
In wireless communications between first and second frequency hopping wireless communication devices, both devices can dwell on a single selected frequency...
Method to measure throughput efficiency of low speed modem relay over
Modem relay provides a local interface to the modem on both ends of a call, demodulates the full duplex data stream, packetizes the bits for transport over an IP...
Reference generator system and methods for reading ferroelectric memory
cells using reduced bitline voltages
Methods (200) and systems (108) are provided for reading data from ferroelectric memory cells (106) in which charge is removed from a sense amp input...
Current limit protection scheme for PWM buck converter with synchronous
A embedded overcurrent protection circuit within the PWM feedback controller (30) of a power converter (100) having an novel current limit detection function...
System and method for custom-polarized photolithography illumination
In one embodiment, a system for custom-polarized photolithography illumination includes an illuminator operable to generate an illumination pattern of light, a...
Control timing for spatial light modulator
A spatial light modulator clocking method, called fast-clear, which employs embedded clear hardware in the SLM to enable the fast-clear bit to generate...
Integral nonlinearity error correction for interpolating string DAC
A segmented string digital-to-analog converter (DAC) comprises least significant bits (LSB subword) interpolation circuitry. The LSB subword interpolation...
Switching scheme to improve linearity and noise in switched capacitor stage
with switched feedback capacitor
A switch capacitor amplifier using a "bottom plate sampling" type arrangement in the feedback network to mitigate the reduction in linearity due to feedback...
Modulated transistor gate driver with planar pulse transformer
Disclosed are methods and apparatus for isolating and driving a power supply or power amplifier circuit. The circuits and methods provide for using a modulated...
Multiple-chip probe and universal tester contact assemblage
A probe card assemblage for simultaneously testing one or more integrated circuit chips including an interposer having on one surface a plurality of protruding...
Multiple mode switching regulator having an automatic sensor circuit for
A switching regulator having a control circuit that automatically senses when a low power mode should be initiated without the use of expensive external...
Architecture for switching between an external and internal power source
The present invention comprises a combination of a new circuit topology utilizing microcontroller (202, 302) and a modified logic control circuit which enables...
Semiconductor package production method and semiconductor package
A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer...
Integrated circuit having antenna proximity lines coupled to the
semiconductor substrate contacts
An embodiment of the invention is an integrated circuit 2 having antenna proximity lines 3 coupled to the semiconductor substrate 5. Another embodiment of the...
Method and structure for a low voltage CMOS integrated circuit
incorporating higher-voltage devices
A CMOS integrated circuit (15A-B-C) includes both relatively low-power (124, 126) and high-power (132, 134) CMOS transistors on the same chip. A 20V, relatively...
High capacitive density stacked decoupling capacitor structure
A capacitive structure (10). The capacitive structure comprises a semiconductor base region (30) having an upper surface, a well (12) formed within the...
Method of manufacturing semiconductor integrated circuit devices having a
memory device with a reduced bit line...
A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines...
Versatile system for triple-gated transistors with engineered corners
The present invention provides a system for producing a triple-gate transistor segment (300), utilizing a standard semiconductor substrate (302). The substrate...
Method and system for integrated circuit packaging
According to one embodiment of the invention, a method of packaging integrated circuits includes disposing an integrated circuit chip outwardly from a first...
Low cost substrate for an integrated circuit device with bondpads free of
Disclosed herein is a process for assembling an integrated circuit, as well as the assembly resulting from the process, employing a surface treatment of bondpad...
Photo reticles using channel assist features
Photo reticles (110) are formed comprising a first and second printable features (130), (140) which are connected by a channel assist feature (150). The size of...
Application programming interface with inverted memory protocol for
embedded software systems
A system and method is provided for enabling the reuse of algorithms in multiple application frameworks with no alterations required of the algorithm once it is...
Linking addressable shadow port and protocol for serial bus networks
Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of...
Local memory with indicator bits to support concurrent DMA and CPU access
A digital system is provided having at least one processor with an associated multi-segment local memory circuit. Validity circuitry is operable to indicate if...
System for processing measuring signals from a sensor
A system for processing the measuring signals from a sensor 12, including of a first micro-controller 10 having an input for the sensor data, a first memory 18,...
Residual feedback to improve estimator prediction
A system and method 100 of using residual feedback in a control loop in a manner that substantially eliminates the steady state error in the predicted states...
Data storage for a portable computer device
A system for loading data into a module to be used with a portable computer device and the data in the module activated by a wireless connection or from...
Multi-user network system and method of data communication using enhanced
A system and method of data communication for multiple stations using shared communication media within a network. A data communication message structure uses a...
Pull transfers and transfer receipt confirmation in a datapipe routing
In a network of digital signal processor nodes connected in a peer-to-peer relationship, a data packet sent to a node causes a return transmission from that...
Smart interface for payload transfers in networking applications
An apparatus and method for improving data transfers between a network and a network device is provided. The apparatus comprising a data input, a programmable...
Sense amplifier with reduced detection error
This invention provides a type of sense amplifier, a type of bit line circuit, a type of storage device, and a method for amplifying a read signal characterized...
Pulse width modulation sequence generation
A system and method for addressing and synchronizing a spatial light modulator (SLM) device and a scrolling color recovery (SCR) illumination system. This method...
Sigma-delta analog-to-digital converter (ADC) with truncation error
cancellation in a multi-bit feedback...
A method for reducing the complexity of a multi-bit DAC in a sigma-delta ADC. The DAC resolution can be made to be less than that of the quantizer by canceling...