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| Patent # | Description |
|---|---|
| US-7,136,810 |
Wideband speech coding system and method A speech encoder/decoder for wideband speech with a partitioning of wideband into lowband and highband, convenient coding of the lowband, and LP excited by noise... |
| US-7,136,626 |
Radio frequency modulator A transmitter architecture (200) provides for a stable and low noise modulator where the modulation bandwidth is uncorrelated to the TX loop bandwidth. The... |
| US-7,136,436 |
Boundary detection using multiple correlations Detecting a boundary between training sequences in a transmission is an important operation. In many communications systems, there are no special boundaries or... |
| US-7,136,422 |
Method and apparatus for capacity increase and enhanced communications
performance in CATV networks In a cable television (CATV) data communication network, channel throughput and communications robustness are increased in a manner that improves speed of data... |
| US-7,136,309 |
FIFO with multiple data inputs and method thereof A FIFO circuit includes a memory such as a register array having a plurality of storage locations. One or more data inputs can be coupled to the memory for... |
| US-7,136,006 |
Systems and methods for mismatch cancellation in switched capacitor
circuits Various circuits, systems and methods are disclosed for providing double-sampling sigma-delta modulator circuits. For example, circuits are disclosed that... |
| US-7,135,927 |
Ultra fast, low noise operational amplifier with dynamic biasing The present invention achieves technical advantages as an operational amplifier (30) having both a high slew rate and a full power bandwidth with low distortion... |
| US-7,135,920 |
Method and circuit for facilitating control of AC coupling in an amplifier
circuit A method and circuit for facilitating control of the AC coupling for addressing input offset in an amplifier circuit are provided. In accordance with an... |
| US-7,135,912 |
Methods and systems for decoupling the stabilization of two loops Circuits and methods for dynamically stabilizing a circuit having a relatively small capacitive load two current loop sub circuits are provided. A main current... |
| US-7,135,843 |
Switching power supply device The circuit provides a type of switching power supply device that can reduce the ripple voltage generated in the output when switching is performed in the... |
| US-7,135,840 |
DC/DC converter circuit and method for DC/DC conversion A DC/DC converter circuit including an inductance 10, two controllable switches 12, 14 and a controller 16 for controlling the switches 12, 14 is configured so... |
| US-7,135,781 |
Low profile, chip-scale package and method of fabrication Disclosed is a semiconductor device that includes an electrically insulating, sheet-like substrate (301) with first and second surfaces (301a, 301b), at least... |
| US-7,135,765 |
Semiconductor device package and method of making the same A semiconductor device package and a method of making the same are provided. The semiconductor device includes a package substrate, a layer of conductive... |
| US-7,135,759 |
Individualized low parasitic power distribution lines deposited over
active integrated circuits An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are... |
| US-7,135,397 |
Method and system for packaging ball grid arrays According to one embodiment of the invention, a method of packaging ball grid arrays includes providing a substrate having a plurality of holes formed therein.... |
| US-7,135,373 |
Reduction of channel hot carrier effects in transistor devices A transistor can be fabricated to exhibit reduced channel hot carrier effects. According to one aspect of the present invention, a method for fabricating a... |
| US-7,135,361 |
Method for fabricating transistor gate structures and gate dielectrics
thereof Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to... |
| US-7,134,947 |
Chemical mechanical polishing system According to one embodiment of the invention, a chemical mechanical polishing system includes a platen having a first surface adapted to couple a polishing pad... |
| US-7,134,061 |
At-speed ATPG testing and apparatus for SoC designs having multiple clock
domain using a VLCT test platform A scan test circuitry design imbedded on an SoC having the scan architecture of a VLCT platform is disclosed herein. This BIST circuitry design that is not... |
| US-7,133,821 |
Read FIFO scheduling for multiple streams while maintaining coherency A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out... |
| US-7,133,618 |
Method of aligning optical wireless transceivers comprising distinct
mirrors for transmitting and receiving A method simultaneously aligns the two sets of optical wireless link transceiver mirrors such that light traverses a path from the transmitting laser off an... |
| US-7,133,617 |
Reflection detection in an optical wireless link In an optical wireless network, where light beams are transmitted over-the-air, reflections of the transmitted light beams may cause a receiver of an optical... |
| US-7,133,459 |
Space-time transmit diversity A linear transformation of parallel space-time transmit diversity encoded streams; also, asymmetrical symbol mapping of parallel streams. Separately or together,... |
| US-7,133,457 |
Joint timing recovery for multiple signal channels A spatial diversity receiver and method for determining a multichannel combined symbol timing marker that identifies an energy concentration for a combination of... |
| US-7,133,444 |
Combined equalization for DMT-based modem receiver A DMT modem (40) is disclosed, in which a combined time domain equalizer and per-tone equalizer is applied to a received DMT signal. The combined equalizer... |
| US-7,133,435 |
Interference cancellation system and method A method for reducing multiple access interference (MAI) in a code division multiple access (CDMA) spread spectrum receiver assigned a number of codes which also... |
| US-7,133,422 |
Implementing enhanced distributed coordinating function (EDCF) with a
single hardware backoff counter A method for implementing a plurality of backoff counters on a hardware backoff counter for use in implementing a prioritized message transmission network is... |
| US-7,133,396 |
Dynamic assignment of retransmission slots for enhanced quality in
wireless communication links In wireless communication arrangements that utilize a transmission period of time followed by a retransmission period of time, the utilization and effectiveness... |
| US-7,133,304 |
Method and apparatus to reduce storage node disturbance in ferroelectric
memory Methods and ferroelectric devices are presented, in which pulses are selectively applied to ferroelectric memory cell wordlines to discharge cell storage node... |
| US-7,133,298 |
High frequency voltage regulating transformer based converter A switching regulator and method of fabricating a switching regulator is disclosed. In one embodiment a switching regulator comprises a transformer having a... |
| US-7,133,268 |
Current control via a variable voltage snubbing network System and method for controlling current across a load. A preferred embodiment comprises a current varying circuit (such as current varying circuit 525) that... |
| US-7,133,234 |
Hard disk drive preamplifier write driver The present invention discloses an apparatus (160) comprising a common mode generator circuit (162) coupled to a current directing circuit adapted to provide... |
| US-7,133,158 |
Method and apparatus for efficient caching and rendering of large patterns
in a small memory printer A method of performing a pattern fill operation of a pattern into a clipping region resolves the pattern into an intermediate format between a page description... |
| US-7,133,061 |
Multilaser bi-directional printer with an oscillating scanning mirror System and method for generating lines of data on a photosensitive medium for use with a display or a printing apparatus. The lines of data are generated by two... |
| US-7,132,845 |
FA tool using conductor model In a method and system for testing a test sample (190), a simulation program (130) is used to augment test results provided by a legacy test system (101). The... |
| US-7,132,740 |
Semiconductor package with conductor impedance selected during assembly A semiconductor package having a plurality of conductors arrayed in two (or more) parallel planes, and an available ground conductor. Conductors in the auxiliary... |
| US-7,132,365 |
Treatment of silicon prior to nickel silicide formation A method of preparing a die comprises treating exposed silicon to form an oxide prior to silicide formation; and depositing metal on the oxide. The metal may... |
| US-7,132,359 |
Tolerance bondwire inductors for analog circuitry Disclosed are wirebonding methods wherein bondwires are positioned using dynamically determined variations in die placement. Preferred methods of the invention... |
| US-7,132,340 |
Application of post-pattern resist trim for reducing pocket-shadowing in
SRAMs Methods (600, 700) are disclosed for minimizing the effect of pocket shadowing in the fabrication of an angled pocket implant (32) extending underlying a gate... |
| US-7,132,314 |
System and method for forming one or more integrated circuit packages
using a flexible leadframe structure In certain embodiments, a leadframe structure for forming one or more integrated circuit packages includes a number of adjacent substantially parallel lead bars... |
| US-7,131,762 |
Color rendering of illumination light in display systems A method and apparatus for compensating for deficiency in the illumination light from a light source is provided, where the spectrum in the visible range of... |
| US-7,131,114 |
Debugger breakpoint management in a multicore DSP device having shared
program memory A processing system comprises a digital signal processor (DSP) device and a host system on which the DSP device is implemented. The DSP device comprises a shared... |
| US-7,131,089 |
Computer program for programming an integrated circuit speed capability
indicator A computer programmed to specify a design of a circuit for indicating a potential speed capability of a data path in a predetermined circuit. The data path... |
| US-7,131,044 |
Means scanning scan path parts sequentially and capturing response
simultaneously Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan... |
| US-7,130,984 |
First-in first-out memory system with shift register fill indication An electronic device (10). The device comprises a memory structure (12) comprising an integer M of word storage locations. The device further comprises a write... |
| US-7,130,749 |
Wavelet analysis of signals to determine characteristics of anomalies in a
wire In one embodiment, a method for wavelet analysis of one or more signals to determine one or more characteristics of one or more anomalies in a wire includes... |
| US-7,130,415 |
Line Driver apparatus A line driver apparatus includes a peak detector operable to receive a data signal and output a first logic signal when the data signal is below a threshold... |
| US-7,130,345 |
Configurable equalization apparatus for multicarrier communications A number of basic equalization and demodulation structures have been shown to be appropriate for DMT systems depending on the channel, noise, and system... |
| US-7,130,335 |
Multi-line ADSL modem A multi-line ADSL modem (12) and network (10) whereby the multi-line ADSL modem (12) has connections to several ADSL modems (14) at a central office (CO) (16)... |
| US-7,130,182 |
Stacked capacitor and method for fabricating same The invention relates to a stacked capacitor (10) comprising a silicon base plate (16), a poly-silicon center plate (32) arranged above the base plate (16), a... |
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