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Dual ramp rate dielectric breakdown testing methodology
The present invention provides, in one aspect, a method of testing an electrical breakdown characteristic of a dielectric in a microelectronic device. This...
System with meshed power and signal buses on cell array
A method and apparatus for providing a meshed power and signal bus system on an array type integrated circuit that minimizes the size of the circuit. In a...
Ferroelectric memory cell with angled cell transistor active region and
methods for fabricating the same
Ferroelectric memory cells and fabrication methods are provided in which the memory cell comprises a ferroelectric capacitor in a capacitor layer above a...
Method for fabricating a multi-level integrated circuit having
scatterometry test structures stacked over same...
The present invention describes a plurality of scatterometry test structures for use in process control during fabrication of a semiconductor wafer having...
Hydrogen plasma photoresist strip and polymeric residue cleanup processs
for low dielectric constant materials
A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position...
Sensitive test structure for assessing pattern anomalies
A subset test module and associated methodology for utilizing the same are disclosed that facilitate identification of process drift in semiconductor fabrication...
Voice activated hypermedia systems using grammatical metadata
This is a voice activated Hypermedia system using grammatical metadata, the system comprising: a speech user agent; a browsing module; and an information...
Volume-responsive loudness compensation circuits, systems, and methods
An audio compensation system (20) for producing a sound compensated output signal (S.sub.o). The system comprises a volume control circuit (24) for producing a...
Apparatus for and method of optimizing the performance of a radio frequency
receiver in the presence of...
An apparatus for and method of extending the dynamic range of a RF communications receiver. The invention provides a mechanism for controlling the gain of both...
Increasing performance in modems in presence of noise
A digital communications system with a built-in apparatus for improving receive path performance in the presence of noise. An analog datastream is provided to a...
Low speed modem transmission over packet networks
A modem relay provides a local interface to the a modem on both ends of a call, demodulates the full duplex data stream, packetizes the bits for transport over...
Dynamic slave selection in frequency hopping wireless communications
Based on monitored quality of various frequency channels between first and second frequency hopping wireless communication devices, communications between the...
Delay system for generating control signals in ferroelectric memory devices
Ferroelectric memory devices and control circuits therefor are presented, in which memory array control and timing signals are derived according to tap outputs...
Adaptive control of power transients
Power transient control in an optical network by power measurement and prediction with a simple-to-compute model to drive an optical filter control.
Ultra low-power data retention latch
An embodiment of a ultra low-power data retention latch circuit involves a slave latch SL that concurrently latches the same data that is loaded into a main...
A voltage regulator includes a two-stage feedback circuit for driving a controller formed by a transistor 10. The feedback circuit includes an error amplifier 30...
Pulse drive of resonant MEMS devices
System and method for establishing and maintaining resonant oscillations of a torsional hinged device such as a pivotally hinged mirror. The system and methods...
Semiconductor chip mounting substrate and semiconductor device using it
A semiconductor device designed to reduce the warp of a substrate due to curing contraction, etc. of an insulation pattern while forming the insulation pattern...
An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the...
Programmable melody generator
A digital system and method of operation is provided in which musical notes and melodies are synthesized. The operation done for music synthesis is based on time...
Resonant pivoting surface with inertially coupled activation
A system and method for providing resonant movement about a first axis. A functional surface supported by a first pair of torsional hinges is driven into...
Instruction-programmable processor with instruction loop cache
An instruction-programmable processor, such as a digital signal processor, having a level one program cache memory and instruction buffer subsystem, is...
Fast fourier transform
A fast Fourier transform with sequential memory accessing within each stage.
Subsampling communication receiver architecture with relaxed IFA readout
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
Method of recovering and decoding of Manchester coded data
A method and apparatus for accurately decoding a Manchester data stream having transition time distortion and noise spikes. Briefly, in an embodiment using a...
Charge pump phase locked loop with improved power supply rejection
A phase lock loop circuit (60) has a phase frequency detector (62), a charge pump (64), an active filter (87) and a voltage-controlled oscillator (100). The...
Quad state logic design methods, circuits, and systems
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring...
System and method of evaluating gate oxide integrity for semiconductor
The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a...
Efficient pMOS ESD protection circuit
A pMOS transistor (601) is located in an n-well (602) and has at least one gate (603). Transistor (601) is connected between power pad Vdd or I/O pad (604) and...
Integrated circuit insulator and method
A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high...
Input/output buffer managed by sorted breakpoint hardware/software
A data processing device uses a portion of a random access memory as an input buffer for holding a portion of a stream of data which is being processed by a...
Echo analysis for identification of hybrid induced echo in a communication
Echo return loss is analyzed to determine if the near end connection of a communication link has hybrid induced echo. If the echo return loss is above a...
Joint equalization and decoding using a search-based decoding algorithm
A method and apparatus for joint equalization and decoding using a search-based decoding algorithm on a channel exhibiting intersymbol interference distortion is...
AAL2 receiver for filtering signaling/management packets in an ATM system
The present invention provides an apparatus, system and method for receiving asynchronous transfer mode (ATM) data cells on an ATM adaptation layer (AAL)...
Integrated TIR prism and lens element
Disclosed is an optical component, which comprises a prism element adjacent to a lens element, where the two elements are separated by a small air gap. In...
Guaranteed monotonic digital to analog converter
A hybrid Nyquist thermometer and sigma delta digital to analog converter is presented. The digital input signal is divided into most significant bits and least...
Low power, up full swing voltage CMOS bus receiver
A CMOS bus receiver for converting a reduced voltage swing input signal at an input node to a higher voltage swing output signal at an output node. The receiver...
Drain extend MOS transistor with improved breakdown robustness
A drain-extended metal-oxide-semiconductor transistor (40) with improved robustness in breakdown characteristics is disclosed. Field oxide isolation structures...
Dual-counterdoped channel field effect transistor and method
A field effect transistor with a dual-counterdoped channel is disclosed. The transistor features a channel comprising a first doped region (28) and a second...
Method and system for deflashing mold compound
A method and system for deflashing mold compound is provided. In one embodiment, a method for dislodging contaminants from an integrated circuit includes...
Prism for high contrast projection
Prism elements having TIR surfaces placed in close proximity to the active area of a SLM device 302 to separate unwanted off-state 324 and/or flat-state 326...
IC with serial scan path, protocol memory, and event circuit
A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register...
Context save and restore using test scan chains
A method for providing context save and restore using a test scan chain is provided. The method includes dividing a scan chain (34) of digital logic components...
Extended dynamic range watchdog timer
A data processor timer comprising a writeable control register, a look-up table and a loadable counter. The loadable counter operates in a first mode to load the...
Multi-tap, digital-pulse-driven mixer
A multi-tap, digital-pulse-driven mixer advantageously avoids local oscillator (11) leakage by shifting the local oscillator frequency (F.sub.LO) out of the...
System and method for assigning combiner channels in spread spectrum
A method for providing combiner channel assignments, with the soft symbols of corresponding demodulated information channels, is presented. The grouping of...
Semiconductor device having a data latching or storing function
The current consumed by latching data and during standby are significantly decreased in order to realize reduced power consumption. In this memory cell, source...
Generation of digital patterns for spatial light modulation
Disclosed is a method for generating patterns to be used in a spatial light modulator having a plurality of pixels. The method includes generating an optical...
Method and apparatus for reducing noise in analog-to-digital converter
An analog-to-digital converter apparatus has a plurality of stages. Each stage includes a residue amplifier having a first and second amplifier unit. Each of the...
SAR ADC providing digital codes with high accuracy and high throughput
An aspect of the invention improves accuracy of digital codes generated at the output of a SAR ADC by using multiple reference voltages. A first reference...