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Patent # Description
US-6,958,723 Method and apparatus for reducing noise in analog-to-digital converter devices
An analog-to-digital converter apparatus has a plurality of stages. Each stage includes a residue amplifier having a first and second amplifier unit. Each of the...
US-6,958,722 SAR ADC providing digital codes with high accuracy and high throughput performance
An aspect of the invention improves accuracy of digital codes generated at the output of a SAR ADC by using multiple reference voltages. A first reference...
US-6,958,715 Variable length decoding system and method
A method of decoding variable length codes converts a variable length code table into standard format decomposition tables from which a universal variable length...
US-6,958,628 Three-transistor NAND and NOR gates for two-phase clock generators
A two-phase non-overlapping clock generator (12) generating a sampling signal (20) utilizing a three transistor NAND gate (50). The NAND gate of the present...
US-6,958,523 On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and...
An integrated circuit programmable structure (60) is formed for use a trim resistor and/or a programmable fuse. The programmable structure comprises placing...
US-6,958,515 N-channel LDMOS with buried p-type region to prevent parasitic bipolar effects
An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions,...
US-6,958,294 Method for photoresist strip, sidewall polymer removal and passivation for aluminum metallization
An embodiment of the instant invention is a method of fabricating an electronic device formed on a semiconductor wafer, the method comprising the steps of:...
US-6,958,290 Method and apparatus for improving adhesion between layers in integrated devices
In an integrated device, a via is formed in a substrate layer and a barrier layer is formed on the substrate layer in the via. A seed layer is formed on the...
US-6,958,269 Memory device with reduced cell size
A method for manufacturing a memory device includes forming an oxide layer adjacent a substrate. A floating gate layer is formed and disposed outwardly from the...
US-6,958,260 Hydrogen gettering system
A method, system and materials for use in hydrogen gettering in conjunction with microelectronic and microwave components that are generally hermetically sealed...
US-6,957,315 TLB lock and unlock operation
A digital system and method of operation is provided in which several processing resources (340) and processors (350) are connected to a shared translation...
US-6,957,057 Switched capacitor mixer circuit to attain high gain and linearity in radio frequency receivers
By implementing the sampling process at an AC ground node, rather than at a signal side, and adding a gated transistor (610 and 620) in the signal path, the...
US-6,957,048 Switching circuit for charge and discharge of multiple battery systems
Multiple battery systems and switching networks are provided for portable electronic devices. A single switching cell is provided per battery and a load switch...
US-6,956,973 Image compression
A method of image encoding using subband decomposition followed by modified zerotree coding with a symbols for zero and significant zerotrees and isolated zeroes...
US-6,956,789 Cycle ready circuit for self-clocking memory device
A self-clocking memory device comprises a memory array, a memory input circuit, and a memory control circuit. The memory input circuit is operable to receive an...
US-6,956,684 Multilayered oscillating device with spine support
A multilayered torsional hinged device such as a scanning mirror including a hinge layer with an attaching member pivotally supported by torsional hinges. A...
US-6,956,683 Pivoting platform having a piezoelectric drive
A pivoted platform has two flexible arms having rigid end zones which are attached by means of spacers to piezoelectric elements. The piezoelectric elements are...
US-6,956,617 Image scaling and sample rate conversion by interpolation with non-linear positioning vector
A low-order polyphase interpolation filter, such as for decoding video and image signals, employs interpolation to facilitate sample rate conversion from a first...
US-6,956,560 Selection of mathematical objects from the history screen on a handheld device
A graphing calculator (10) having a user interface that allows the user to easily select mathematical objects from the history screen and incorporate those...
US-6,956,425 Clamping circuit for high-speed low-side driver outputs
A clamp for a FET switch utilizes a surge detector to turn off one of two bias circuits for the FET. The first biasing circuit provides the current necessary for...
US-6,956,398 Leakage current reduction method
The method for powering down a circuit for a data retention mode includes: changing a supply voltage node from an active power voltage level to an inactive power...
US-6,956,392 Heat transfer apparatus for burn-in board
An apparatus for transferring heat from semiconductor devices during a burn-in operation is disclosed. The apparatus includes a substantially planar base board...
US-6,956,356 Apparatus for improving protection of a battery pack in a very low power state
An apparatus for improving protection of a battery pack when the battery pack is in a very low power state, the battery pack including a plurality of battery...
US-6,956,350 Resonant scanning mirror driver circuit
A resonant scanning mirror driver configured to drive a micro-electro-mechanical system (MEMS) mirror to a desired deflection utilizes a PWM pattern selected...
US-6,956,282 Stabilizer/spacer for semiconductor device
The invention is a leadframe/stabilizer (35) for use with semiconductor devices. Stabilizer (35) is for stabilizing the space between of lead frame leads (36-39)...
US-6,956,267 Semiconductor with a nitrided silicon gate oxide and method
A method of fabricating a transistor includes providing a semiconductor substrate having a surface and forming a nitride layer outwardly of the surface of the...
US-6,955,980 Reducing the migration of grain boundaries
A method of forming a semiconductor device includes implanting a precipitate into a gate conductor of an at least partially formed semiconductor device. The gate...
US-6,954,918 Integrated circuit cells
According to one embodiment of the invention, a method for designing an integrated circuit is provided. The method includes providing a first transistor in a...
US-6,954,657 Wireless communication device having intelligent alerting system
A wireless device (100) having an optimum alert sequence definition analyzes its environment, including time and type of incoming call, and selects an...
US-6,954,505 Discrete multitone modulation with reduced peak-to-average ratio using unloaded subchannels
A transceiver (100) such as used in Discrete Multitone (DMT) modulation of digital signals for communication, such as in a DSL modem communications system, is...
US-6,954,468 Write allocation counter for transfer controller with hub and ports
The transfer controller with hub and ports uses a write allocation counter and algorithm to control data reads from a source port. The write allocation count is...
US-6,954,397 Circuit for reducing standby leakage in a memory unit
A circuit for reducing standby leakage in a memory unit contains a capacitive divider coupled to the memory unit so as to generate a voltage across the memory...
US-6,954,231 CMOS sensor camera with on-chip image compression
A digital camera (10) that has an array (11) of CMOS sensor elements (11a). The array (11) is read in a manner that performs spatial-to-frequency transforms for...
US-6,954,108 Fast-response current limiting
An amplifier (10") has a first amplifier stage (14) for producing a control current (I.sub.X) in response to an input voltage. A second amplifier stage (16) has...
US-6,954,080 Method and apparatus for die testing on wafer
Integrated circuit die on wafer are tested individually, without probing any of the die, using circuitry (TC1-8, BC1-8, LR1-8, RR1-8, PA1-PA4) provided on the...
US-6,953,986 Leadframes for high adhesion semiconductor devices and method of fabrication
A leadframe for use in the assembly of integrated circuit chips comprising a base metal structure having an adherent layer of nickel covering said base metal; an...
US-6,953,974 EEPROM device and method for providing lower programming voltage
An improved EEPROM device and method for providing a lower device programming voltage is disclosed. An exemplary EEPROM device is configured with a modified...
US-6,953,707 Method and system for chip-to-package interconnection
According to one embodiment of the invention, a method includes providing a semiconductor chip, providing a substrate, forming a plurality of cantilevered...
US-6,952,750 Method and device for providing a low power embedded system bus architecture
The tristateless bus interface communication scheme according to the present invention addresses many of the shortcomings of the prior art. In accordance with...
US-6,952,623 Permanent chip ID using FeRAM
An integrated circuit (IC) chip contains a small non-volatile "ID" memory such as an FeRAM array that stores information associated with manufacturing, testing,...
US-6,952,472 Dynamically estimating echo return loss in a communication link
A method of estimating an echo return loss of a communication link measures the peak power value of a signal received from a far end of a communication link and...
US-6,952,444 Blind DFE and phase correction
The digital communications receiver receives an analog signal, modulated with digital information. The receiver converts the analogue signal to a digital signal,...
US-6,952,356 Adaptive over-current detection
Disclosed are methods and apparatus for over-current detection in PWM power stages. Disclosed methods and apparatus provide over-current detection with adaptive...
US-6,952,226 Stray-insensitive, leakage-independent image sensing with reduced sensitivity to device mismatch and parasitic...
A single capacitor (C) can be used for both readout and noise reduction in an imaging sensor. This dual-purpose use of the single capacitor is facilitated by a...
US-6,952,130 Compensation of offset drift with temperature for operational amplifiers
A method and apparatus for compensating for offset and drift of offset in an amplifier circuit having metal oxide semiconductor transistors in an input stage...
US-6,952,120 Versatile system for controlling driver signal timing
The present invention provides a system (200) for controlling drive signal timing parameters of an output driver circuit (206). The present invention defines a...
US-6,951,980 Package for an electrical device
A package for an electrical device having at least one connection locus for providing selected electrical access to the device includes: (a) a substrate having...
US-6,951,812 Copper transition layer for improving copper interconnection reliability
The structure and the fabrication method of an integrated circuit in the horizontal surface of a semiconductor body comprising a dielectric layer over said...
US-6,951,769 Method for stripping sacrificial layer in MEMS assembly
The present invention provides methods of manufacturing a MEMS assembly. In one embodiment, the method includes mounting a MEMS device, such as a MEMS mirror...
US-6,950,761 Wavelet analysis of one or more acoustic signals to identify one or more anomalies in an object
In one embodiment, a method for wavelet analysis of one or more acoustic signals to identify one or more anomalies in an object includes receiving an acoustic...
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