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Receiver having automatic burst mode I/Q gain and phase balance
A method and apparatus for balancing I/Q gain and I/Q phase in a signal receiver. The receiver includes an IQ coefficient calculator, an IQ balancer, and a...
Transmitter and method having a low sampling frequency for digital to
An apparatus and a method having a low sampling clock frequency for converting a digital signal having IF frequency channels to an analog IF signal. A DAC uses...
System and method for self-leveling heat sink for multiple height devices
A self-leveling heat sink includes a spring-arm device having at least one aperture and at least one spring-arm is coupled to a substrate. The substrate has at...
Generating images quickly in raster image processing
A raster image processing system which supports multiple rendering/screening approaches, and selects an optimal approach suited for the specific images to be...
Authentication of a first transceiver unit with respect to a second
transceiver unit located at a distance
A method for the authentication of a transceiver unit with respect to a second transceiver unit, located at a distance to it. A first signal is transmitted via...
Voltage controlled oscillator having control current compensation
A voltage controlled oscillator (600) includes a voltage to current portion (400) that is inversely proportional to the semiconductor processing in order to...
Versatile system for electrostatic discharge protection utilizing silicon
The present invention provides a system for electrostatic discharge protection in a semiconductor device, utilizing a silicon-controlled rectifier (502). The...
Guard ring structure for a Schottky diode
A Schottky device having a substrate layer of a first conductivity type having a surface, and a guard ring formed over the surface of the substrate layer and...
Single poly-emitter PNP using DWELL diffusion in a BiCMOS technology
A method of forming a bipolar transistor device, and more particularly a vertical poly-emitter PNP transistor, as part of a BiCMOS type manufacturing process is...
Little offset in multicycle event maintaining cycle accurate tracing of
A method of tracing activity of a data processor includes collecting and transmitting trace data. An epause marker is embedded in the trace stream upon detection...
Single integrated circuit embodying a dual heterogenous processors with
separate instruction handling hardware
A single integrated circuit includes first and second data processors operating on different instruction sets independently operating on disjoint programs and...
Apparatus and method for configuring data cells
An apparatus is provided for configuring data cells received in a telecommunications process in a continuous stream of data cells of fixed length and each...
Scan interface with TDM feature for permitting signal overlay
A scan interface that includes control signals (TRST, TMS, TCK) and data signals (TDI, TDO) normally carried by respective signal paths of the scan interface can...
Universal broadband home network for scalable IEEE 802.11 based wireless
and wireline networking
The present home networking method and system is based on the IEEE 802.11 wireless networking standard expanded to encompass home phone line media communication...
Wireless communications with transceiver-integrated frequency shift control
and power control
Baseband processor and communication overloading can be relieved in a portable wireless communication terminal by decentralizing power control (38, 39) and...
Circuit for generating an output phase signal with a variable phase shift
relative to a reference phase
A circuit generating an output phase signal with an optionally variable phase shift relative to a reference phase. It includes an oscillator (10) outputting...
Method for estimating and removing a time-varying DC-offset
A method for estimating and removing a time varying DC-offset includes the steps of dividing the received burst into blocks (902), then finding the maximum and...
Ferroelectric latch type memory devices (102) are provided, comprising an input circuit (110) with first and second internal nodes (N1, N2) coupled with first...
Inrush current control method using a dual current limit power switch
A current limit circuit regulates the current flow through a power switch 90 by measuring the current through the switch 90 and comparing it to a reference...
Microminiature image pickup device
A microminiature CCD image pickup device with a shortened length that can be applied to an electronic medical endoscope or the like. Microminiature CCD image...
Visual program memory hierarchy optimization
In general, and in a form of the present invention, a method is provided for reducing execution time of a program executed on a digital system by improving hit...
Generating an oscillating signal according to a control current
Generating an oscillating signal according to a control current includes receiving a control current corresponding to an oscillation frequency. A first...
Impedance matched low noise amplifier
The present invention discloses an impedance matched low noise amplifier circuit (10) comprising a serially coupled first resistor (R1) and first transistor...
Thermal testing method for integrated circuit chips and packages
A method of thermally testing for whether an integrated circuit die is attached to a die pad, is provided. Heat is applied from an external heat source to a...
Method for forming a memory integrated circuit with bitlines over gates and
capacitors over bitlines
A process for fabricating a crown-cell capacitor in a memory integrated circuit. The process includes the step of forming a transistor having a contact region...
Multiple-gate MOSFET device with lithography independent silicon body
thickness and methods for fabricating the...
Multi-gate MOS transistors and fabrication methods are described, in which the transistor semiconductor body thickness or width is lithography independent,...
Method and device for removing particles on semiconductor wafers
The method for removing particles that adhere to the surface of semiconductor wafers is constituted so as to sequentially carry out a first cleaning process in...
Method of communicating data via a bus and bus system for implementing the
In a method of communicating data via a bus between several modules connected to the bus in accordance with the source synchronous clock principle the data is...
System and method for efficiently processing broadband network traffic
A broadband gateway 135 that combines a broadband modem 120 and a residential gateway 130 in a single unit. The single unit features a unique dual bridge, shared...
Plural circuit selection using role reversing control inputs
Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode...
SYSTEM AND METHOD OF DATA COMMUNICATION USING TRELLIS CODED MODULATION OR
TURBO TRELLIS CODED MODULATION IN...
A technique that combines either a trellis coded modulation (TCM) coding scheme or a turbo trellis coded modulation (TTCM) coding scheme with constellation...
Multiple bit memory cells and methods for reading non-volatile data
Memory cells are disclosed comprising volatile and non-volatile portions, where the non-volatile portions provide storage of multiple non-volatile data states or...
Two-dimensional blazed MEMS grating
A method for assuring a blazed condition in a DMD device used in telecommunications applications. By meeting certain conditions in the fabrication and operation...
Surface plasmon resonance sensor having real-time referencing
A disposable, portable, miniature surface plasmon resonance sensor (30) having real-time referencing capability in the presence of any interaction, without...
FM demodulator for SECAM decoder
A SECAM decoder and an FM modulator therefor are disclosed, in which a demodulated color signal is provided to indicate deviations in the frequency of modulated...
Display device for portable notebook computer
A portable computer having a display unit coupled to a base. The display unit includes an exterior display case, a screen, one or more liquid crystal display...
Charge-coupled amplifier and converter with matched offsets
An linear optical sensor charged-coupled topology using single-stage inverting charge-coupled amplifier driving an analog-to-digital converter which uses the...
Sigma delta class D architecture which corrects for power supply, load and
A sigma delta class D device that uses a low pass filter to smooth the output waveform and eliminate high frequency switching noise from the feedback value...
System and method for site-to-site yield comparison while testing
integrated circuit dies
Disclosed herein are systems and methods for testing the functionality of a plurality of integrated circuit dies formed in a plurality of rows on a semiconductor...
Electricity meter with multiple gains signal to an A/D converter
An auto-ranging electricity meter circuit having multiple current signal paths. Each of the current signal paths are amplified by a different amount of gain, and...
System and methods for home network communications
A system that permits use of existing cable TV wiring for home networking is disclosed. Because of the presence of splitters, notch filters, and other components...
Method of cross-mapping integrated circuit design formats
A method of cross-mapping integrated circuit ("IC") elements nets in a IC and/or directing a probe to points on an IC to achieve minimal interference from...
Versatile system for variance-based data analysis
The present invention defines a versatile system for analyzing accuracy of industrial measurement data. The system of the present invention compiles measurements...
Method and apparatus for performing multi-site integrated circuit device
Disclosed herein is an improved method and apparatus for simultaneously performing tests on several devices at the same time. An aspect of one embodiment of the...
Scalable high-speed precision frequency and phase synthesis
A clock synthesis circuit (22) including a phase-locked loop (25) and one or more frequency synthesis circuits (27; 77; 227; 237) is disclosed. A disclosed...
Automatic burst mode I/Q gain and I/Q phase calibration using packet
based-fixed correction coefficients
A method and apparatus for balancing I/Q gain and I/Q phase in a signal receiver. The receiver includes an IQ coefficient calculator and an IQ balancer. The IQ...
Efficient hard disk drive energy recovery circuit and method and a hard
disk drive incorporating the same
A hard disk drive energy recovery circuit, a method of recovering energy from a motor of a hard disk drive and a hard disk drive. In one embodiment, the hard...
Polynomial based multi-level screening
This invention is a computer implemented method of approximating a gray scale tone with a more limited range image producer. One of a plurality of tone curves is...
Analog optical black clamping circuit for a charge coupled device having
wide programmable gain range
An image processing apparatus (200) for a charge coupled device including analog front end circuitry having optical black and offset correction, whereby the...
Method and circuit for reducing quantizer input/output swing in a
Disclosed is a circuit and method for reducing output swing in a sigma delta modulator. The quantizer output swing reduction circuit and method of the present...