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Patent # Description
US-7,015,093 Capacitor integration at top-metal level with a protection layer for the copper surface
An on-chip decoupling capacitor (106) and method of fabrication. The decoupling capacitor (106) is integrated at the top metal interconnect level (104) and...
US-7,015,088 High-K gate dielectric defect gettering using dopants
One or more aspects of the present invention relate to forming a transistor while passivating electrically active defects associated with a top portion of a...
US-7,015,068 Partial wafer processing for random size wafers
A method of processing a partial wafer in accordance with one embodiment comprises includes after of loading partial wafer into wafer table of pick and place...
US-7,013,725 System and method for regulating bridge voltage in a discontinuous-time hot-wire anemometer
In accordance with the teachings of the present invention, a system and method for regulating bridge voltage in a discrete-time hot-wire anemometer is provided....
US-7,013,416 IC with expected data memory coupled to scan data register
A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register...
US-7,013,358 System for signaling serialized interrupts using message signaled interrupts
The present invention provides a system for signaling legacy serialized interrupts within a PCI-Express environment, using message signaled interrupts. The...
US-7,012,846 Sense amplifier for a memory array
A sense amplifier which senses whether current is present on a bit line, and generates one logical value if current is present and another logical value if...
US-7,012,717 Multi-level dither screening on a split arithmetic logic unit processor
This invention is a method of multilevel dither screening in a printer. Plural pixel values are packed into equal sections of a first data word. Corresponding...
US-7,012,467 Apparatus and method for compensating operating current in an amplifier when supply voltage varies
An apparatus for compensating operating current in an amplifier device when supply voltage to the amplifier device decreases below a predetermined value at an...
US-7,012,028 Transistor fabrication methods using reduced width sidewall spacers
Transistor fabrication methods (50) are presented in which shrinkable sidewall spacers (120) are formed (66, 68) along sides of a transistor gate (114), and a...
US-7,012,018 Metallic strain-absorbing layer for improved fatigue resistance of solder-attached devices
An integrated circuit chip 501 has a plurality of contact pads (FIG. 5B) to be connected by reflow attachment 510 to outside parts. The chip comprises a...
US-7,011,415 Yokeless hidden hinge digital micromirror device
A micromirror array fabricated on a semiconductor substrate. The array is comprised of three operating layers. An addressing layer is fabricated on the...
US-7,010,722 Embedded symmetric multiprocessor system debug
A test signal multiplexer receives supplies external test signals to a selected debug master central processing unit in a symmetrical multiprocessor system and...
US-7,010,381 Versatile system for controlling semiconductor topography
The present invention defines a system (200) for selectively controlling post-CMP dishing effects occurring in semiconductor wafers having copper metallization....
US-7,009,960 Medium access control protocol for high rate wireless personal area network
The MAC protocol of the present invention takes into account backward compatibility and conventional layering principles while introducing QoS parameters to...
US-7,009,864 Zero cancellation scheme to reduce plateline voltage in ferroelectric memory
Ferroelectric memory devices and methods are provided, wherein a cell plateline signal is applied to a ferroelectric target cell capacitor and a zero...
US-7,009,748 Resonant scanning mirror with inertially coupled activation
A system and method for providing a resonant beam sweep about a first axis. A mirror or reflective surface supported by a first pair of torsional hinges is...
US-7,009,745 Coating for optical MEMS devices
A micromechanical device having a deflectable member which contacts a stationary member. An antireflective coating is applied to portions of the micromechanical...
US-7,009,736 Tile map based multi-level supercell screening
This invention is a screening method. The input image is divided into a plurality of supercells. These supercells are divided into a plurality of individual...
US-7,009,549 Switched-capacitor circuit with scaled reference voltage
A pipelined analog-to-digital converter (ADC) (30) with improved precision is disclosed. The pipelined ADC (30) includes a sequence of stages (20), each of which...
US-7,009,450 Low distortion and high slew rate output stage for voltage feedback amplifier
A voltage feedback ("VF") operational amplifier ("op-amp") that includes a circuit operable to dynamically bias pre-driver transistors at the op amp output...
US-7,009,440 Pulse signal generator and display device
The objective of this invention is to provide a pulse signal generator with a simple constitution that can reduce the number of signals required for setting the...
US-7,009,369 Advanced monitoring algorithm for regulated power systems with single output flag
An improved method of monitoring the output power provided by a switch mode power converter that reduces the overall cost of the converter. The method includes...
US-7,007,552 Multi-channel pressure sensing apparatus
A multi-channel pressure sensor module (10) for integration in a hydraulic/electrical control unit of a vehicular braking system is shown. A body or manifold...
US-7,007,267 Transparent shared memory access in a software development system
The invention relates to a method for transparently writing to shared memory when debugging a multiple processor system. In this method, a software memory map...
US-7,007,052 Efficient real-time computation
Systems and methods for determining coefficients a filter are disclosed. The filter coefficients are computed by determining a sine of an input value and an...
US-7,006,995 Secure distribution of digital data
A secure digital data distribution system (100) for preventing unauthorized access to digital data. The system utilizes an identification system module (116)...
US-7,006,813 Efficient charge transfer using a switched capacitor resistor
The application of a non-zero voltage offset to rotating capacitors 1111 and 1112 permit the use of a single positive voltage supply. However, the precharging of...
US-7,006,626 Subscriber interface circuit
A subscriber line interface circuit is provided that posses an output impedance that may be greater than about 2.2 Kohms at at least some frequencies associated...
US-7,006,589 Frequency synthesizer with phase restart
A transmitter (10) based on a frequency synthesizer includes an LC tank (12) of a digitally controlled oscillator (DCO) with various arrays of capacitors. The LC...
US-7,006,585 Recovering data encoded in serial communication channels
A transition between values of two successive bits is detected. The bit after the transition is used as one of the recovered bits. A recovery circuit may...
US-7,006,521 External bus arbitration technique for multicore DSP device
A digital signal processing system includes multiple processor subsystems, an external input/output port (XPORT), and an XPORT arbiter. The processor subsystems...
US-7,006,423 Mark detecting circuit for an optical disk
A mark detecting circuit that stably and reliably detects the marks for address information from an optical disk having tracks formed in a spiral shape and...
US-7,006,313 Circuit and method to match common mode flex impedance and to achieve symmetrical switching voltage outputs of...
A write driver 100, 200, 300 is implemented to provide near-ground common mode output voltages to produce a more symmetrical head voltage swing (i.e. .+-.0.4V...
US-7,006,268 Bracket for supporting a torsional hinge mirror with reduced hinge stress
The present invention provides methods and apparatus for combining a pivoting mirror and support bracket such that the support bracket transmits little or no...
US-7,006,115 Supporting variable line length in digital display timing controllers using data enable signal
A digital display unit which receives horizontal lines of unequal length in a V-active region and computes an average length of the lines. The average is used to...
US-7,006,023 Sigma-delta modulator with passive bandpass loop filter
Digitizing a signal includes sampling and holding an analog signal to yield a sampled signal, where the analog signal includes information. The sampled signal is...
US-7,005,752 Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers...
US-7,005,745 Method and structure to reduce risk of gold embrittlement in solder joints
A method for reducing gold embrittlement in solder joints, and a copper-bearing solder according to the method, are disclosed. Embodiments of the invention...
US-7,005,742 Socket grid array
Assembly methods and semiconductor device assemblies are disclosed in which corresponding IC sockets and PCB projections are used for alignment and bond...
US-7,005,719 Integrated circuit structure having a flip-chip mounted photoreceiver
An apparatus comprising an integrated circuit structure is provided. The integrated circuit structure comprises a substrate and a photoreceiver. The substrate...
US-7,005,365 Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes
The present invention provides, in one embodiment, a method (100) of forming dual work function metal gate electrodes in a semiconductor device. The method...
US-7,005,361 Providing high precision resistance in an integrated circuit using a thin film resistor of controlled dimension
In one embodiment, an integrated circuit includes a thin film resistor, which includes a resistor material that has been deposited on a substrate surface within...
US-7,005,354 Depletion drain-extended MOS transistors and methods for making the same
Depletion drain-extended MOS transistor devices and fabrication methods for making the same are provided, in which a compensated channel region is provided with...
US-7,005,101 Virtual gate design for thin packages
The mold for a thin package uses a gate which has a high aspect ratio, about 30 degrees or greater throughout the length of the gate. Additionally, the depth of...
US-7,003,707 IC tap/scan test port access with tap lock circuitry
Connection circuitry provides for TAP and internal scan test ports to be merged so they both can co-exist and operate from the same set of IC pins and/or core...
US-7,003,276 Subsampling communication receiver architecture with gain control and RSSI generation
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
US-7,003,016 Maximum likelihood timing synchronizers for sampled PSK burst TDMA system
A method of producing a correction signal includes receiving a predetermined data sequence (500). The data sequence is sampled at predetermined times, thereby...
US-7,002,975 Multiprocessor network node failure detection and recovery
In a node failure detection technique at least one supervisory data processing node periodically transmits a receipt acknowledge data packet to each other data...
US-7,002,930 Method of optimal power distribution for communication systems
A method of optimally distributing signal power for multiple users over a xDSL or wireless channel considers uses computationally efficient tools to achieve...
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