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Patent # Description
US-6,965,162 Semiconductor chip mounting substrate and semiconductor device using it
A semiconductor device designed to reduce the warp of a substrate due to curing contraction, etc. of an insulation pattern while forming the insulation pattern...
US-6,965,136 Photon-blocking layer
An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the...
US-6,965,069 Programmable melody generator
A digital system and method of operation is provided in which musical notes and melodies are synthesized. The operation done for music synthesis is based on time...
US-6,964,196 Resonant pivoting surface with inertially coupled activation
A system and method for providing resonant movement about a first axis. A functional surface supported by a first pair of torsional hinges is driven into...
US-6,963,965 Instruction-programmable processor with instruction loop cache
An instruction-programmable processor, such as a digital signal processor, having a level one program cache memory and instruction buffer subsystem, is...
US-6,963,891 Fast fourier transform
A fast Fourier transform with sequential memory accessing within each stage.
US-6,963,732 Subsampling communication receiver architecture with relaxed IFA readout timing
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
US-6,963,295 Method of recovering and decoding of Manchester coded data
A method and apparatus for accurately decoding a Manchester data stream having transition time distortion and noise spikes. Briefly, in an embodiment using a...
US-6,963,233 Charge pump phase locked loop with improved power supply rejection
A phase lock loop circuit (60) has a phase frequency detector (62), a charge pump (64), an active filter (87) and a voltage-controlled oscillator (100). The...
US-6,963,225 Quad state logic design methods, circuits, and systems
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring...
US-6,963,206 System and method of evaluating gate oxide integrity for semiconductor microchips
The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a...
US-6,963,111 Efficient pMOS ESD protection circuit
A pMOS transistor (601) is located in an n-well (602) and has at least one gate (603). Transistor (601) is connected between power pad Vdd or I/O pad (604) and...
US-6,962,883 Integrated circuit insulator and method
A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high...
US-6,961,715 Input/output buffer managed by sorted breakpoint hardware/software
A data processing device uses a portion of a random access memory as an input buffer for holding a portion of a stream of data which is being processed by a...
US-6,961,421 Echo analysis for identification of hybrid induced echo in a communication link
Echo return loss is analyzed to determine if the near end connection of a communication link has hybrid induced echo. If the echo return loss is above a...
US-6,961,392 Joint equalization and decoding using a search-based decoding algorithm
A method and apparatus for joint equalization and decoding using a search-based decoding algorithm on a channel exhibiting intersymbol interference distortion is...
US-6,961,340 AAL2 receiver for filtering signaling/management packets in an ATM system
The present invention provides an apparatus, system and method for receiving asynchronous transfer mode (ATM) data cells on an ATM adaptation layer (AAL)...
US-6,961,194 Integrated TIR prism and lens element
Disclosed is an optical component, which comprises a prism element adjacent to a lens element, where the two elements are separated by a small air gap. In...
US-6,961,013 Guaranteed monotonic digital to analog converter
A hybrid Nyquist thermometer and sigma delta digital to analog converter is presented. The digital input signal is divided into most significant bits and least...
US-6,960,946 Low power, up full swing voltage CMOS bus receiver
A CMOS bus receiver for converting a reduced voltage swing input signal at an input node to a higher voltage swing output signal at an output node. The receiver...
US-6,960,807 Drain extend MOS transistor with improved breakdown robustness
A drain-extended metal-oxide-semiconductor transistor (40) with improved robustness in breakdown characteristics is disclosed. Field oxide isolation structures...
US-6,960,499 Dual-counterdoped channel field effect transistor and method
A field effect transistor with a dual-counterdoped channel is disclosed. The transistor features a channel comprising a first doped region (28) and a second...
US-6,960,119 Method and system for deflashing mold compound
A method and system for deflashing mold compound is provided. In one embodiment, a method for dislodging contaminants from an integrated circuit includes...
US-6,959,990 Prism for high contrast projection
Prism elements having TIR surfaces placed in close proximity to the active area of a SLM device 302 to separate unwanted off-state 324 and/or flat-state 326...
US-6,959,408 IC with serial scan path, protocol memory, and event circuit
A digital bus monitor used to observe data on a bus (14, 16, 18) connecting multiple integrated circuits (10, 12) comprises a memory buffer (30), bypass register...
US-6,959,407 Context save and restore using test scan chains
A method for providing context save and restore using a test scan chain is provided. The method includes dividing a scan chain (34) of digital logic components...
US-6,959,404 Extended dynamic range watchdog timer
A data processor timer comprising a writeable control register, a look-up table and a loadable counter. The loadable counter operates in a first mode to load the...
US-6,959,049 Multi-tap, digital-pulse-driven mixer
A multi-tap, digital-pulse-driven mixer advantageously avoids local oscillator (11) leakage by shifting the local oscillator frequency (F.sub.LO) out of the...
US-6,959,033 System and method for assigning combiner channels in spread spectrum communications
A method for providing combiner channel assignments, with the soft symbols of corresponding demodulated information channels, is presented. The grouping of...
US-6,958,948 Semiconductor device having a data latching or storing function
The current consumed by latching data and during standby are significantly decreased in order to realize reduced power consumption. In this memory cell, source...
US-6,958,841 Generation of digital patterns for spatial light modulation
Disclosed is a method for generating patterns to be used in a spatial light modulator having a plurality of pixels. The method includes generating an optical...
US-6,958,723 Method and apparatus for reducing noise in analog-to-digital converter devices
An analog-to-digital converter apparatus has a plurality of stages. Each stage includes a residue amplifier having a first and second amplifier unit. Each of the...
US-6,958,722 SAR ADC providing digital codes with high accuracy and high throughput performance
An aspect of the invention improves accuracy of digital codes generated at the output of a SAR ADC by using multiple reference voltages. A first reference...
US-6,958,715 Variable length decoding system and method
A method of decoding variable length codes converts a variable length code table into standard format decomposition tables from which a universal variable length...
US-6,958,628 Three-transistor NAND and NOR gates for two-phase clock generators
A two-phase non-overlapping clock generator (12) generating a sampling signal (20) utilizing a three transistor NAND gate (50). The NAND gate of the present...
US-6,958,523 On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and...
An integrated circuit programmable structure (60) is formed for use a trim resistor and/or a programmable fuse. The programmable structure comprises placing...
US-6,958,515 N-channel LDMOS with buried p-type region to prevent parasitic bipolar effects
An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions,...
US-6,958,294 Method for photoresist strip, sidewall polymer removal and passivation for aluminum metallization
An embodiment of the instant invention is a method of fabricating an electronic device formed on a semiconductor wafer, the method comprising the steps of:...
US-6,958,290 Method and apparatus for improving adhesion between layers in integrated devices
In an integrated device, a via is formed in a substrate layer and a barrier layer is formed on the substrate layer in the via. A seed layer is formed on the...
US-6,958,269 Memory device with reduced cell size
A method for manufacturing a memory device includes forming an oxide layer adjacent a substrate. A floating gate layer is formed and disposed outwardly from the...
US-6,958,260 Hydrogen gettering system
A method, system and materials for use in hydrogen gettering in conjunction with microelectronic and microwave components that are generally hermetically sealed...
US-6,957,315 TLB lock and unlock operation
A digital system and method of operation is provided in which several processing resources (340) and processors (350) are connected to a shared translation...
US-6,957,057 Switched capacitor mixer circuit to attain high gain and linearity in radio frequency receivers
By implementing the sampling process at an AC ground node, rather than at a signal side, and adding a gated transistor (610 and 620) in the signal path, the...
US-6,957,048 Switching circuit for charge and discharge of multiple battery systems
Multiple battery systems and switching networks are provided for portable electronic devices. A single switching cell is provided per battery and a load switch...
US-6,956,973 Image compression
A method of image encoding using subband decomposition followed by modified zerotree coding with a symbols for zero and significant zerotrees and isolated zeroes...
US-6,956,789 Cycle ready circuit for self-clocking memory device
A self-clocking memory device comprises a memory array, a memory input circuit, and a memory control circuit. The memory input circuit is operable to receive an...
US-6,956,684 Multilayered oscillating device with spine support
A multilayered torsional hinged device such as a scanning mirror including a hinge layer with an attaching member pivotally supported by torsional hinges. A...
US-6,956,683 Pivoting platform having a piezoelectric drive
A pivoted platform has two flexible arms having rigid end zones which are attached by means of spacers to piezoelectric elements. The piezoelectric elements are...
US-6,956,617 Image scaling and sample rate conversion by interpolation with non-linear positioning vector
A low-order polyphase interpolation filter, such as for decoding video and image signals, employs interpolation to facilitate sample rate conversion from a first...
US-6,956,560 Selection of mathematical objects from the history screen on a handheld device
A graphing calculator (10) having a user interface that allows the user to easily select mathematical objects from the history screen and incorporate those...
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