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Method and apparatus for exponential gain variations with a linearly
varying input code
A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is...
Load sensing voltage regulator for PLL/DLL architectures
An apparatus includes a voltage regulator operable to regulate a supply voltage to an on-chip module having an operational current, draw a supply current, and...
Voltage regulator with switch-on protection circuit
Voltage regulator with an output transistor MP1, including a first PMOS FET, whereby the input voltage Vdd of the voltage regulator is applied to the source of...
Low leakage Ioff and overvoltage Ioz circuit
A blocking circuit technique achieves very low Ioff and Ioz leakage in low power digital logic devices that incorporate Ioff and overvoltage tolerance. The...
Magnetic position sensor apparatus and method
A magnetic position sensor has a stator (16', 36, 52) formed of magnetic material and a pair of magnets (14a, 14b; 34a, 34b; 54a, 54b; 64a, 64b) rotatably...
Variable cross-section plated mushroom with stud for bumping
An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated...
Semiconductor device having an angled compensation implant and method of
The present invention provides a semiconductor device 200 having an angled compensation implant, a method of manufacture therefore and a method of manufacturing...
MOS ESD CDM clamp with integral substrate injection guardring and method
The present invention includes a MOS device (100) that has a P-type substrate (102) and an N-type drain region (104) formed within the substrate (102). An...
Method to improve the uniformity and reduce the surface roughness of the
silicon dielectric interface
The instant invention is a method for forming a smooth interface between the upper surface of a silicon substrate and a dielectric layer. The invention comprises...
Selective dry etching of tantalum and tantalum nitride
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers (30) are often used in ...
Ideal operational amplifier layout techniques for reducing package stress
and configurations therefor
A method of reducing package stress includes placing matched components of an op-amp substantially in a region of a die having the least stress gradients. The...
Apparatus and method for graphically displaying a vector simultaneously
along with the numerical values of its...
A handheld computing device (40) comprises a software application adapted to provide instructions to graphically display a vector on a display screen (48)...
Automatic recognition of locator die in partial wafermap process
An off-line partial wafer scanner system is disclosed that resolves partial wafermap related issues that result holt-lot in semiconductor assembly. The system...
Method and apparatus for compressing image information
A system (10) includes an image detector (12) which is a video camera, and which detects and outputs a succession of video images of a selected subject. A...
Method and apparatus for coordinating multi-point to point communications
in a multi-tone data transmission system
A variety of bi-directional data transmission systems that facilitate communications between a plurality of remote units (15) and a central unit (10) using a...
Active border pixels for digital micromirror device
A method of ensuring that border pixels of a micromirror device are set to the "off" position. The method is typically performed at the factory, during...
Code-controlled voltage divider
A code-controlled voltage divider (20) is disclosed. The voltage divider (20) includes an upper portion with a resistor (22) and a dummy switching transistors...
Sampling/holding method and circuit
The objective is to provide a sampling/holding circuit that can operate at high speed and low power consumption. The sampling/holding circuit has multiple...
Heatsink-substrate-spacer structure for an integrated-circuit package
A packaged integrated circuit that includes a substrate 310; a chip 300 mounted on the substrate; and a heatsink 350 mounted on the chip. The heatsink has a...
Metal gate MOS transistors and methods for making the same
Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal boride is formed above a gate...
Generating an optical model for lens aberrations
Generating an optical model includes receiving lens aberration data associated with a wafer response to lens aberrations. Aberration functions are selected and...
Traffic controller using priority and burst control for reducing access
A memory traffic access controller (18) responsive to a plurality of requests to access a memory. The controller includes circuitry (18d) for associating, for...
Control loop status maintainer for temporarily opened control loops
A system provides primary and alternate control circuits to a controlled system through an output port. A monitoring circuit that monitors a parameter of the...
Transcoding scheme for assistance in image transformations
This invention proposes to transcode the compressed image, that may be in the JPEG format for example, to an intermediate format that allows pseudo-random...
Computing the full path metric in viterbi decoding
By utilizing an additional counter and monitoring the maximum state metric at each stage, only forward progressing modulo wrap-arounds will occur and these can...
ESD protection of noise decoupling capacitors
Electrostatic discharge protection devices formed at a face of a semiconductor substrate, integrated with a component sensitive to electrostatic discharge,...
Digital still camera system and method
An interpolation for a Bayer pattern color-filtered array with edge enhancement by clamping green interpolation values.
Applying desired voltage at a node
To apply a desired voltage at a node driving a load impedance, a voltage source providing the desired voltage is connected to the node. In addition, a current...
Testing of mixed signal integrated circuits generating analog signals from
digital data elements
Testing of a mixed signal integrated circuit (IC) potentially in the form of a die using a tested/calibrated integrated circuit. In an embodiment, the mixed...
Output stage for high gain and low distortion operational amplifier
A class-AB MOS output stage that provides higher gain and significantly lower distortion. The class-AB MOS output stage includes a PMOS output transistor and an...
Systems and methods of performing duty cycle control
The present invention facilitates serial communication by performing duty cycle correction. A duty cycle correction component 302 performs duty cycle corrections...
Electrostatic discharge testers for undistorted human-body-model and
An equipment (400) for testing semiconductor device performance under high energy pulse conditions, which comprises a high voltage generator (401) and an on/off...
Method and system for determining transistor degradation mechanisms
According to one embodiment, a method for isolating degradation mechanisms in transistors includes providing a ring oscillator having a plurality of delay...
Substrate pump ESD protection for silicon-on-insulator technologies
An electrostatic discharge (ESD) protection device formed in the semiconductor layer of a semiconductor-on-insulator device, wherein the semiconductor layer has...
Method for transistor gate dielectric layer with uniform nitrogen
The instant invention describes a method for forming a dielectric film with a uniform concentration of nitrogen. The films are formed by first incorporating...
Methods for improving well to well isolation
Methods are provided for forming wells in a semiconductor wafer, in which p-wells and n-wells are formed in a substrate, and first p-type dopants are implanted...
Aluminum leadframes for semiconductor devices and method of fabrication
A leadframe for use with integrated circuit chips comprising a leadframe base made of aluminum or aluminum alloy having a surface layer of zinc; a first layer of...
Method and system for flip chip packaging
According to one embodiment of the invention, a method of packaging flip chips includes providing a plurality of flip chips and a panel, forming a plurality of...
System and method for integrated oxide removal and processing of a
An integrated oxide removal and processing system (10) includes a process module (30) that may intentionally add at least one film layer to a single ...
Interrupt throttling for inter-processor communications
Implementation of communication between data processors includes a first task (A) running on a first data processor (11) determining that communication is...
Multiprocessor emulation support using dynamic linking
A method and system for dynamically linked emulation with a mix of target debuggers on a host computer wherein a debugger for each processor on the target system...
Fully integrated low noise multi-loop synthesizer with fine frequency
resolution for HDD read channel and RF...
A low noise multi-loop radio frequency synthesizer receives an input reference signal having a frequency f.sub.R, into a fine tune PLL and a coarse tune PLL. The...
Frequency hopping wireless communication system with filtered adaptive
A wireless communication network comprising a wireless receiver. The wireless receiver comprises at least a first antenna for receiving packets, wherein each of...
ATM processor for switching in an ATM system
The present invention provides an apparatus and system for high speed end-to-end telecommunication traffic using an Asynchronous Transfer Mode (ATM) architecture...
Integrated circuits, systems, apparatus, packets and processes utilizing
path diversity for media over packet...
In one form of the invention, a process of sending real-time information from a sender computer (103) to a receiver computer (105) coupled to the sender computer...
Self-timed strobe generator and method for use with multi-strobe random
access memories to increase memory...
A circuit takes a reference strobe signal as a first input, and a strobe ready signal generated from a memory that is strobed by the reference strobe signal as a...
Hardware extensions for image and video processing
A processing device (200) includes three hardware extensions: a motion estimation extension 202, a pixel interpolation extension 204 and a DCT/iDCT extension...
Method and apparatus for high resolution tracking via mono-pulse
beam-forming in a communication system
Method and apparatus for high resolution tracking via mono-pulse beam-forming in a communication system in which the capacity and range of mobile or fixed...
Continuous time fourth order delta sigma analog-to-digital converter
A fourth order delta sigma analog-to-digital converter is presented, comprising a passive delta sigma modulator including a passive filter, a quantizer, and a...
Zero voltage class AB minimal delay output stage and method
A class AB output circuit includes a P-channel pullup transistor (M13) having a source coupled to a supply voltage, a drain coupled to an output(10), a gate...