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Patent # Description
US-6,969,638 Low cost substrate for an integrated circuit device with bondpads free of plated gold
Disclosed herein is a process for assembling an integrated circuit, as well as the assembly resulting from the process, employing a surface treatment of bondpad...
US-6,968,528 Photo reticles using channel assist features
Photo reticles (110) are formed comprising a first and second printable features (130), (140) which are connected by a channel assist feature (150). The size of...
US-6,968,438 Application programming interface with inverted memory protocol for embedded software systems
A system and method is provided for enabling the reuse of algorithms in multiple application frameworks with no alterations required of the algorithm once it is...
US-6,968,408 Linking addressable shadow port and protocol for serial bus networks
Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of...
US-6,968,400 Local memory with indicator bits to support concurrent DMA and CPU access
A digital system is provided having at least one processor with an associated multi-segment local memory circuit. Validity circuitry is operable to indicate if...
US-6,968,276 System for processing measuring signals from a sensor
A system for processing the measuring signals from a sensor 12, including of a first micro-controller 10 having an input for the sensor data, a first memory 18,...
US-6,968,258 Residual feedback to improve estimator prediction
A system and method 100 of using residual feedback in a control loop in a manner that substantially eliminates the steady state error in the predicted states...
US-6,968,208 Data storage for a portable computer device
A system for loading data into a module to be used with a portable computer device and the data in the module activated by a wireless connection or from...
US-6,967,965 Multi-user network system and method of data communication using enhanced preamble
A system and method of data communication for multiple stations using shared communication media within a network. A data communication message structure uses a...
US-6,967,950 Pull transfers and transfer receipt confirmation in a datapipe routing bridge
In a network of digital signal processor nodes connected in a peer-to-peer relationship, a data packet sent to a node causes a return transmission from that...
US-6,967,920 Smart interface for payload transfers in networking applications
An apparatus and method for improving data transfers between a network and a network device is provided. The apparatus comprising a data input, a programmable...
US-6,967,883 Sense amplifier with reduced detection error
This invention provides a type of sense amplifier, a type of bit line circuit, a type of storage device, and a method for amplifying a read signal characterized...
US-6,967,759 Pulse width modulation sequence generation
A system and method for addressing and synchronizing a spatial light modulator (SLM) device and a scrolling color recovery (SCR) illumination system. This method...
US-6,967,608 Sigma-delta analog-to-digital converter (ADC) with truncation error cancellation in a multi-bit feedback...
A method for reducing the complexity of a multi-bit DAC in a sigma-delta ADC. The DAC resolution can be made to be less than that of the quantizer by canceling...
US-6,967,525 Tail current generator circuit for bipolar/MOS differential pair to set precise transconductance
Disclosed is a circuit and method for generating a tail current for a main reader amplifier (200) input stage using a scaled master differential stage (160) with...
US-6,967,508 Compact frequency doubler/multiplier circuitry
The frequency doubling circuit and method provides an output signal with stable frequency and a 50% duty cycle. The frequency of the output signal is two times a...
US-6,967,499 Dual ramp rate dielectric breakdown testing methodology
The present invention provides, in one aspect, a method of testing an electrical breakdown characteristic of a dielectric in a microelectronic device. This...
US-6,967,371 System with meshed power and signal buses on cell array
A method and apparatus for providing a meshed power and signal bus system on an array type integrated circuit that minimizes the size of the circuit. In a...
US-6,967,365 Ferroelectric memory cell with angled cell transistor active region and methods for fabricating the same
Ferroelectric memory cells and fabrication methods are provided in which the memory cell comprises a ferroelectric capacitor in a capacitor layer above a...
US-6,967,349 Method for fabricating a multi-level integrated circuit having scatterometry test structures stacked over same...
The present invention describes a plurality of scatterometry test structures for use in process control during fabrication of a semiconductor wafer having...
US-6,967,173 Hydrogen plasma photoresist strip and polymeric residue cleanup processs for low dielectric constant materials
A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a layer (215) of a first material in a fixed position...
US-6,967,110 Sensitive test structure for assessing pattern anomalies
A subset test module and associated methodology for utilizing the same are disclosed that facilitate identification of process drift in semiconductor fabrication...
US-6,965,864 Voice activated hypermedia systems using grammatical metadata
This is a voice activated Hypermedia system using grammatical metadata, the system comprising: a speech user agent; a browsing module; and an information...
US-6,965,676 Volume-responsive loudness compensation circuits, systems, and methods
An audio compensation system (20) for producing a sound compensated output signal (S.sub.o). The system comprises a volume control circuit (24) for producing a...
US-6,965,655 Apparatus for and method of optimizing the performance of a radio frequency receiver in the presence of...
An apparatus for and method of extending the dynamic range of a RF communications receiver. The invention provides a mechanism for controlling the gain of both...
US-6,965,638 Increasing performance in modems in presence of noise
A digital communications system with a built-in apparatus for improving receive path performance in the presence of noise. An analog datastream is provided to a...
US-6,965,600 Low speed modem transmission over packet networks
A modem relay provides a local interface to the a modem on both ends of a call, demodulates the full duplex data stream, packetizes the bits for transport over...
US-6,965,590 Dynamic slave selection in frequency hopping wireless communications
Based on monitored quality of various frequency channels between first and second frequency hopping wireless communication devices, communications between the...
US-6,965,520 Delay system for generating control signals in ferroelectric memory devices
Ferroelectric memory devices and control circuits therefor are presented, in which memory array control and timing signals are derived according to tap outputs...
US-6,965,470 Adaptive control of power transients
Power transient control in an optical network by power measurement and prediction with a simple-to-compute model to drive an optical filter control.
US-6,965,261 Ultra low-power data retention latch
An embodiment of a ultra low-power data retention latch circuit involves a slave latch SL that concurrently latches the same data that is loaded into a main...
US-6,965,218 Voltage regulator
A voltage regulator includes a two-stage feedback circuit for driving a controller formed by a transistor 10. The feedback circuit includes an error amplifier 30...
US-6,965,177 Pulse drive of resonant MEMS devices
System and method for establishing and maintaining resonant oscillations of a torsional hinged device such as a pivotally hinged mirror. The system and methods...
US-6,965,162 Semiconductor chip mounting substrate and semiconductor device using it
A semiconductor device designed to reduce the warp of a substrate due to curing contraction, etc. of an insulation pattern while forming the insulation pattern...
US-6,965,136 Photon-blocking layer
An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the...
US-6,965,069 Programmable melody generator
A digital system and method of operation is provided in which musical notes and melodies are synthesized. The operation done for music synthesis is based on time...
US-6,964,196 Resonant pivoting surface with inertially coupled activation
A system and method for providing resonant movement about a first axis. A functional surface supported by a first pair of torsional hinges is driven into...
US-6,963,965 Instruction-programmable processor with instruction loop cache
An instruction-programmable processor, such as a digital signal processor, having a level one program cache memory and instruction buffer subsystem, is...
US-6,963,891 Fast fourier transform
A fast Fourier transform with sequential memory accessing within each stage.
US-6,963,732 Subsampling communication receiver architecture with relaxed IFA readout timing
A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, ....
US-6,963,295 Method of recovering and decoding of Manchester coded data
A method and apparatus for accurately decoding a Manchester data stream having transition time distortion and noise spikes. Briefly, in an embodiment using a...
US-6,963,233 Charge pump phase locked loop with improved power supply rejection
A phase lock loop circuit (60) has a phase frequency detector (62), a charge pump (64), an active filter (87) and a voltage-controlled oscillator (100). The...
US-6,963,225 Quad state logic design methods, circuits, and systems
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring...
US-6,963,206 System and method of evaluating gate oxide integrity for semiconductor microchips
The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a...
US-6,963,111 Efficient pMOS ESD protection circuit
A pMOS transistor (601) is located in an n-well (602) and has at least one gate (603). Transistor (601) is connected between power pad Vdd or I/O pad (604) and...
US-6,962,883 Integrated circuit insulator and method
A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high...
US-6,961,715 Input/output buffer managed by sorted breakpoint hardware/software
A data processing device uses a portion of a random access memory as an input buffer for holding a portion of a stream of data which is being processed by a...
US-6,961,421 Echo analysis for identification of hybrid induced echo in a communication link
Echo return loss is analyzed to determine if the near end connection of a communication link has hybrid induced echo. If the echo return loss is above a...
US-6,961,392 Joint equalization and decoding using a search-based decoding algorithm
A method and apparatus for joint equalization and decoding using a search-based decoding algorithm on a channel exhibiting intersymbol interference distortion is...
US-6,961,340 AAL2 receiver for filtering signaling/management packets in an ATM system
The present invention provides an apparatus, system and method for receiving asynchronous transfer mode (ATM) data cells on an ATM adaptation layer (AAL)...
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