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| Patent # | Description |
|---|---|
| US-7,030,038 |
Low temperature method for forming a thin, uniform oxide This invention pertains generally to forming thin oxides at low temperatures, and more particularly to forming uniformly thick, thin oxides. We disclose a low... |
| US-7,029,972 |
Method of manufacturing a metal-insulator-metal capacitor The present invention provides method of manufacturing a metal-insulator-metal capacitor (100). A method of manufacturing includes depositing a first refractory... |
| US-7,029,967 |
Silicide method for CMOS integrated circuits A method for forming metal silicide regions in source and drain regions (160, 170) is described. Prior to the thermal annealing of the source and drain regions... |
| US-7,029,932 |
Circuit and method for measuring contact resistance Parametric testing of an integrated circuit chip includes pressing first, second, and third contact elements (PRB-1,2,3) against first, second and third... |
| US-7,029,925 |
FeRAM capacitor stack etch The present invention is directed to a method of forming an FeRAM integrated circuit, which includes performing a capacitor stack etch to define the FeRAM... |
| US-7,028,396 |
Semiconductor chip pick and place process and equipment A process and tooling for removing a semiconductor chip (31) from a handling tape (321) without damage to either the chip or tape by one or more horizontal beam... |
| US-7,028,294 |
Linking of applications into devices having overlays and shadow memories In one embodiment a method for handling shadow or overlay memories is described wherein a linker contains a description of the memory of a target embedded system... |
| US-7,028,272 |
Reducing cell library development cycle time An integrated tool which allows layouts for cells to be generated using a combination of synthesis, migration and manual approaches. In an embodiment, a... |
| US-7,028,198 |
Processor having real-time power conservation A processor, comprising a monitor for, depending on the respective embodiment, measuring the relative amount of idle time, activity time, or idle time and... |
| US-7,028,130 |
Generating multiple traffic classes on a PCI Express fabric from PCI
devices A system having a PCI Express fabric and PCI devices connected thereto transmits data from the PCI devices having PCI Express traffic classes assigned. A PCI... |
| US-7,028,118 |
Multi-channel buffered serial port debugging In digital signal processors serial data is passed in out and of the chip in a time division multiplexed (TDM) fashion. The TDM stream consists of many... |
| US-7,027,946 |
Broadside compare with retest on fail A tester routine is provided that evaluates multiple test pins, on multiple devices under test, at the same time and only if a fail occurs does any evaluation... |
| US-7,027,659 |
Method and apparatus for generating video images A method and system for generating a video image is disclosed in which an object is monitored with a video camera to produce a sequence of video frames. Each of... |
| US-7,027,589 |
Single-ended loop test circuitry in a central office DSL modem A central office modem (50) that includes the capability of single-ended loop testing (SELT) is disclosed. The modem (50) includes a digital signal processor... |
| US-7,027,522 |
Systems for data transmission A differential data transmission system that transmits encoded data symbols as differential signals. A signal for transmitting symbols on a set of at least three... |
| US-7,027,492 |
Wireless communication system with processor requested RAKE finger tasks A wireless base station (20). The base station comprises at least one receive antenna (AT.sub.RXn) for receiving communication signals from at least one... |
| US-7,027,447 |
Communications interface between clock domains with minimal latency A network switch system (10) is disclosed, in which a plurality of switch fabric devices (20) are interconnected according to a ring arrangement, each of the... |
| US-7,027,346 |
Bit line control for low power in standby The present invention achieves technical advantages as embodiments of an SRAM cell (20, 30) having the bit line voltage (BLB/BLB) controlled during standby, such... |
| US-7,027,275 |
Electrostatic discharge protection circuit with feedback enhanced
triggering A feedback enhanced triggering device for an electrostatic discharge protection circuit includes: a first inverter 30b having an output coupled to an input of a... |
| US-7,026,854 |
System for producing high-voltage, low-power driver circuitry The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements.... |
| US-7,026,838 |
Versatile system for accelerated stress characterization of semiconductor
device structures The present invention provides a system (200) for performing accelerated stress characterization of a given transistor (204). Inverter circuits, formed from the... |
| US-7,026,833 |
Multiple-chip probe and universal tester contact assemblage A probe card assemblage for simultaneously testing one or more integrated circuit chips including an interposer having on one surface a plurality of protruding... |
| US-7,026,801 |
Guaranteed bootstrap hold-up circuit for buck high side switch A buck regulator switching power supply (10) selectively enabling a low side device to effectively recharge a bootstrap capacitor (C.sub.boot) during a high duty... |
| US-7,026,710 |
Molded package for micromechanical devices and method of fabrication According to the present invention, a plastic land-grid array package, a plastic ball-grid package, and a plastic leaded package for micromechanical components... |
| US-7,026,251 |
Method of optimized stitching for digital micro-mirror device A method of providing a reticle layout for a die having at least three patterns, namely a right pattern, a center pattern, and a left pattern, where the center... |
| US-7,026,232 |
Systems and methods for low leakage strained-channel transistor The present invention facilitates semiconductor fabrication by providing methods of fabrication that mitigate leakage and apply strain to channel regions of... |
| US-7,026,218 |
Use of indium to define work function of p-type doped polysilicon The present invention pertains to formation of a PMOS transistor wherein a layer of silicon or SiGe inhibits p-type dopant from entering into an underlying gate... |
| US-7,025,234 |
Apparatus and method for dispensing high-viscosity liquid The present invention relates to apparatus and method for re-circulating high viscosity liquids. The apparatus comprises a recirculating probe coupled to a fluid... |
| US-7,024,950 |
Method for intelligent sampling of particulates in exhaust lines An in-situ particle monitor in an exhaust controls a particle sampler so that when a predetermined particle threshold is detected, the particle sampler is caused... |
| US-7,024,782 |
Electronic device compass operable irrespective of localized magnetic
field An electronic device (10). The device comprises means (14) for displaying a compass directional bearing. The device also comprises means (18, 26, CAM) for... |
| US-7,024,448 |
Multiplier A multiplier having a simple constitution, excellent performance with respect to high-frequency characteristics and distortion characteristics, and allows... |
| US-7,023,937 |
Receiver window design for multicarrier communication systems A receiver window design algorithm (210) is developed which minimizes the noise power of the demodulated multicarrier signal. The windows are effective on a... |
| US-7,023,931 |
System and method for soft slicing Methods and systems for performing iterative soft slicing methods are disclosed. A data signal is received and processed into individual data tones. A noise... |
| US-7,023,929 |
Digital pre-compensation filter for DMT type transmitter A method of providing an improved transfer function for a Discrete Multitone (DMT) type modulation transmitter with digital filtering after modulation followed... |
| US-7,023,927 |
Constellation design for PCM upstream modulation A method for constellation design in a telecommunications network using pulse code modulation to transmit data signals upstream between client and server... |
| US-7,023,901 |
Spreading factor estimation system and method Spreading factor (SF) estimation in a code division multiple access (CDMA) spread spectrum system where the SF of the data channel may change on a frame-by-frame... |
| US-7,023,770 |
Encoding rate-based, programmable, linear velocity, compressed audio
compact disc player An audio player permits compressed or uncompressed audio CDs to be played. The preferred player includes a spindle motor control that causes the CD to be spun at... |
| US-7,023,761 |
Programmable stackable memory array system Systems and methods are provided for reducing power consumption in the form of leakage current in a memory array. One embodiment discloses a memory array system.... |
| US-7,023,647 |
Fly height control for a read/write head in a hard disk drive A fly height controller (10FHC; 10FHC') for controlling the fly height of a read/write head assembly (15) in a disk drive (20) is disclosed. A heat element... |
| US-7,023,497 |
Clamping circuit with wide input dynamic range for video or other AC
coupled signals A clamping circuit disclosed herein has two modes of operation which include both a bottom level and mid-level clamping mode for clamping automatically onto the... |
| US-7,023,469 |
Automatic video monitoring system which selectively saves information A system (10) for automatically monitoring an area includes a camera unit (12) having therein a video camera (23) and an image processing section (27). The image... |
| US-7,023,272 |
Multi-band low noise amplifier system A low noise amplifier (LNA) operates over multiple frequency bands while occupying less silicon area than known LNA implementations. The LNA includes output... |
| US-7,023,240 |
Data-driven clock gating for a sequential data-capture device A circuit for capturing data from a bus having a flip-flop register, comparison logic and clock logic. The comparison logic determines whether any bit on the bus... |
| US-7,023,201 |
Magnetic position sensor apparatus and method A magnetic position sensor has a stator (16', 36, 52) formed of magnetic material and a pair of magnets (14a, 14b; 34a, 34b; 54a, 54b; 64a, 64b) rotatably... |
| US-7,023,088 |
Semiconductor package, semiconductor device and electronic device An insulating layer (3) having an opening portion (3a) at a position conformable to an electrode pad (2) is formed. Next, a resin projection portion (4) is... |
| US-7,023,018 |
SiGe transistor with strained layers The present invention provides, in one embodiment, a P-type Metal Oxide Semiconductor (PMOS) device (100). The device (100) comprises a tensile-strained silicon... |
| US-7,023,005 |
Gain compensation for optocoupler feedback circuit A feedback circuit has an optical coupler with a feedback gain control. The feedback gain control includes an active element connected to vary current flow... |
| US-7,020,827 |
Cascade map decoder and method MAP decoder with cascade architecture. Iterative Turbo decoders can use two such cascade MAP decoders with feedback in conjunction with interleaver and... |
| US-7,020,822 |
Automatic repeat request for centralized channel access A method of providing an automatic repeat request (ARQ) that employs a selective repeat, enabling a transmitting medium access control (MAC) entity at a... |
| US-7,020,723 |
Method of allowing multiple, hardware embedded configurations to be
recognized by an operating system A communications system for enabling extension of an internal common bus architecture (CBA) segment of a first root physical device to an internal CBA bus... |
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