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Patent # Description
US-6,917,597 System and method of communication using transmit antenna diversity based upon uplink measurement for the TDD...
A system and method of data communication uses variable transmit antenna delays based on uplink measurements for the time division duplex (TDD) mode of WCDMA...
US-6,917,503 Programmable current limiting using a shunt resistor
An overcurrent protection circuit using a shunt resistor and the voltage drop across a switch to program a user-defined current limiting level. This protects the...
US-6,917,484 Damping resistor boost writer architecture
A write driver apparatus and corresponding method for an inductive head element (20) in a magnetic storage medium, such as a hard disk drive, having an H-bridge...
US-6,917,467 Optical amplifier
A programmable amplifier 100 operable to independently adjust the amplification given to various optical signals passing through an optical fiber. An input...
US-6,917,461 Laminated package
A system and method of aligning a micromirror array to the micromirror package and the micromirror package to a display system. One embodiment provides a method...
US-6,917,311 Orthogonal preamble encoder, method of encoding orthogonal preambles and multiple-input, multiple-output...
For use with a multiple-input, multiple-output (MIMO) transmitter, an orthogonal preamble encoder, a method of encoding orthogonal preambles and a communication...
US-6,917,257 Apparatus and method for equalizing received signals
An apparatus for equalizing input signals including high and low frequency component signals received at an locus includes: (a) a first signal amplifying circuit...
US-6,917,240 Reconfigurable topology for switching and charge pump negative polarity regulators
A configurable voltage regulator (128) operable in either of two selectable modes or topologies is disclosed. In one disclosed embodiment, the voltage regulator...
US-6,917,223 Gaussian noise generator
A signal generator (10). The signal generator comprises circuitry (20) for producing at least a first input noise signal (N.sub.1), wherein the first input noise...
US-6,917,098 Three-level leadframe for no-lead packages
A semiconductor device (700) having a leadframe with a first plurality of segments (110) having a narrow end portion (111) in a first horizontal plane (211) and...
US-6,917,093 Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuits
A trench structure in a wafer of semiconductor material and the method of forming the trench structure are described. The trench structure is formed on a...
US-6,917,084 Interdigitated layout methodology for amplifier and H-bridge output stages
A complementary output stage in integrated circuit includes a P-channel transistor (MP1) the segmented into a first group of sections (MP1-1,2 . . . 12) and an...
US-6,916,689 Plastic chip-scale package having integrated passive components
A semiconductor device has passive components integrated with the circuit and encapsulated in a plastic package for solder ball or leaded attachment. A plastic...
US-6,915,566 Method of fabricating flexible circuits for integrated circuit interconnections
A method for the fabrication of a double-sided electrical interconnection flexible circuit (200) particularly useful as a substrate for an area array integrated...
US-6,915,478 Method and apparatus for computing Reed-Solomon error magnitudes
In a Reed-Solomon decoder, error magnitudes are determined from a root matrix and a syndrome vector. The root matrix is triangularized (60) using recursive...
US-6,915,459 Active failsafe detection for differential receiver circuits
The present invention provides a method, system and apparatus for providing failsafe detection for a differential receiver. A bus activity signal (11) is...
US-6,915,416 Apparatus and method for microcontroller debugging
Apparatus and method for microcontroller debugging. A preferred embodiment microcontroller integrated circuit comprises debug circuitry on the integrated...
US-6,915,360 Cell buffering system with priority cache in an ATM system
The present invention provides an apparatus and system for buffering data in a communication network with an arranged priority which enables traffic shaping. A...
US-6,915,247 Computer system
The objective of the invention is to be able to switch between execution and cancellation of copy protection at any time in a simplified structure. The switching...
US-6,914,948 Media noise post-processor with varying threshold
A post-processing method and circuit (30) for correcting media noise errors and producing a corrected recovered data output signal (49) is disclosed for use in a...
US-6,914,550 Differential pipelined analog to digital converter with successive approximation register subconverter stages...
Pipelined analog to digital conversion systems are provided having cascaded multi-bit successive approximation register subconverter stages using thermometer...
US-6,914,549 Reconfigurable analog-to-digital converter
Configuring an analog-to-digital converter includes receiving a control signal and an input analog signal at an analog-to-digital converter, where the control...
US-6,914,546 Device and method of digital gain programming using sigma-delta modulator
A sigma delta modulator (350) can be utilized in the Digital-to-Analog (DAC) portion (144) of a modem (120) to achieve a desired level of gain programming. A set...
US-6,914,486 System and method for improved bias matching
Systems and methods to improve bias matching (e.g., for a current feedback amplifier) are described. A compensation signal is combined with one or more bias...
US-6,914,447 High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation...
The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable...
US-6,914,332 Flip-chip without bumps and polymer for board assembly
A semiconductor chip having a planar active surface including an integrated circuit protected by an inorganic overcoat; the circuit has metallization patterns...
US-6,914,004 Method for via etching in organo-silica-glass
According to one embodiment of the invention, a method for via etching in a dielectric material includes providing a wafer (200) having a substrate (202), an...
US-6,913,980 Process method of source drain spacer engineering to improve transistor capacitance
A method of forming an associated transistor is presented whereby short channel effects and junction capacitances are mitigated and enhanced switching speeds are...
US-6,913,527 Edge-sealed pad for CMP process
The present invention discloses a polishing pad that can facilitate process stability, extend length of use, and mitigate process non-uniformity and process...
US-6,912,675 Using selective omission to compress on-chip data processor trace and timing information for export
Parameter values of an emulation parameter that is indicative of a data processing operation performed by a data processor are exported from the data processor....
US-6,912,596 Automatic resume from suspend for IEEE-1394 PHY
A system and process are disclosed for automatically resuming data communication using an IEEE-1394 PHY when communication is suspended because input bias is...
US-6,912,497 Calibration of speech data acquisition path
A method and system for calibration of a data acquisition path is achieved by applying a voice utterance to a first high quality microphone and reference path...
US-6,912,376 Mobile phone transceiver
A multiple band transceiver (10) uses a fixed frequency oscillator (34) to generate a reference signal in both receive, mode and transmit mode for each frequency...
US-6,912,281 Route delay sensitive echo cancellation
Long distance telephone connections must commonly employ echo cancellers to eliminate irritating echo. The normal practice is to additionally employ non-linear...
US-6,912,261 Frame synchronization in multicarrier transmission systems
A discrete multitone modulation transmission system is described in which frame synchronization is monitored at the receiver by correlating frequency domain...
US-6,912,012 Video decoder having lock algorithm that distinguishes between a noisy television signal input and a video...
A phase-locked loop is provided which is operable to lock the sampling clock (pixel clock) to the incoming horizontal sync pulse contained within composite video...
US-6,912,008 Method of adding data to a data communication link while retaining backward compatibility
A method of adding auxiliary data, e.g., audio data, to a high-speed serial video link in such a way that it is invisible to existing receiver and such that...
US-6,911,861 Current biasing circuit with temperature compensation and related methods of compensating output current
This disclosure provides, in one aspect, a current signal generating circuit for generating a current source for use by on- or off-chip components. In one...
US-6,911,834 Multiple contact vertical probe solution enabling Kelvin connection benefits for conductive bump probing
Apparatus and methods for testing conductive bumps or target test points on integrated circuits. A multiplicity of probes are extended through a support...
US-6,911,832 Focused ion beam endpoint detection using charge pulse detection electronics
A system and method for detecting a milling endpoint on a semiconductor sample by directing an ion beam from a focused ion beam (FIB) apparatus at the sample and...
US-6,911,689 Versatile system for chromium based diffusion barriers in electrode structures
A versatile system providing Cr-based diffusion barriers and electrode structures utilizing such barriers is disclosed, including a semiconductor substrate...
US-6,911,394 Semiconductor devices and methods of manufacturing such semiconductor devices
A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (202), forming a dielectric layer (204) over the...
US-6,911,389 Self aligned vias in dual damascene interconnect, buried mask approach
Methods are disclosed for forming vias, trenches, and interconnects through diffusion barrier, etch-stop, and dielectric materials for interconnection of...
US-6,910,177 Viterbi decoder using restructured trellis
Viterbi decoding is implemented using an asymmetrical trellis 70 having an A-trellis 72 and a B-trellis 74. The trellis 70 is designed for efficient ...
US-6,910,123 Processor with conditional instruction execution based upon state of corresponding annul bit of annul code
A processor having a changeable architected state. The processor includes an instruction memory for storing instructions. The processor also includes an...
US-6,910,096 SDRAM with command decoder coupled to address registers
A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit...
US-6,909,759 Wireless receiver using noise levels for postscaling an equalized signal having temporal diversity
A wireless receiver for receiving an incoming signal having spatial and temporal diversity. The receiver uses noise-based prescaling of multiple receiver chain...
US-6,909,567 Pin layer reversal detection
A circuit to detect pin layer reversal including an input circuit to receive an input signal having a first portion to indicate a pin layer reversal and having a...
US-6,909,318 CMOS voltage booster circuit
This invention is a new CMOS voltage booster (20) having an output which can be used in memories to boost the word line voltage above VDD or other voltage...
US-6,909,301 Oscillation based access time measurement
An embodiment of the invention is a method for measuring access time where the frequency of a ring oscillator is measured with and without a device under test 1...
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