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Patent # Description
US-6,833,942 MEMS enclosure
A low-cost, high-performance, reliable micromirror package (300) that replaces the ceramic substrate in conventional packages with a printed circuit board...
US-6,833,832 Local bit-plane memory for spatial light modulator
A controller (15) for a display system (10) that uses a spatial light modulator (15) to display data formatted in bit-planes. The controller (15) receives at...
US-6,833,757 Method and system for improving amplifier efficiency
One aspect of the invention is an amplifier (10), comprising an input stage amplifier (20) coupled to an output node (81). The amplifier (10) further comprises a...
US-6,833,753 Method and system for signal dependent boosting in sampling circuits
A system for signal boosting includes a capacitance boosting component that contains a first and second transistor and a capacitor, wherein a positive terminal...
US-6,833,568 Geometry-controllable design blocks of MOS transistors for improved ESD protection
An MOS transistor in the surface of a semiconductor substrate (180) of a first conductivity type, which has a grid of isolations (171) in the surface, each grid...
US-6,833,300 Method of forming integrated circuit contacts
Contacts are formed to integrated circuit devices by first forming a conductive layer (80) on a semiconductor device. An optional dielectric layer (130) is...
US-6,833,292 Reducing dopant losses during annealing processes
A method of reducing dopant losses is provided. The method includes providing a transistor structure having a first region, implanting a dopant into the first...
US-6,832,235 Multiple block adder using carry increment adder
A multiple block adder is provided wherein carry select adder (CSA) is used in the most significant bit (MSB) block, a carry increment adder (CIA) is used in the...
US-6,832,171 Circuit and method for determining battery impedance increase with aging
An internal impedance of a battery (30) is automatically determined by operating a processor (13) to analyze current flowing through the battery to determine if...
US-6,831,975 Digital subscriber line (DSL) modem compatible with home networks
A cost-effective filter consuming low power and occupying minimal space. The filter may be used in a ADSL modem (or CPE) to filter the signal components other...
US-6,831,957 System and method of dual mode automatic gain control for a digital radio receiver
A digital radio receiver system uses a dual mode automatic gain control architecture and method to enhance signal-to-noise ratio and linearity to accommodate...
US-6,831,956 Wireless communications system with combining of multiple paths selected from sub-windows in response to the...
A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of...
US-6,831,943 Code division multiple access wireless system with closed loop mode using ninety degree phase rotation and...
A wireless communication system (10). The system comprises a user station (12). The user station comprises despreading circuitry (22) for receiving and...
US-6,831,929 Multistage PN code aquisition circuit and method
A circuit for detecting a serial signal comprises a first circuit (400) coupled to receive the serial signal (200) during a predetermined plurality of time...
US-6,831,800 Boost system and method to facilitate driving a load
A system and method enable boosting a bias applied to a load so as to facilitate reversing the direction of the bias applied relative to the load. The amount of...
US-6,831,750 Method and apparatus for using spatial patterns for measuring mirror tilt angles in digital mirror devices
A method and system for indirectly measuring the tilt angle of micromirrors in a micromirror array. The method and system aims a coherent light beam through an...
US-6,831,515 Slew rate enhancement circuit
An improved circuit and method is provided that can increase the slew rate of an operational amplifier without adversely affecting its response time. An...
US-6,831,486 Charge detection node with variable conversion gain and kTC noise suppression
The Floating Diffusion charge detection system has incorporated a signal feedback directly into the charge-detection node. The feedback is coupled to the node...
US-6,831,337 Transistor circuit with varying resistance lightly doped diffused regions for electrostatic discharge ("ESD")...
A method of forming a transistor (70) in a semiconductor active area (78). The method forms a gate structure (G.sub.2) in a fixed relationship to the ...
US-6,831,008 Nickel silicide--silicon nitride adhesion through surface passivation
A process for forming nickel silicide and silicon nitride structure in a semiconductor integrated circuit device is described. Good adhesion between the nickel...
US-6,830,980 Semiconductor device fabrication methods for inhibiting carbon out-diffusion in wafers having carbon-containing...
Semiconductor device fabrication methods are provided in which a carbon-containing region is formed in a wafer to inhibit diffusion of dopants during...
US-6,830,956 Method for packaging a low profile semiconductor device
A method to realize low-profile semiconductor devices by grinding a resin sealed block and realize level grinding by eliminating warpage of the resin sealed...
US-6,830,938 Method for improving retention reliability of ferroelectric RAM
The present invention can improve and/or modify data retention lifetimes for ferroelectric devices by baking them prior to or during packaging. A ferroelectric...
US-6,829,759 System and method for generating a translation display
A method for generating a translation display includes receiving a source file (414) including a plurality of source elements (422) and a translation file (418)...
US-6,829,696 Data processing system with register store/load utilizing data packing/unpacking
A data processing system (e.g., microprocessor 30) for packing register data while storing it to memory and unpacking data read from memory while loading it into...
US-6,829,669 Bus bridge interface system
A bus bridge is defined to provide an interface between two AHB buses. These busses normally have separate requirements but both must provide high performance....
US-6,829,626 Computer algebra system and method
A computer algebra system including algebraic expression transformations with a display of domain of definition constraints only when a domain of definition...
US-6,829,598 Method and apparatus for modeling a neural synapse function by utilizing a single conventional MOSFET
A method and apparatus for modeling a neural synapse function in analog hardware whereby the multiplication function inherent to the operation of a neural...
US-6,829,321 High speed and compact overflow detection for shifters
This invention describes a unique high-speed implementation for overflow detection logic to be used in high performance shifter functions. The overflow logic...
US-6,829,307 Express bit swapping in a multicarrier transmission system
Methods and devices for adaptively changing a parameter (such as sub-carrier bit allocation and/or gain) in a multi-carrier communication signal are described....
US-6,829,290 Wireless communications system with combining of multiple paths selected from correlation to the primary...
A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of...
US-6,829,016 Digital still camera system and method
A digital image two-step resizing of filtering an entire image followed by selective row and column deletions. The filtering may use a kernel generated as three...
US-6,829,007 Digital scheme for noise filtering of optical black and offset correction in CCD signal processing
An image processing apparatus (800) for a charge coupled device having hot/cold pixel and line noise filtering is disclosed which provides optical black and...
US-6,828,961 Color wheel synchronization in multi-frame-rate display systems
A display system (200) in which light from source (202) is focused onto a spinning color wheel (204). The spinning color wheel (204) spins at a constant rate and...
US-6,828,869 Circuit for temperature determination
A circuit relates to phase and frequency-locked loop circuits (PLL and FLL circuits) with a controllable tracking oscillator whose signal phase relationship or...
US-6,828,856 Amplifier gain boost circuitry and method
A gain boost circuit is provided in a differential amplifier including differentially connected first and second input transistors the drains of which are...
US-6,828,855 Class AB operational amplifier with split folded-cascode structure and method
Bias current in output transistors of a class AB output stage is controlled by providing equal amplification to both an output of an input stage (2) of an...
US-6,828,825 Pulse response of fast level shifter
Systems and methods are provided for detecting a state change of a level shifter and actively driving the level shifter into the new state to facilitate the...
US-6,828,797 Alternative method for VOD testing of linear differential line drivers
A method for measuring a test differential voltage across a first output and a second output of a transmitter integrated circuit device, the test differential...
US-6,828,660 Semiconductor device with double nickel-plated leadframe
A leadframe for use in the assembly of integrated circuit (IC) chips, which has first and second surfaces and a base metal structure (606) with an adherent layer...
US-6,828,513 Electrical connector pad assembly for printed circuit board
A connector pad includes projections extending radially outwardly from an inner portion of the pad to help stabilize and reinforce the pad. The added stability...
US-6,828,213 Method to improve STI nano gap fill and moat nitride pull back
A method of improving shallow trench isolation (STI) gap fill and moat nitride pull back is provided by after the steps of growing a pad oxide, depositing a...
US-6,828,200 Multistage deposition that incorporates nitrogen via an intermediate step
The present invention forms a nitrided dielectric layer without substantial harm to a semiconductor layer on which the dielectric layer is formed. The invention...
US-6,828,161 Method of forming an FeRAM having a multi-layer hard mask and patterning thereof
The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a multi-layer hard mask. The multi-layer hard mask...
US-6,827,449 Adhesive-sealed window lid for micromechanical devices
An improved spatial light modulator package comprising a spatial light modulator 1006 attached to a central region of a substrate 1004, a sealing ring 1002 on...
US-6,826,730 System and method for controlling current in an integrated circuit
A circuit 10 is provided that comprises a source resistance transistor 12 connected to a common node 14. A word line driver circuit 18 receives current if it is...
US-6,826,679 Processor with pointer tracking to eliminate redundant memory fetches
A processor is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy...
US-6,826,652 Smart cache
A cache architecture (16) for use in a processing includes a RAM set cache for caching a contiguous block of main memory (20). The RAM set cache can be used in...
US-6,826,527 Concealment of frame erasures and method
A decoder for code excited LP encoded frames with both adaptive and fixed codebooks; erased frame concealment uses muted repetitive excitation, threshold-adapted...
US-6,826,026 Output buffer and I/O protection circuit for CMOS technology
An output circuit for improved ESD protection (FIG. 2) comprising a pMOS pull-up output transistor connected between a signal (I/O) pad 220 and Vdd power supply...
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