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Output stage using positive feedback to provide large current sourcing
An output stage provides increased current sourcing capability through a technique of local positive feedback. Current through a transistor MP2 is mirrored by...
Self-compensating glitch free clock switch
A glitch free self-correcting clock switching mechanism operative to switch between two clocks in a glitch free manner while compensating for the ambiguity...
Dual metal-alloy nitride gate electrodes
An embodiment of the invention is a gate electrode 70 having a nitrided high work function metal alloy 170 and a low work function nitrided metal alloy 190....
High-k gate dielectric with uniform nitrogen profile and methods for making
High-k transistor gate structures and fabrication methods therefor are provided, wherein a gate dielectric interface region near a semiconductor substrate is...
Complementary junction-narrowing implants for ultra-shallow junctions
Methods are disclosed for forming ultra shallow junctions in semiconductor substrates using multiple ion implantation steps. The ion implantation steps include...
Method of fabricating wire bond integrity test system
An improved bond integrity test system is provided by eliminating the spring loaded wire spool cover which contributes to particulate matter, and by addition of...
Method for controlling a critical dimension (CD) in an etch process
The present invention provides a method for determining resist trim times in an etch process. In one embodiment of the invention, the method for determining...
Correcting a mask pattern using a clip mask
Correcting a mask pattern includes partitioning the mask pattern to yield templates. The following is repeated for each template to generate correction data: a...
Method for measuring PLL lock time
A method of measuring the PLL lock time includes deriving the PLL frequency-settling function by demodulation and envelope extraction in the time domain. The PLL...
A batteryless transponder (10) which acquires its supply energy in that it rectifies an RF interrogation pulse transmitted by an interrogation device during a...
Enhanced storage states in an memory
A memory with mechanisms for enhancing storage states without boosting voltages to levels that damage storage cell structures. A storage cell according to the...
Over-current protection circuit and method
Over-current protection is accomplished in an output transistor (MP) of an electronic circuit wherein an input signal (Vgatedrive) Is Applying to a first...
Method for lubricating MEMS components
The present invention provides, in one aspect, a method of manufacturing a MEMS assembly. In one embodiment, the method includes mounting a MEMS device, such as...
Controlling the range and resolution of offset correction applied to the
output of a charge coupled device
An offset correction circuit which enables a designer to control the correction range irrespective of the amplification sought to be achieved to the image...
Signal line driving circuit for an LCD display
A signal line drive circuit for an LCD display having a reduced chip size and circuit scale. The drive part for two neighboring channels has a pair of registers...
Electronic device precision location via local broadcast signals
A location determination apparatus, method and system (10, 23, 26, 32, 36, 48, 52, 60, 64, 74, 78, 84, 90, 106) that is an improvement upon existing location...
Circuit assembly for generating RF oscillation plucking pulses
In a circuit assembly for generating pulses sustaining or "plucking" RF oscillations in a resonant circuit (12) of transponder (10) having no battery power...
Tuning circuit having electronically trimmed VCO
A voltage controlled oscillator (38) includes an LC tank (20) and a capacitor bank (21). LC tank (20) includes an inductor (12) and a varactor (14). The...
Efficient modulation compensation of sigma delta fractional phase locked
A technique is provided for achieving efficient modulation compensation of a .SIGMA..DELTA. fractional PLL. The parameters of the PLL TF are the gain, K.sub.pll,...
Circuit and method to facilitate threshold voltage extraction and
facilitate operation of a capacitor multiplier
A system and method to extract a threshold voltage for a MOSFET include first and second stages, which include inputs that receive functionally related input...
Ultra-low quiescent current low dropout (LDO) voltage regulator with
dynamic bias and bandwidth
An LDO regulator automatically switches from the SLEEP mode to the ON mode without the need for an externally generated control signal. The LDO regulator...
Field effect transistor with improved isolation structures
An electronic device architecture is described comprising a field effect device in an active region 22 of a substrate 10. Channel stop implant regions 28a and...
High precision integrated circuit capacitors
A polysilicon layer (30) is formed on a dielectric region (20). An optional metal silicide layer (50) can be formed on the polysilicon layer. A dielectric layer...
Manufacturing method of semiconductor IC device
To provide a manufacturing method of the semiconductor IC device having fine-structure connecting holes or trenches with high dimensional precision. There is the...
CMP in-situ conditioning with pad and retaining ring clean
A method for preconditioning a CMP polishing pad and retaining ring prior to semiconductor wafer polishing. In the method of the present invention, the retaining...
Method for manufacturing a semiconductor device with sinker contact region
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a...
Methods and apparatus for inducing stress in a semiconductor device
Methods and apparatus are disclosed for selectively inducing stress in a semiconductor device, wherein a first region of a substrate is implanted so as to induce...
Sidewall processes using alkylsilane precursors for MOS transistor
A method for using alkylsilane precursors during the sidewall formation process in MOS transistor fabrication processes. Alkylsilane precursors are used to form...
Method for fabricating semiconductor devices that uses efficient plasmas
The present invention provides, in one embodiment, process of treating a target semiconductor surface. The process includes exposing a test surface to a plasma...
Ferroelectric capacitor plasma charging monitor
Plasma charging devices and methods are disclosed for detecting plasma charging during semiconductor wafer processing. Charging monitors are disclosed having...
Multilayered CMP stop for flat planarization
A three layer film (116/114/112), such as nitride/oxide/nitride for a CMP stop layer (110). A gap filling material (120) is polished, stopping on the first film...
IC with state machine controlled linking module
A TAP linking module provides for control and access of plural TAPs on an IC through one set of JTAG signal pins. The IC includes plural circuit modules, each...
Circuit for precise measurement of the average value of the outputs of
multiple circuit unit elements
An averaging circuit includes: input signal nodes for providing input signals 330; a multiplexing circuit 320 coupled to the input signal nodes for switching...
Diversity detection for WCDMA
A circuit for detecting a transmit diversity signal comprises a first circuit (706) arranged to receive a first synchronization code. The first synchronization...
Device and method of digital gain programming using sigma-delta modulator
A sigma delta modulator (350) can be utilized in the Digital-to-Analog (DAC) portion (144) of a modem (120) to achieve a desired level of gain programming. A set...
Integrated circuits for packet communications
A process (111,101) of sending packets of real-time information at a sender (311) includes steps of initially generating at the sender the packets of real-time...
Hardware acceleration for segmentation of message packets in a universal
serial bus peripheral device
A Universal Serial Bus (USB) modem (14) in which reassembly and segmentation operations are performed outside of the host computer (12) is disclosed. A USB...
Dynamic reference voltage calibration integrated FeRAMS
A FeRAM includes a reference voltage calibration circuit that evaluates FeRAM cells and selects reference voltages for reading the FeRAM cells. Calibration of...
Drain-extended MOS ESD protection structure
A protection structure (30; 30'; 30") for safely conducting charge from electrostatic discharge (ESD) at a terminal (IN) is disclosed. The protection structure...
Dynamic laser printer scanning alignment using a torsional hinge mirror
In a laser printer which uses a scanning mirror 12 with torsional hinges 36A, 36B driven by electrical coils 30A, 30B to provide resonant pivoting, at least one...
Phase-locked loop and method for automatically setting its output frequency
A phase-locked loop (10) comprises a voltage-controlled oscillator (12) to which a control voltage is applied as produced by a phase/frequency detector (22) as a...
Active hybrid circuit
A hybrid circuit has a transfer function having three zeros and four poles that are realized using only two fully-differential amplifiers in combination with a...
Polysilicon processing using an anti-reflective dual layer hardmask for 193
A lithographic method of forming submicron polysilicon features on a semiconductor substrate, including the steps of coating said substrate with an...
MIM capacitors and methods for fabricating same
Semiconductor devices and methods for making the same are described in which a single high k or ferroelectric dielectric layer is used to form decoupling...
Use of indium to define work function of p-type doped polysilicon
The present invention pertains to formation of a PMOS transistor wherein a layer of silicon or SiGe inhibits p-type dopant from entering into an underlying gate...
Versatile system for limiting mobile charge ingress in SOI semiconductor
Disclosed are apparatus and method for limiting mobile charge (314) ingress within a silicon-on-insulator (SOI) substrate (300). A mask (308) is applied to the...
Methods for fabricating low CHC degradation mosfet transistors
Methods and apparatus are disclosed for fabricating thick and thin gate oxide transistors in a semiconductor device, wherein lightly doped source/drain regions...
Method to salicide source-line in flash memory with STI
A method of forming a semiconductor component having a conductive line (24) and a silicide region (140) that crosses a trench (72). The method involves forming...
Integrated circuit ferroelectric infrared detector and method
Ferroelectric materials useful in monolithic uncooled infrared imaging use Ca and Sn substitutions in PbTiO3 and also have alternatives with dopants such as Dy,...
Conductive pedestal on pad for leadless chip carrier (LCC) standoff
A device and method for insuring the separation between a leadless chip carrier and printed wiring board, comprising aligning and attaching conductive pedestals...