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Secure computing device having boot read only memory verification of
A secure computing system stores a program, preferably the real time operating system, that is encrypted with a private key. A boot ROM on the same integrated...
System protection map
A method and apparatus is provided for operating a digital system having several processors (102, 104) and peripheral devices (106, 116) connected to a shared...
Multiple transaction bus system
This invention comprises a multiple transaction advanced high performance bus AHB system using two separate fully autonomous AHB buses, each having its own bus...
Concealment of frame erasures for speech transmission and storage system
A decoder for packetized speech with differential quantization of line spectral frequencies and fixed-codebook gain conceals erased frames with interpolation of...
Three-step ramped reference to reduce popping noises on audio circuit
Provided is a method (500) and audio circuit (100) for reducing popping noise in a load (140, 145) connected to the audio circuit, especially during audio...
Method and apparatus for equalization and tracking of coded digital
A symbol detector provides a delay-less estimate of a transmitted symbol. The symbol detector includes a symbol input for receiving a sequence of input symbols,...
Space time transmit diversity for TDD/WCDMA systems
A circuit is designed with a matched filter circuit including a plurality of fingers (700, 702, 704) coupled to receive a data symbol. Each finger corresponds to...
Memory architecture for micromirror cell
A one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to...
Supply voltage reference circuit
A supply reference voltage circuit is coupled to an output node, a supply voltage node and a supply reference voltage node and is operable to connect the output...
Fast magneto-resistive head open and short detection for both voltage and
current bias preamplifiers
A circuit and method are presented for detecting a fault in a magneto-resistive head (18). The circuit includes a bias circuit (50) to produce a bias voltage...
Optical digital signal processing system and method
A method for optical digital signal processing, comprises configuring a plurality of binary mirrors to allow a subset of the binary mirrors to represent a range...
Contour mitigation using parallel blue noise dithering system
A method and system for displaying fractional bit data in order to increase the bit depth of a PWM display without requiring the use of an excessive number of...
Peak detector for detecting a peak signal
A peak detector for detecting a peak signal includes an input circuit to input an input signal, a track and hold circuit to hold the input signal and to output...
Semiconductor package with a thermoset bond
A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer...
Dielectric layer liner for an integrated circuit structure
An integrated circuit structure (8) includes a plurality of solid state electronic devices and a plurality of conductive elements (12, 14) that electrically...
Apparatus for and method of packaging semiconductor devices
A carrier and package for plural semiconductor devices includes a member with device-conformal apertures therethrough. A first removable cover is attached to one...
Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse...
Semiconductor device with a collector contact in a depressed well-region
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a...
Method of forming dual-damascene structure
A first dielectric layer (30) and a second dielectric layer (40) are formed over an etch stop layer (20). A hardmask layer (50) is formed over the second...
Memory cell with transistors having relatively high threshold voltages in
response to selective gate doping
A method of forming a semiconductor circuit (20). The method forms a first transistor (NT1) using various steps, such as by forming a first source/drain region...
Method of forming an FeRAM capacitor having a bottom electrode diffusion
The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer...
Method and apparatus for restricting process fluid flow within a showerhead
A system and method are disclosed for restricting process fluid flow within a showerhead assembly which includes a process chamber (12) with a showerhead...
Convolutional interleaving with interleave depth larger than codeword size
The present invention provides a solution for interleaving data frames, in a digital subscriber line system in which the data frames are divided into first and...
Interruptible an re-entrant cache clean range instruction
A digital system and method of operation is provided in which a method is provided for cleaning a range of addresses in a storage region specified by a start...
ATAPI device unaligned and aligned parallel I/O data transfer controller
A controller that supports both aligned and unaligned PIO data transfers associated with ATAPI devices in a fashion that reduces command overhead to improve...
Motor control resolution enhancement
A motor speed resolution enhancement method and system. A display system controller (202) measures the frame rate of an incoming signal to determine the desired...
System and method for extracting soft symbols in direct sequence spread
An integrated circuit including a demodulating finger is provided for variably extracting symbols in the demodulation process of spread spectrum signals....
Circuit to sample and compare the BEMF on an actuator into a constant
A apparatus for controlling an actuator including, an integrator circuit to generate an integrated signal to be represented by a back EMF voltage, a amount...
Particle detection and removal apparatus for use on wafer fabrication
equipment to lower tool related defects...
A portable particle detection and removal system (100) that connects to a house vacuum (200). A particle sensor (106) is connected between two hoses: one (102)...
Color recapture for display systems
A sequential color display system using a white light source (202) to create a full color image projected onto an image plane (214). A dynamic filter (206),...
Shading of inequalities on a graphing calculator
A graphing calculator (10) or other computer based teaching tool that displays inequalities on a display screen. In contrast to prior art devices, the present...
System and method for reducing a leakage current associated with an
A method for reducing a leakage current in an integrated circuit is provided that includes controlling one or more inputs of an integrated circuit such that one...
Programmable delay for processor control signals
A programmable delay circuit (100) maximizes processor bandwidth to external peripherals by eliminating wait state addition as the only way for satisfying timing...
Integrated process for high voltage and high performance
silicon-on-insulator bipolar devices
High-voltage bipolar transistors (30, 60) in silicon-on-insulator (SOI) integrated circuits are disclosed. In one disclosed embodiment, an collector region (28)...
Photoconductive thin film for reduction of plasma damage
A semiconductor device (200) that includes a semiconductor substrate (210), semiconductor features (230, 235, 240, 260) located thereover and an insulating...
Array of transistors with low voltage collector protection
An array (90) of transistors (50) formed in a p-type layer (34), and including a second heavily doped p-type region (56) laterally extending proximate the drain...
Single poly eeprom with improved coupling ratio
A semiconductor device (200) comprising a semiconductor substrate (210) having a well (220) located therein and a first dielectric (250) located over the well...
Method of making multiple work function gates by implanting metals with
metallic alloying additives
A method of forming a first and second transistors with differing work function gates by differing metals with a second metal selectively implanted or diffused...
Scan circuit low power adapter with counter
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan...
Cache with selective write allocation
A digital system and method of operation is provided in which several processors (590n) are connected to a shared cache memory resource (500). A translation...
Method and circuit for modeling a voice coil actuator of a mass data
A circuit model (50) for use in analyzing a VCM circuit has a first resistor (62), a first inductor (64), a second inductor (58), and a voltage source (60), in...
Apparatus and method for measuring a parameter in a host device
An apparatus receives an indicating signal representing a parameter at a monitoring locus and includes: (a) A first measuring unit having a first input coupled...
Volatile memory cell reconfigured as a non-volatile memory cell
A conventional volatile SRAM cell is modified into a non-volatile, read only memory cell. This permits a device whose design currently includes on-chip SRAM, but...
Semiconductor device array having dense memory cell array and hierarchical
bit line scheme
A semiconductor device architecture (200) is disclosed. Like unit circuits (202), arranged in rows and columns, are coupled to lower conductive segments...
High density internal ball grid array integrated circuit package
An integrated circuit package (30) comprising a substrate (70) having peripheral openings (86) and first and second surfaces (92, 94), a plurality of routing...
IC excess current detection scheme
The present invention achieves technical advantages as a circuit (10) detecting excess current on a servo driver IC and preventing the disruptive damage which...
Method and circuit resetting delta sigma modulator
A delta sigma modulator circuit sums an input signal with a feedback signal representing signal conditions in a group of integrators to provide an input to a...
Signal conditioning circuit for resistive sensors
A circuit is provided that can provide, in a single package, a circuit to monitor a sensing element which uses a variable resistor. The circuit (also known as a...
Circuit for detecting low battery condition on an electronic device with a
A method to more accurately monitor remaining battery life under varying load conditions. The measured battery voltage is adjusted for the current load and then...
Semiconductor packages and methods for manufacturing such semiconductor
A semiconductor package according to the present invention includes a die attachment area for receiving a die attachment material and a stitch bond area for...