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Patent # Description
US-6,821,873 Anneal sequence for high-.kappa. film property optimization
A method for improving high-.kappa. gate dielectric film (104) properties. The high-.kappa. film (104) is subjected to a two step anneal sequence. The first...
US-6,821,866 Method of identifying wafer cutting positions of different size partial wafers
A tool and method is described to decide partial wafer sizes to process multiple random sizes of wafers in pick and place equipment for wafermap operation. The...
US-6,821,835 Chemical vapor deposition of silicate high dielectric constant materials
A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the...
US-6,821,791 Method for reworking metal layers on integrated circuit bond pads
A method for reworking integrated circuit (IC) wafers having copper-metallized bond pads exposed in protective overcoat openings and one or more bondable metal...
US-6,821,554 Polyol-based method for forming thin film aerogels on semiconductor substrates
This invention has enabled a new, simple nanoporous dielectric fabrication method. In general, this invention uses a polyol, such as glycerol, as a solvent. This...
US-6,820,794 Solderless test interface for a semiconductor device package
A solderless test interface (10) includes a thin, flexible, electrically insulative sheet (20) having metal plated through-holes (24) formed in the pattern of...
US-6,820,222 Apparatus and method for processor power measurement in a digital signal processor using trace data and...
In order to measure the power consumed by a central processing unit during execution of a software program, the trace components are used to determine the input...
US-6,820,184 Memory management in embedded systems with dynamic object instantiation
A system and method is provided for enabling the reuse of algorithms in multiple application frameworks with no alterations required of the algorithm once it is...
US-6,820,051 Software emulation monitor employed with hardware suspend mode
In-circuit-emulation of an integrated circuit including a digital data processor capable of executing program instructions. A debug event detector detects...
US-6,820,046 System for electrically modeling an electronic structure and method of operation
According to the electrical modeling system and method provided by the present invention, the electronic structure to be modeled is segmented into an ordered...
US-6,819,807 Optical correlator using spatial light modulator illumination
An optical correlator (10) that uses a spatial light modulator (11) to illuminate a pattern of on and off pixels into a length of an optical fiber (12). The...
US-6,819,684 Deterministic bit insertion into serial communications
A data communications subsystem (15) including a digital signal processor (DSP) (20) for performing bit insertion to preclude the inadvertent serial transmission...
US-6,819,601 Programmable reference for 1T/1C ferroelectric memories
A ferroelectric memory device is disclosed and comprises a logic programmable capacitance reference circuit. The circuit is adapted to generate a reference...
US-6,819,577 Distributing clock and programming phase shift in multiphase parallelable converters
A highly efficient multi-phase power system having both reduced size and reduced cost. The multi-phase power system includes a plurality of Pulse Width...
US-6,819,516 WUS (unsafe) detection (kick back sensing)
An unsafe detection circuit for detecting a kickback signal including an input circuit for inputting a kickback signal, a circuit for detecting the presence or...
US-6,819,515 Method and circuit for eliminating glitches in a disk drive read head
An improved bias circuit for a disk drive head which reduces or eliminates transients while switching biasing. Embodiments of the invention are directed to...
US-6,819,470 Hidden hinge digital micromirror device with improved manufacturing yield and improved contrast ratio
An improved DMD type spatial light modulator having an array of pixels (18). The pixels (18) are of the "hidden hinge" design, each pixel having a mirror (30)...
US-6,819,395 Digital cinema transport stream with embedded projector configuration data
A transport stream with embedded projector configuration data 208 being carried along with the video for use in digital cinema projector setup. The embedded...
US-6,819,148 CMOS comparator output stage and method
A CMOS circuit including a P-channel pull-up transistor (MP) and an N-channel pull-down transistor (MN) includes a first feedback circuit (6) producing a first...
US-6,819,144 Latched sense amplifier with full range differential input voltage
A sense amplifier that is capable of sensing small differential voltage between two inputs with full voltage range includes a first inverter 305 and 306; a...
US-6,819,123 Extraction of interconnect parasitics
The apparatus for detecting the effects of interconnect resistance and capacitance (RC) in a logic circuit includes a first ring oscillator with the interconnect...
US-6,819,072 Disk drive servo arm retract and spindle brake circuit
A spindle motor control circuit for controlling a motor; including a control circuit to control the motor during at least a low state, a pulse state and a high...
US-6,818,966 Method and structure for controlling surface properties of dielectric layers in a thin film component for...
A method and structure for controlling the surface properties in the dielectric layers in a thin film component can be provided for improving the trimming...
US-6,818,540 Fine pitch system and method for reinforcing bond pads in semiconductor devices
A reinforcing system and method of fabrication for a semiconductor integrated circuit bond pad comprises a first dielectric layer or stack disposed under the...
US-6,818,526 Method for moat nitride pull back for shallow trench isolation
A method of fabricating a shallow trench isolation structure includes forming outwardly of a semiconductor layer a first oxide layer. A nitride layer is formed...
US-6,818,518 Method for producing low/high voltage threshold transistors in semiconductor processing
The present invention provides a system and method for processing low voltage threshold transistors on a semiconductor wafer. The method may include: forming...
US-6,816,921 Micro-controller direct memory access (DMA) operation with adjustable word size transfers and address...
A micro-controller direct memory access (DMA) unit includes hardware support for single read of the source address at a source word size and but writes to the...
US-6,816,796 Resistance measuring circuit
In the resistance measuring circuit, a measuring capacitor (Cm), as controlled by a microcomputer (10), is charged in a first cycle to a predefined charging...
US-6,816,640 Optical add drop multiplexer
An optical switch ideally suited for use as an optical add drop multiplexer (OADM). A light beam entering the OADM through a first input fiber (402) is separated...
US-6,816,553 Coding method for an image signal
To provide high quality coding with respect to both interlace video and progressive video. It is a coding method for image signals, which includes the steps of...
US-6,816,541 Spread spectrum interference cancellation
Iterative parallel interference cancellation estimations for signals received from multiple coded sources or a source with multiple coded outputs with updated...
US-6,816,375 Heat sink attachment
A new heat sink apparatus and method that simplify the assembly of the heat sink and thermal stud. The new heat sink assembly uses a spring retainer that, in...
US-6,816,184 Method and apparatus for mapping a location from a video image to a map
A monitoring system (10) includes a video camera (12) which generates images of a monitored area. A computer (16) receives the images from the video camera, and...
US-6,816,004 Minimizing noise in data channels implemented using frequency division multiplexing
A filter circuit with two 2.sup.nd order stages cascaded in sequence. The first stage is implemented with high quality (Q) factor, and the second stage is...
US-6,816,000 Booster circuit
The objective of the invention is to provide a booster circuit with reduced power consumption and switching noise. Booster circuit 1 of the present invention has...
US-6,815,970 Method for measuring NBTI degradation effects on integrated circuits
A method of testing integrated circuits for the effect of NBTI degradation. A static DC stress voltage is applied to the voltage supply input of the circuit....
US-6,815,836 Wire bonding for thin semiconductor package
An assembly of a semiconductor chip (301) having an integrated circuit (IC) including at least one contact pad (320) on its surface (301a), wherein the contact...
US-6,815,801 Vertical bipolar transistor and a method of manufacture therefor including two epitaxial layers and a buried layer
The present invention provides a vertical bipolar transistor 110, a method of manufacture therefor, and an integrated circuit including the same. The vertical...
US-6,815,757 Single-poly EEPROM on a negatively biased substrate
Disclosed are devices and associated methods for manufacturing an EEPROM memory cell (10) for use on a negatively biased substrate (12). The invention may be...
US-6,815,742 System with meshed power and signal buses on cell array
A method and apparatus for providing a meshed power and signal bus system on an array type integrated circuit that minimizes the size of the circuit. In a...
US-6,815,276 Segmented power MOSFET of safe operation
Segmented power transistors and fabrication methods are disclosed in which transistor segments are spaced from one another to facilitate thermal diffusion, and...
US-6,814,445 DMD heat sink socket assembly
A method for removing heat from a spatial light modulator device in a digital projection display by encapsulating the device package in a thermal conductive...
US-6,813,757 Method for evaluating a mask pattern on a substrate
A method for evaluating a mask pattern for a product that is manufactured by a process that is described at least in part by a mathematical process model...
US-6,813,738 IC test cell with memory output connected to input multiplexer
A test cell (12) provides boundary scan testing in an integrated circuit (10). The test cell (12) comprises two memories, a flip-flop (24) and a latch (26), for...
US-6,813,446 System for acquiring and maintaining reliable optical wireless links
Disclosed is apparatus and method for establishing and maintaining optical data transfer between a first optical communications device (202) and a second optical...
US-6,813,111 Implementation method of digital phase-locked loop
A phase lock loop to control phase error including a first phase error detector to detect the phase error in a first mode, a first loop filter to filter a first...
US-6,813,087 Multi-mode color filter
A multi-mode color filter 400 having an inner hub region 402 used to mount the color filter 400 to a motor shaft. A first track 404 and a second track 406 of...
US-6,812,793 Power supply rejection circuit for an audio amplifier
A circuit for power amplification for an audio amplifier that reduces power supply noise amplified to the load. The circuit takes the prior art circuit's...
US-6,812,782 Switch mode converter that allows 100% duty cycle on gate driver
A switch mode converter uses the bootstrap capacitor 30 to operate all the way to 100% duty cycle by adding only a very small amount of low-area extra circuitry....
US-6,812,678 Voltage independent class A output stage speedup circuit
A low drop-out voltage regulator circuit includes: a MOS pass through transistor 12; a resistor feedback circuit 18 and 20 coupled to the MOS pass through...
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