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Patent # Description
US-6,779,133 IC with two state machines connected to serial scan path
A serial scan architecture (102-126) provides improved processor emulation capability.
US-6,779,085 TLB operation based on task-ID
A digital system and method of operation is provided in which several processing resources (340) and processors (350) are connected to a shared translation...
US-6,778,674 Hearing assist device with directional detection and sound modification
A hearing assist device (10) for a person (P). The device comprises a speaker device (SP1) for presenting sound to an ear canal of the person and circuitry for...
US-6,778,422 Ferroelectric memory
A nonvolatile memory cell in the form of an SRAM is composed of ferroelectric capacitors and transistors for amplification. The memory cell comprises a first...
US-6,778,216 Method and apparatus for digital camera real-time image correction in preview mode
A method for previewing an image in a camera prior to output. The method includes steps of gathering image data, storing the image data, calculating display...
US-6,778,155 Display operation with inserted block clears
An SLM PWM clocking method, called "jog clear," for generating short bit periods where block data clears (74) are inserted between block data loads (72, 76)...
US-6,778,113 Canceling feedback resister loading effect in a shunt-shunt feedback circuit
A shunt-shunt feedback current to voltage converter (60) including a compensating current (22) provided to the output of the amplifier (12) which mirrors the...
US-6,778,014 CMOS differential amplifier
A Complementary CMOS differential amplifier has automatic operating point adjustment (self-biasing) and the properties of a rail-to-rail amplifier. The CMOS...
US-6,778,005 High PSRR current source
The present invention improves on the topology of a conventional current source by interposing an RC circuit and additional MOS between the output of a buffer...
US-6,777,899 Circuit and method for removing increased power supply current spike that occurs during initial turn-on or...
A method and circuit (55) are presented for reducing a current spike (9) created after a commutation of a driving current of a polyphase motor (14). The motor...
US-6,777,300 Method to improve silicide formation on polysilicon
A polysilicon layer of a gate structure is covered by an implant blocking layer (e.g., silicon nitride). The implant blocking layer blocks introduction of...
US-6,776,688 Real-time polishing pad stiffness-control using magnetically controllable fluid
A method of CMP polishing of a semiconductor wafer is described that includes using a polishing pad on a platen/table with the polishing pad including a sub-pad...
US-6,775,801 Turbo decoder extrinsic normalization
This invention presents a unique implementation of the extrinsic block the turbo decoder that solves the problem of generation and use of precision extension and...
US-6,775,793 Data exchange system and method for processors
A data exchange system that exchanges data between processors is provided. The system includes a host processor and a target processor. Data is exchanged by...
US-6,775,778 Secure computing device having boot read only memory verification of program code
A secure computing system stores a program, preferably the real time operating system, that is encrypted with a private key. A boot ROM on the same integrated...
US-6,775,750 System protection map
A method and apparatus is provided for operating a digital system having several processors (102, 104) and peripheral devices (106, 116) connected to a shared...
US-6,775,732 Multiple transaction bus system
This invention comprises a multiple transaction advanced high performance bus AHB system using two separate fully autonomous AHB buses, each having its own bus...
US-6,775,649 Concealment of frame erasures for speech transmission and storage system and method
A decoder for packetized speech with differential quantization of line spectral frequencies and fixed-codebook gain conceals erased frames with interpolation of...
US-6,775,387 Three-step ramped reference to reduce popping noises on audio circuit
Provided is a method (500) and audio circuit (100) for reducing popping noise in a load (140, 145) connected to the audio circuit, especially during audio...
US-6,775,335 Method and apparatus for equalization and tracking of coded digital communications signals
A symbol detector provides a delay-less estimate of a transmitted symbol. The symbol detector includes a symbol input for receiving a sequence of input symbols,...
US-6,775,260 Space time transmit diversity for TDD/WCDMA systems
A circuit is designed with a matched filter circuit including a plurality of fingers (700, 702, 704) coupled to receive a data symbol. Each finger corresponds to...
US-6,775,174 Memory architecture for micromirror cell
A one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to...
US-6,775,118 Supply voltage reference circuit
A supply reference voltage circuit is coupled to an output node, a supply voltage node and a supply reference voltage node and is operable to connect the output...
US-6,775,078 Fast magneto-resistive head open and short detection for both voltage and current bias preamplifiers
A circuit and method are presented for detecting a fault in a magneto-resistive head (18). The circuit includes a bias circuit (50) to produce a bias voltage...
US-6,775,049 Optical digital signal processing system and method
A method for optical digital signal processing, comprises configuring a plurality of binary mirrors to allow a subset of the binary mirrors to represent a range...
US-6,774,916 Contour mitigation using parallel blue noise dithering system
A method and system for displaying fractional bit data in order to increase the bit depth of a PWM display without requiring the use of an excessive number of...
US-6,774,617 Peak detector for detecting a peak signal
A peak detector for detecting a peak signal includes an input circuit to input an input signal, a track and hold circuit to hold the input signal and to output...
US-6,774,496 Semiconductor package with a thermoset bond
A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer...
US-6,774,489 Dielectric layer liner for an integrated circuit structure
An integrated circuit structure (8) includes a plurality of solid state electronic devices and a plurality of conductive elements (12, 14) that electrically...
US-6,774,485 Apparatus for and method of packaging semiconductor devices
A carrier and package for plural semiconductor devices includes a member with device-conformal apertures therethrough. A first removable cover is attached to one...
US-6,774,457 Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse...
US-6,774,455 Semiconductor device with a collector contact in a depressed well-region
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a...
US-6,774,031 Method of forming dual-damascene structure
A first dielectric layer (30) and a second dielectric layer (40) are formed over an etch stop layer (20). A hardmask layer (50) is formed over the second...
US-6,773,972 Memory cell with transistors having relatively high threshold voltages in response to selective gate doping
A method of forming a semiconductor circuit (20). The method forms a first transistor (NT1) using various steps, such as by forming a first source/drain region...
US-6,773,930 Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier
The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer...
US-6,773,617 Method and apparatus for restricting process fluid flow within a showerhead assembly
A system and method are disclosed for restricting process fluid flow within a showerhead assembly which includes a process chamber (12) with a showerhead...
US-6,772,377 Convolutional interleaving with interleave depth larger than codeword size
The present invention provides a solution for interleaving data frames, in a digital subscriber line system in which the data frames are divided into first and...
US-6,772,326 Interruptible an re-entrant cache clean range instruction
A digital system and method of operation is provided in which a method is provided for cleaning a range of addresses in a storage region specified by a start...
US-6,772,311 ATAPI device unaligned and aligned parallel I/O data transfer controller
A controller that supports both aligned and unaligned PIO data transfers associated with ATAPI devices in a fashion that reduces command overhead to improve...
US-6,771,894 Motor control resolution enhancement
A motor speed resolution enhancement method and system. A display system controller (202) measures the frame rate of an incoming signal to determine the desired...
US-6,771,691 System and method for extracting soft symbols in direct sequence spread spectrum communications
An integrated circuit including a demodulating finger is provided for variably extracting symbols in the demodulation process of spread spectrum signals....
US-6,771,480 Circuit to sample and compare the BEMF on an actuator into a constant velocity control
A apparatus for controlling an actuator including, an integrator circuit to generate an integrated signal to be represented by a back EMF voltage, a amount...
US-6,771,371 Particle detection and removal apparatus for use on wafer fabrication equipment to lower tool related defects...
A portable particle detection and removal system (100) that connects to a house vacuum (200). A particle sensor (106) is connected between two hoses: one (102)...
US-6,771,325 Color recapture for display systems
A sequential color display system using a white light source (202) to create a full color image projected onto an image plane (214). A dynamic filter (206),...
US-6,771,252 Shading of inequalities on a graphing calculator
A graphing calculator (10) or other computer based teaching tool that displays inequalities on a display screen. In contrast to prior art devices, the present...
US-6,771,118 System and method for reducing a leakage current associated with an integrated circuit
A method for reducing a leakage current in an integrated circuit is provided that includes controlling one or more inputs of an integrated circuit such that one...
US-6,771,106 Programmable delay for processor control signals
A programmable delay circuit (100) maximizes processor bandwidth to external peripherals by eliminating wait state addition as the only way for satisfying timing...
US-6,770,952 Integrated process for high voltage and high performance silicon-on-insulator bipolar devices
High-voltage bipolar transistors (30, 60) in silicon-on-insulator (SOI) integrated circuits are disclosed. In one disclosed embodiment, an collector region (28)...
US-6,770,937 Photoconductive thin film for reduction of plasma damage
A semiconductor device (200) that includes a semiconductor substrate (210), semiconductor features (230, 235, 240, 260) located thereover and an insulating...
US-6,770,935 Array of transistors with low voltage collector protection
An array (90) of transistors (50) formed in a p-type layer (34), and including a second heavily doped p-type region (56) laterally extending proximate the drain...
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