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Patent # Description
US-6,794,237 Lateral heterojunction bipolar transistor
A heterojunction bipolar transistor (30) in a silicon-on-insulator (SOI) structure is disclosed. The transistor collector (28), heterojunction base region (20),...
US-6,794,235 Method of manufacturing a semiconductor device having a localized halo implant
The present invention provides a semiconductor device 200 having a localized halo implant 250 located therein, a method of manufacture therefore and an...
US-6,792,508 Cache with multiple fill modes
A cache architecture (16) for use in a processing device includes a RAM set cache for caching a contiguous block of main memory (20). The RAM set cache can be...
US-6,792,386 Method and system for statistical comparison of a plurality of testers
The invention provides methods and systems for statistically comparing yields among two or more testers in a testing environment where a lot of manufactured...
US-6,792,054 Method for reducing complex frequency down-conversion impairments
An improved receiver is provided having a voltage controlled amplifier for adjusting the gain of a first input signal, a comparator and integrator for...
US-6,792,031 Method for maintaining timing in a CDMA rake receiver
A system and method for maintaining timing in a CDMA rake receiver has a global chip counter that counts CDMA signal chips as they arrive at the CDMA rake...
US-6,792,019 Driver with tail currents in discrete subranges
The laser driver circuit includes an array of differential pairs 50 and 52. Each one of the differential pairs is coupled to a corresponding tail current source...
US-6,791,864 Column voltage control for write
A memory device including array (12) of memory cells (10) having an array voltage Vdd bussed such that the Vdd of columns are controlled independently. During a...
US-6,791,609 Digital still camera system and method
A combination interpolation and lowpass filtering for Bayer color-filtered arrays with the green high frequency used as an estimate for red and blue high frequency.
US-6,791,607 Optical black and offset correction in CCD signal processing
An image processing apparatus for a charge coupled device including analog front end circuitry having optical black and offset correction, whereby the an offset...
US-6,791,526 Drive circuit
A drive circuit, for example a gate line drive circuit for a TFT liquid-crystal display, having a circuit size smaller than in the past. A TFT drive circuit has...
US-6,791,422 Frequency synthesizer with digitally-controlled oscillator
A transmitter (10) based on a frequency synthesizer includes an LC tank (12) of a digitally controlled oscillator (DCO) with various arrays of capacitors. The LC...
US-6,791,383 Reduced gate leakage current in thin gate dielectric CMOS integrated circuits
The invention describes a method for reducing the leakage current in thin gate dielectric MOS capacitors in integrated circuits. A bias voltage is determined for...
US-6,791,365 Dynamic logic circuits using transistors having differing threshold voltages and delayed low threshold voltage...
A dynamic logic circuit (30). The dynamic logic circuit comprises a precharge node (30.sub.PN) to be precharged to a precharge voltage (V.sub.DD) during a...
US-6,791,312 Measuring power of analog signals
An original rectifier circuit is used to rectify an input signal and the input signal is coupled to be provided to a terminal of a amplifier. The amplifier is...
US-6,790,777 Method for reducing contamination, copper reduction, and depositing a dielectric layer on a semiconductor device
The present invention relates to a method for improving an interface of a semiconductor device. The method comprises providing a first and second substrate...
US-6,790,736 Method for manufacturing and structure of semiconductor device with polysilicon definition structure
In accordance with a particular embodiment of the present invention, a method for manufacturing a semiconductor device includes forming a buried layer of a...
US-6,789,240 Method of controlling bond process quality by measuring wire bond features
A computerized system and method for inspecting and measuring a ball-shaped wire bond formed by an automated bonder pre-programmed to attach a connecting bond...
US-6,789,238 System and method to improve IC fabrication through selective fusing
A system and methodology for fabricating integrated circuits (ICs) on wafer die monitors at a subset of die one or more parameters that can affect the ...
US-6,789,183 Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer...
In a digital processing unit having a plurality of digital signal processors, a first digital signal processor can request a direct transfer of a signal group...
US-6,789,172 Cache and DMA with a global valid bit
A digital system has at least one processor, with an associated multi-segment cache memory circuit. A single global validity circuit (VIG) is connected to the...
US-6,789,031 Method for determining the equivalency index of products, processes, and services
A method is disclosed wherewith a person skilled in the art of statistical quality control may determine whether a process, a product or a service is statically...
US-6,789,026 Circuit and method for monitoring battery state of charge
A processor (13) operates to determine amount of charge presently stored in a battery by determining that the battery is in a zero-current relaxed condition....
US-6,788,469 Automated lamp focus
Methods for measuring and automatically controlling the light distribution and overall brightness in electronic-based spatial light modulator projection display...
US-6,788,416 Method and apparatus for dynamic DMD testing
A method and apparatus for measuring the transient behavior characteristics of individual micromirrors in a DMD micromirror array. The method and system use...
US-6,788,340 Digital imaging control with selective intensity resolution enhancement
Image enhancement is automatically achieved by calibrating the reference voltage and gain of a differential amplifier and the integration interval so as to...
US-6,788,160 Oscillator circuit connected to a voltage source providing a substantially constant supply voltage
The invention relates to a voltage-controlled oscillator circuit including an oscillator circuit connected to a voltage source furnishing a substantially...
US-6,788,146 Capacitor compensation in miller compensated circuits
A Miller-compensated amplifier circuit. The circuit includes an amplifier stage, and a compensation capacitor arranged in parallel with the amplifier stage. A...
US-6,788,144 Variable-gain amplifier
A variable-gain amplifier that prevents the change in the in-phase voltage of the output occurring when the gain is changed and improves the frequency...
US-6,788,140 Ultra-low distortion, wide-bandwidth amplifier architecture using actively phase-matched feed-forward linearization
An amplifier architecture using actively phase-matched feed-forward linearization includes: a first signal path having a scaling amplifier 40 in series with a...
US-6,788,130 Efficient charge pump capable of high voltage operation
A high voltage integrated circuit operable in a system having a low voltage reference, a high voltage reference, and a ground, for providing an output voltage...
US-6,788,074 System and method for using a capacitance measurement to monitor the manufacture of a semiconductor
A method for measuring a capacitance of a semiconductor is provided that includes positioning a measurement circuit in a scribe line area associated with the...
US-6,787,875 Self-aligned vias in an integrated circuit structure
A method of forming a via in an integrated circuit is provided. The method includes forming a stack including a first layer, a hard mask layer, and at least one...
US-6,787,469 Double pattern and etch of poly with hard mask
A system for fabricating a mixed voltage integrated circuit is disclosed in which a gate is provided that contains a gate oxide and a gate conductor on a...
US-6,787,425 Methods for fabricating transistor gate structures
Methods are presented for fabricating MOS transistors, in which a sacrificial material such as silicon germanium is formed over a gate contact material prior to...
US-6,787,397 Semiconductor device protective overcoat with enhanced adhesion to polymeric materials and method of fabrication
An integrated circuit device with a low stress, thin film, protective overcoat having enhanced adhesion both to polymeric materials used in ...
US-6,787,187 Micromechanical device fabrication
A method of fabricating a micromechanical device. Several of the micromechanical devices are fabricated 20 on a common wafer. After the devices are fabricated,...
US-6,786,978 Mass production of cross-section TEM samples by focused ion beam deposition and anisotropic etching
A method of preparing a TEM sample. A focused ion beam is used to deposit a mask on the material to be sampled. Reactive ion etching removes material not...
US-6,786,411 Image sensor array readout for simplified image compression
The pixels of an image sensor array can be readout (84, 85) in m.times.n blocks (m, n) that are compatible with the operation of a desired image compression...
US-6,785,878 Correcting a mask pattern using multiple correction grids
Correcting a mask pattern includes accessing a record associated with an uncorrected pattern that comprises segments. The record associates each segment with a...
US-6,785,859 Interleaver for variable block size
An interleaver structure for turbo codes with variable block size. The interleaver permutes symbols through multiplication by a parameter followed by modulus by...
US-6,785,850 System and method for automatically configuring a debug system
The invention relates to a software system and method for configuring a software system for interaction with a hardware system. In this method, the software...
US-6,785,749 Apparatus and method for a peripheral inter-module event communication system
An inter-module communication system provides for the exchange of status/event signals between interface modules monitoring the activity of external apparatus....
US-6,785,629 Accuracy determination in bit line voltage measurements
A method and circuit for determining the accuracy of a measurement of a bit line voltage or a charge distribution for readout from FeRAM cells uses sense...
US-6,785,528 Quadrature divider
A quadrature divider includes a first analog mixer (20, 30) for receiving a digital input signal at a predetermined frequency at a first input of the mixer and a...
US-6,784,755 Compact, high power supply rejection ratio, low power semiconductor digitally controlled oscillator architecture
A high PSRR, low power semiconductor digitally controlled oscillator (DCO) architecture employs only one simple current steering D/A converter directly on top of...
US-6,784,736 Apparatus and method for indicating a difference between first and second voltage signals
An apparatus for indicating a difference between a first voltage and a second voltage includes: (a) an input unit for receiving the first voltage at a first...
US-6,784,734 All digital transistor high gain operational amplifier using positive feedback technique
A new all digital transistor CMOS very high DC-gain amplifier (30) that uses an internal positive-feedback technique. This amplifier (30) does not require...
US-6,784,699 Glitch free clock multiplexing circuit with asynchronous switch control and minimum switch over time
A symmetric glitch free clock multiplexing circuit allows the input clock to a digital or analog processing unit to be switched from one frequency to the other...
US-6,784,539 Thermally enhanced semiconductor chip having integrated bonds over active circuits
An integrated circuit (IC) chip has a metal network of electrical power distribution lines which have a thermal conductance at least an order of magnitude...
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