Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-6,748,006 Method and apparatus for controlling system timing with use of a master timer
Unique methods and apparatus for maintaining timing in spread spectrum communications are described. One method involves the steps of repeatedly incrementing an...
US-6,747,858 Digital sample rate converter architecture
A digital sample rate converter converts a digital input signal (Din) having a first sample rate (Fs_in) to a corresponding digital output signal Dout having a...
US-6,747,827 Error correction codes applied variably by disk zone, track, sector, or content
A method for performing error correction code operations on data to be read from the disk (12) of a hard disk drive (10) includes applying a first error...
US-6,747,630 Method to up-sample frequency rich images without significant loss of image sharpness
A bi-cosine filter having a scaling technique to process images for up-scaling that does not lead to loss of the high frequency content of the generated image...
US-6,747,626 Dual mode thin film transistor liquid crystal display source driver circuit
The present invention relates to a source driver circuit (200) for driving a thin film transistor liquid crystal display (TFT-LCD) panel. The source driver...
US-6,747,589 Error correction architecture to increase speed and relax current drive requirements of SAR ADC
An SAR ADC is operated by sampling an input voltage and redistributing a corresponding charge among the coupling capacitor and a plurality of binarily weighted...
US-6,747,507 Bias generator with improved stability for self biased phase locked loop
A bias generator circuit with improved phase margin without RC compensation includes: a first transistor MP4; a second transistor MP3 coupled in parallel with...
US-6,747,504 Controlled rise time output driver
A control slew rate output driver has a plurality of component drivers that are switched on in turn to provide an edge on the output. A control circuit provides...
US-6,747,498 CAN receiver wake-up circuit
A wake-up circuit for a ECU on a CAN bus utilizes two complementary switching transistors which will turn ON when there is a differential voltage between CANH...
US-6,747,481 Adaptive algorithm for electrical fuse programming
This invention describes a means for preventing eFuses from growing back under successive programming pulses after being successfully fused by an earlier set of...
US-6,747,441 Non-synchronous switching regulator with improved output regulation at light or low loads
A switching power supply or switching regulator is provided with a control circuit that controls a switching signal to a first switch. The switching signal is...
US-6,747,353 Barrier layer for copper metallization in integrated circuit fabrication
A barrier layer (20, 62) for an integrated circuit structure is disclosed. The barrier layer (20, 62) is a refractory metal silicon compound, such as a refractor...
US-6,747,343 Aluminum leadframes with two nickel layers
A leadframe for use with integrated circuit chips comprising a leadframe base made of aluminum or aluminum alloy having a surface layer of zinc; a first layer of...
US-6,747,308 Single poly EEPROM with reduced area
An EEPROM (100) comprises a source region (122), a drain region (120); and a polysilicon layer (110). The polysilicon layer (110) comprises a floating gate...
US-6,746,886 MEMS device with controlled gas space chemistry
A process for protecting a MEMS device used in a UV illuminated application from damage due to a photochemical activation between the UV flux and package gas...
US-6,745,319 Microprocessor with instructions for shuffling and dealing data
A data processing system is provided with a digital signal processor (DSP) which has a shuffle instruction for shuffling a source operand (600) and storing the...
US-6,745,293 Level 2 smartcache architecture supporting simultaneous multiprocessor accesses
A digital system is provided with a several processors, a private level one (L1) cache associated with each processor, a shared level two (L2) cache having...
US-6,744,757 Private branch exchange systems for packet communications
A process (111,101) of sending packets of real-time information at a sender (311) includes steps of initially generating at the sender the packets of real-time...
US-6,744,533 Efficient buffer rendering
A method and system for efficient buffer rendering. An object mask, typically a character font mask, is aligned with a memory tiling arrangement (1102). A tile...
US-6,744,280 Voltage output differential (VOD) correction circuit for differential drivers
System and methods are provided for monitoring circuit performance and correcting for variations in current reference signals to maintain a desired Voltage...
US-6,744,243 System and method for dynamically regulating a step down power supply
A low gain feedback compensation circuit is provided on an integrated circuit. The feedback compensation circuit is coupled to a step down power supply on the...
US-6,744,034 Micro-electromechanical apparatus and method with position sensor compensation
Micro-electromechanical apparatus and method with position sensor compensation to compensate for sensor drift. A preferred embodiment comprises modifying the...
US-6,743,719 Method for forming a conductive copper structure
The present invention provides, in one embodiment, a method of forming a metal layer over a semiconductor wafer. The method includes the chemical reduction of...
US-6,743,705 Transistor with improved source/drain extension dopant concentration
A method (40) of forming an integrated circuit (60) device including a substrate (64). The method including the step of first (42), forming a gate stack (62) in...
US-6,743,684 Method to produce localized halo for MOS transistor
Methods are discussed for forming a localized halo structure and a retrograde profile in a substrate of a semiconductor device. The method comprises providing a...
US-6,743,656 MEMS wafer level package
An improved wafer level encapsulated micro-electromechanical device fabricated on a semiconductor wafer and a method of manufacture using state-of-the-art wafer...
US-6,742,395 Hermetic pressure transducer
A port fitting (102) is formed with a closed, pedestal end forming a diaphragm (102a) on which a strain gauge sensor is mounted. A support member (106) is...
US-6,742,110 Preventing the execution of a set of instructions in parallel based on an indication that the instructions were...
A processing engine 10 for executing instructions in parallel comprises an instruction buffer 600 for holding at least two instructions, with the first...
US-6,742,104 Master/slave processing system with shared translation lookaside buffer
A multiprocessor system (20, 102, 110) uses multiple operating systems or a single operating system uses .mu.TLBs (36) and a shared TLB subsystem (48) to provide...
US-6,742,103 Processing system with shared translation lookaside buffer
A multiprocessor system (20, 102, 110) uses multiple operating systems or a single operating system uses .mu.TLBs (36) and a shared TLB subsystem (48) to provide...
US-6,742,058 Memory controller having a multiplexer selecting either second set of input signals or converted signals from...
A configurable memory controller for an AMBA system is described. This configurable memory controller selects one of two possible modes of operation. The...
US-6,741,750 Motion artifact correction in exposure systems
A system and method for correcting spatial banding artifacts in print images. The system includes: a light source, a spatial light modulator, a transport system...
US-6,741,611 Packet memory management (PACMAN) scheme
The present invention is a method and system for managing memory in a communication device which operates in a shared access media environment. In one aspect of...
US-6,741,503 SLM display data address mapping for four bank frame buffer
A method of addressing double buffered memory for an SLM, the memory address having only two bank bits. It is assumed that the pixel data is formatted into...
US-6,741,333 Multiple image photolithography system and method
A multiple image photolithography system includes a radiation source (18) projecting electromagnetic radiation along a path. A reticle cartridge (26) is located...
US-6,741,129 Differential amplifier slew rate boosting scheme
A fully differential amplifier slew rate boosting scheme for use with an amplifier having a closed-loop gain very near unity or less has the first plates of the...
US-6,741,098 High speed semiconductor circuit having low power consumption
A semiconductor circuit which can restrain increase in manufacturing cost and layout area to a minimum level and can realize high speed and low power...
US-6,741,088 Semiconductor testing device having a nest with a detachable anvil
A semiconductor testing device having a nest for holding an integrated circuit during testing. The nest comprises a plate having a front side and a back side, a...
US-6,740,905 Apparatus for suppressing crosstalk in image sensors without degrading red light response
The image sensor has improvements for suppressing cross talk without degrading red light response. This is accomplished by implanting a deep p+ layer 42 under...
US-6,740,603 Control of Vmin transient voltage drift by maintaining a temperature less than or equal to 350.degree. C. after...
A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat (134) is deposited to protect and encapsulate the top...
US-6,738,964 Graphical development system and method
A graphical solutions development system using placement of blocks representing hardware/software functionality on a computer screen drawing and connecting the...
US-6,738,929 Dynamically configurable debug port for concurrent support of debug functions from multiple data processing cores
An emulation controller (12) connected at a pin boundary of an integrated circuit (14) can be provided with concurrent access to concurrent debug signal activity...
US-6,738,888 TLB with resource ID field
A digital system and method of operation is provided in which several processing resources (340) and processors (350) are connected to a shared translation...
US-6,738,881 Multi-channel DMA with scheduled ports
A digital system is provided with a multi-channel DMA controller (400) for transferring data between various resources (401, 402). Each channel includes a source...
US-6,738,864 Level 2 cache architecture for multiprocessor with task--ID and resource--ID
A digital system is provided with a several processors, a private level one (L1) cache associated with each processor, a shared level two (L2) cache having...
US-6,738,860 Synchronous DRAM with control data buffer
A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit...
US-6,738,206 Decision error compensation technique for decision-directed timing recovery loop
A circuit for use in a phase lock loop including a first phase detector to detect a first phase error between input signals, the first phase detector obtaining...
US-6,738,104 Robust color wheel phase error method for improved channel change re-lock performance
A new method for phase locking the color wheel in a color field-sequential projection display. At periodic interrupts, the method determines which color wheel...
US-6,738,074 Image compression system and method
A method for generating image compression quantization matrices is disclosed. A method includes a step of locating a frequency coefficient (120) within a...
US-6,738,048 Touch screen controller
An improved touch screen controller including a comparator and an analog-to-digital converter. The comparator of the touch screen controller detects a touch of...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.