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Patent # Description
US-6,760,837 Bit field processor
An execution unit for a processing engine comprising first head part circuitry for deriving an intermediate signal from an input signal. The execution unit also...
US-6,760,829 MMU descriptor having big/little endian bit to control the transfer data between devices
A digital system is provided with a memory (506) shared by several initiator resources (540-550), wherein a portion of the initiator resources are big endian and...
US-6,760,802 Time-out counter for multiple transaction bus system bus bridge
The time-out counter of this invention provides a capability in a bus bridge for a first bus master to generate a time-out interrupt on reads from a second bus...
US-6,760,742 Multi-dimensional galois field multiplier
An implementation of a multi-dimensional Galois field multiplier and a method of Galois field multi-dimensional multiplication which are able to support many...
US-6,760,333 Hybrid digital subscriber loop and voice-band universal serial bus modem
A Universal Serial Bus (USB) modem (14) having two operating modes, namely Digital Subscriber Loop (DSL) mode and a voice-band mode, is disclosed. A USB...
US-6,760,247 Methods and apparatus for flexible memory access
Memory devices and methods are presented for selectively reading or writing rows or columns of memory cells in a ferroelectric memory array, wherein sense amps...
US-6,760,173 Synchronization servo mark detector and method having improved phase error immunity for use in mass data...
A detector (55) and method for detecting a synchronization servo mark (SSM) in a data stream of mass data storage device (10) has a matched filter (56) to...
US-6,759,892 Temperature compensation trim method
The present invention overcomes the disadvantages of the prior art and provides a new temperature compensation trimming technique. Temperature compensated output...
US-6,759,745 Semiconductor device and manufacturing method thereof
A type of semiconductor device and its manufacturing method, which can further miniaturize semiconductor devices and reduce design restrictions by minimizing the...
US-6,759,278 Method for surface mounted power transistor with heat sink
A surface mounted power transistor is provided with a heat sink by positioning a mounting plate of a heat sink between the power transistor and a solder pad on...
US-6,758,571 Scanning MEMS mirror with reluctance force motor
A movable mirror device driven by a reluctance force motor is provided. A sheet of material has a mirror portion, a hinge portion, and a frame portion formed...
US-6,757,829 Program debugging system for secure computing device having secure and non-secure modes
The method of secure computing concerns the security of a debugger/emulator tool commonly employed in program development. A private encryption key is used to...
US-6,757,819 Microprocessor with instructions for shifting data responsive to a signed count value
A data processing system is provided with a digital signal processor which has an instruction for shifting a source operand in response to a signed shift count...
US-6,757,775 Batch method for accessing IDE device task registers
The method maps at least one intermediate data register of a first data width into the address space of the computer bus. The computer bus writes data to an...
US-6,757,396 Digital audio dynamic range compressor and method
A digital audio dynamic range compressor includes a root mean square estimator receiving first and second audio input samples and generating root mean square...
US-6,757,256 Process of sending packets of real-time information
A process (111,101) of sending packets of real-time information at a sender (311) includes steps of initially generating at the sender the packets of real-time...
US-6,757,206 Sense amplifier with override write circuitry
Methods and apparatus are disclosed for selectively coupling sense amps with local IO lines in memory devices, comprising first and second selection systems...
US-6,756,876 Circuit interrupter and method
A current interrupter (10, 10') includes bimetallic member (18) as a switching member having a formed portion (18a) providing snap action movement between...
US-6,756,796 Method of search and identify reference die
An improved method for pick and place equipment operation is provided by an improved method for identifying the reference die on a wafer. A recording of good...
US-6,756,252 Multilayer laser trim interconnect method
A method for creating electrical interconnects between a semiconductor die and package. In the preferred embodiment, an insulating material is applied over the...
US-6,755,069 Method and tooling for z-axis offset of lead frames
A method and apparatus for enabling z-axis offset of narrow metal ties straps in lead frames used for packaging integrated circuits to prevent bowing or...
US-6,754,893 Method for collapsing the prolog and epilog of software pipelined loops
A method for reducing a code size of a software pipelined loop, the software pipelined loop having a kernel and an epilog. The method includes first evaluating a...
US-6,754,852 Debug trigger builder
A trigger signal TRIG[0] is produced for use in debugging data processor (14) operations. The trigger signal can be generated in response to event information...
US-6,754,809 Data processing apparatus with indirect register file access
A data processing apparatus which uses a register file to provide a faster alternative to indirect memory addressing. A functional unit is connected to a data...
US-6,754,781 Cache with DMA and dirty bits
A digital system and method of operation is provided in which the digital system has at least one processor, with an associated multi-segment cache memory...
US-6,754,733 Shared memory architecture for increased bandwidth in a printer controller
A printer controller for processing print data includes a data processor, direct memory access controller, first and second memories with corresponding first and...
US-6,754,599 Debug output loosely coupled with processor block
An intergrated circuit constructed for easy debug and emulation includes a function clock circuit and an operation circuit operating in synchronism with a...
US-6,754,503 Method for adaptively selecting a soft symbol for a subsequent operation a communication device
A method of selecting a soft symbol for a subsequent operation in a communication device is disclosed. In one embodiment, a signal is received at the...
US-6,754,355 Digital hearing device, method and system
According to one embodiment of the present invention, a digital hearing device is disclosed. The digital hearing aid includes a microphone for receiving sound,...
US-6,754,279 Digital still camera system and method
A digital still camera with capability for playback of audio and video with synchronization of video by a circular buffer containing frame buffers a with...
US-6,754,277 Error protection for compressed video
Provides error protection coding for video data which has been partitioned into motion data and texture data with error protection for the motion data greater...
US-6,754,251 Spread-spectrum telephony with accelerated code acquisition
The present application discloses an improved mobile communications architecture, in which each base station broadcasts not only data which has been spread by...
US-6,753,927 Television interface for handheld calculator for enhanced television display
An interface (10) for connecting a calculator (12) to a standard television (11), so that the calculator's display can be re-displayed on the television (1). The...
US-6,753,913 CMOS analog front end architecture with variable gain for digital cameras and camcorders
An image processing apparatus for charge coupled device (CCD) and video inputs in a digital camera or for a digital camcorder is disclosed which provides optical...
US-6,753,714 Reducing power and area consumption of gated clock enabled flip flops
A master latch implemented to receive feedback from a slave latch on a different input terminal than a input terminal on which data bits are received. Due to...
US-6,753,616 Flip chip semiconductor device in a molded chip scale package
A robust, low inductance electronic package for small area semiconductor chips is provided which includes a flexible polymer film having electronic circuitry on...
US-6,753,575 Tank-isolated-drain-extended power device
A tank-isolated drain extended power device (50, 60, 70, 80) having an added laterally extending heavily doped p-type region (56, 62, 72) in combination with a...
US-6,753,563 Integrated circuit having a doped porous dielectric and method of manufacturing the same
In one aspect of the invention, a method for forming an integrated circuit having an at least substantially doped porous dielectric includes forming a...
US-6,753,559 Transistor having improved gate structure
A gate structure which includes a semiconductor substrate having a channel region, a gate insulator adjacent the channel region of the semiconductor substrate...
US-6,753,219 Method of manufacturing semiconductor integrated circuit devices having a memory device with a reduced bit line...
A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines...
US-6,753,202 CMOS photodiode having reduced dark current and improved light sensitivity and responsivity
A method for the fabrication of a light-sensing diode in a high-resistivity semiconductor substrate. A high-energy implant of ions into the substrate is...
US-6,753,037 Re-coating MEMS devices using dissolved resins
A method for coating free-standing micromechanical devices using spin-coating. A solution with high solids loading but low viscosity can penetrate the free areas...
US-6,752,962 Miniaturized integrated sensor platform
A miniaturized integrated sensor (50) useful for indicating the presence of a sample analyte is disclosed. The sensor (50) has a platform (52) with an upper...
US-6,752,931 Method for using DRIE with reduced lateral etching
A process for manufacturing a wafer having a multiplicity of MEMS devices such as mirrors with gimbals formed thereon is disclosed. A silicon wafer having a...
US-6,752,012 Combined electrical test and mechanical test system for thin film characterization
An apparatus (30) and method (80) for predicting electrical property stability of a thin film or conductive substrate (14) prior to multi-probe testing. The...
US-6,751,784 Implementation of networks using parallel and series elements
The invention provides an algorithm for systematically determining and optimizing the physical implementation of an array of networks with a combination of...
US-6,751,706 Multiple microprocessors with a shared cache
A digital system is provided with a several processors, a private level one (L1) cache associated with each processor, a shared level two (L2) cache having...
US-6,751,269 Bit-interleaved coded modulation for CATV upstream channels
A bit-interleaved encoder for a CATV upstream channel is provided having a convolutional encoder for receiving data values, a bit-interleaver interconnected with...
US-6,751,043 Digital servo control system for a hard disc drive using a voice coil motor in voltage mode
This invention comprises an architecture for voltage mode control of a voice coil motor in a hard disk drive. In contrast to conventional current mode control,...
US-6,751,034 Preamplifier read recovery parade
The present invention relates to a method of enhancing a preamplifier read recovery in a hard disk drive system and comprises the steps of determining whether...
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