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Patent # Description
US-6,753,913 CMOS analog front end architecture with variable gain for digital cameras and camcorders
An image processing apparatus for charge coupled device (CCD) and video inputs in a digital camera or for a digital camcorder is disclosed which provides optical...
US-6,753,714 Reducing power and area consumption of gated clock enabled flip flops
A master latch implemented to receive feedback from a slave latch on a different input terminal than a input terminal on which data bits are received. Due to...
US-6,753,616 Flip chip semiconductor device in a molded chip scale package
A robust, low inductance electronic package for small area semiconductor chips is provided which includes a flexible polymer film having electronic circuitry on...
US-6,753,575 Tank-isolated-drain-extended power device
A tank-isolated drain extended power device (50, 60, 70, 80) having an added laterally extending heavily doped p-type region (56, 62, 72) in combination with a...
US-6,753,563 Integrated circuit having a doped porous dielectric and method of manufacturing the same
In one aspect of the invention, a method for forming an integrated circuit having an at least substantially doped porous dielectric includes forming a...
US-6,753,559 Transistor having improved gate structure
A gate structure which includes a semiconductor substrate having a channel region, a gate insulator adjacent the channel region of the semiconductor substrate...
US-6,753,219 Method of manufacturing semiconductor integrated circuit devices having a memory device with a reduced bit line...
A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines...
US-6,753,202 CMOS photodiode having reduced dark current and improved light sensitivity and responsivity
A method for the fabrication of a light-sensing diode in a high-resistivity semiconductor substrate. A high-energy implant of ions into the substrate is...
US-6,753,037 Re-coating MEMS devices using dissolved resins
A method for coating free-standing micromechanical devices using spin-coating. A solution with high solids loading but low viscosity can penetrate the free areas...
US-6,752,962 Miniaturized integrated sensor platform
A miniaturized integrated sensor (50) useful for indicating the presence of a sample analyte is disclosed. The sensor (50) has a platform (52) with an upper...
US-6,752,931 Method for using DRIE with reduced lateral etching
A process for manufacturing a wafer having a multiplicity of MEMS devices such as mirrors with gimbals formed thereon is disclosed. A silicon wafer having a...
US-6,752,012 Combined electrical test and mechanical test system for thin film characterization
An apparatus (30) and method (80) for predicting electrical property stability of a thin film or conductive substrate (14) prior to multi-probe testing. The...
US-6,751,784 Implementation of networks using parallel and series elements
The invention provides an algorithm for systematically determining and optimizing the physical implementation of an array of networks with a combination of...
US-6,751,706 Multiple microprocessors with a shared cache
A digital system is provided with a several processors, a private level one (L1) cache associated with each processor, a shared level two (L2) cache having...
US-6,751,269 Bit-interleaved coded modulation for CATV upstream channels
A bit-interleaved encoder for a CATV upstream channel is provided having a convolutional encoder for receiving data values, a bit-interleaver interconnected with...
US-6,751,043 Digital servo control system for a hard disc drive using a voice coil motor in voltage mode
This invention comprises an architecture for voltage mode control of a voice coil motor in a hard disk drive. In contrast to conventional current mode control,...
US-6,751,034 Preamplifier read recovery parade
The present invention relates to a method of enhancing a preamplifier read recovery in a hard disk drive system and comprises the steps of determining whether...
US-6,750,910 Optical black and offset correction in CCD signal processing
An apparatus for providing optical black and offset calibration for an array signal comprising a sequence of voltage levels corresponding to a sequence of...
US-6,750,909 Image buffer between burst memory and data processor with multiple access modes set by the data processor
An image processing system comprising a burst memory; a data processor; and a data buffer coupled between the burst memory and the data processor. The data...
US-6,750,699 Power supply independent all bipolar start up circuit for high speed bias generators
A start up circuit includes: a diode Q0; a first transistor Q1 coupled in series with the diode Q0; a first resistor R4 coupled in series with the first...
US-6,750,694 Signal clipping circuit
A clipping circuit (20) for clipping an input signal to a level corresponding to a regulated power supply voltage (AVDD). The clipping circuit (20) includes a...
US-6,750,676 Driving circuit
A driving circuit reduces fall delay time, and the output timing of a driving current can be controlled highly accurately while reducing ringing during a...
US-6,750,663 Method and system for conducting continuity testing on analog devices having sensitive input nodes
The present invention provides for a method (30) and system (10) for isolating the input nodes (3, 4) and/or the output nodes (5, 8) of an analog device (12) and...
US-6,750,641 Method and circuit for temperature nonlinearity compensation and trimming of a voltage reference
An exemplary method and circuit for temperature nonlinearity compensation and trimming of a voltage reference are configured to provide for two-point independent...
US-6,750,553 Semiconductor device which minimizes package-shift effects in integrated circuits by using a thick metallic...
A structure and method of minimizing package-shift effects in integrated circuits is implemented by using a thick metallic overcoat applied after the deposition...
US-6,750,543 Semiconductor device with fully self-aligned local interconnects, and method for fabricating the device
A semiconductor device and a method of making it involve the semiconductor device (10, 71, 101, 121, 151, 201) having a substrate (11, 73, 153) with spaced...
US-6,750,134 Variable cross-section plated mushroom with stud for bumping
An improved bump fabrication process is described that produces a larger diameter/taller solder ball than with a standard mushroom by forming an elongated...
US-6,750,126 Methods for sputter deposition of high-k dielectric films
Methods are disclosed for fabricating transistor gate structures and high-k dielectric layers therefor by sputter deposition, in which nitridation and/or...
US-6,750,081 Header for electronic components board in surface mount and through-hole assembly
A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material...
US-6,749,443 Socket for mounting an electronic device
A socket (10) has a base member (20), a cover member (30) which is mounted for alternating motion toward and away from base member (20), a plurality of contacts...
US-6,748,521 Microprocessor with instruction for saturating and packing data
A data processing system is provided with a digital signal processor which has an instruction for saturating multiple fields of a selected set of source operands...
US-6,748,483 Process of operating a DRAM system
A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit...
US-6,748,363 TI window compression/expansion method
According to the present invention, there is developed a proprietary technology for compressing the window tables of audio coders to 1/8 their original size (or...
US-6,748,006 Method and apparatus for controlling system timing with use of a master timer
Unique methods and apparatus for maintaining timing in spread spectrum communications are described. One method involves the steps of repeatedly incrementing an...
US-6,747,858 Digital sample rate converter architecture
A digital sample rate converter converts a digital input signal (Din) having a first sample rate (Fs_in) to a corresponding digital output signal Dout having a...
US-6,747,827 Error correction codes applied variably by disk zone, track, sector, or content
A method for performing error correction code operations on data to be read from the disk (12) of a hard disk drive (10) includes applying a first error...
US-6,747,630 Method to up-sample frequency rich images without significant loss of image sharpness
A bi-cosine filter having a scaling technique to process images for up-scaling that does not lead to loss of the high frequency content of the generated image...
US-6,747,626 Dual mode thin film transistor liquid crystal display source driver circuit
The present invention relates to a source driver circuit (200) for driving a thin film transistor liquid crystal display (TFT-LCD) panel. The source driver...
US-6,747,589 Error correction architecture to increase speed and relax current drive requirements of SAR ADC
An SAR ADC is operated by sampling an input voltage and redistributing a corresponding charge among the coupling capacitor and a plurality of binarily weighted...
US-6,747,507 Bias generator with improved stability for self biased phase locked loop
A bias generator circuit with improved phase margin without RC compensation includes: a first transistor MP4; a second transistor MP3 coupled in parallel with...
US-6,747,504 Controlled rise time output driver
A control slew rate output driver has a plurality of component drivers that are switched on in turn to provide an edge on the output. A control circuit provides...
US-6,747,498 CAN receiver wake-up circuit
A wake-up circuit for a ECU on a CAN bus utilizes two complementary switching transistors which will turn ON when there is a differential voltage between CANH...
US-6,747,481 Adaptive algorithm for electrical fuse programming
This invention describes a means for preventing eFuses from growing back under successive programming pulses after being successfully fused by an earlier set of...
US-6,747,441 Non-synchronous switching regulator with improved output regulation at light or low loads
A switching power supply or switching regulator is provided with a control circuit that controls a switching signal to a first switch. The switching signal is...
US-6,747,353 Barrier layer for copper metallization in integrated circuit fabrication
A barrier layer (20, 62) for an integrated circuit structure is disclosed. The barrier layer (20, 62) is a refractory metal silicon compound, such as a refractor...
US-6,747,343 Aluminum leadframes with two nickel layers
A leadframe for use with integrated circuit chips comprising a leadframe base made of aluminum or aluminum alloy having a surface layer of zinc; a first layer of...
US-6,747,308 Single poly EEPROM with reduced area
An EEPROM (100) comprises a source region (122), a drain region (120); and a polysilicon layer (110). The polysilicon layer (110) comprises a floating gate...
US-6,746,886 MEMS device with controlled gas space chemistry
A process for protecting a MEMS device used in a UV illuminated application from damage due to a photochemical activation between the UV flux and package gas...
US-6,745,319 Microprocessor with instructions for shuffling and dealing data
A data processing system is provided with a digital signal processor (DSP) which has a shuffle instruction for shuffling a source operand (600) and storing the...
US-6,745,293 Level 2 smartcache architecture supporting simultaneous multiprocessor accesses
A digital system is provided with a several processors, a private level one (L1) cache associated with each processor, a shared level two (L2) cache having...
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