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Patent # Description
US-9,313,124 Conditional instructions for packet processing
A network switch includes a plurality of ports, a parser coupled to the plurality of ports, and a processor coupled to the ports and configured to process a...
US-9,313,062 Transmission of acknowledge/not acknowledge (ACK/NACK) bits and their embedding in the reference signal
Transmitting a acknowledge/not acknowledge (ACK/NACK) response in a wireless cellular network by mapping the data value into a cyclic shifted version of a...
US-9,312,591 Dielectric waveguide with corner shielding
A dielectric wave guide (DWG) has a longitudinal dielectric core member. The core member has a first dielectric constant value. A cladding surrounds the...
US-9,312,253 Heterogeneous integration of memory and split-architecture processor
A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having...
US-9,312,170 Metal on elongated contacts
An integrated circuit containing elongated contacts, including elongated contacts which connect to at least three active areas and/or MOS gates, and including...
US-9,312,164 Localized region of isolated silicon over dielectric mesa
An integrated circuit is formed by forming an isolation mesa over a single crystal substrate which includes silicon, and forming a first epitaxial layer on the...
US-9,311,989 Power gate for latch-up prevention
In an embodiment of the invention, power is provided to an SRAM array without causing latch-up by charging the positive voltage node in the SRAM array and the...
US-9,311,274 Approach for significant improvement of FFT performance in microcontrollers
A system includes a memory bank and a control unit. The control unit is configured to perform FFT computations based on Merged radix-2 butterfly calculations by...
US-9,310,919 Adaptive thresholding for touch screen input
An adaptive threshold approach is applied to detect true touch signals and filter out increased noise signals. More specifically, statistics regarding the...
US-9,310,868 Charging a provider/consumer with a dead battery via USB power delivery
A method and apparatus are provided. The VBUS conductor is checked to determine whether the voltage on the VBUS conductor is greater than a vSafe0V voltage...
US-9,310,861 Robust cable-type detection for USB power delivery
A system and method for detecting a USB cable-type. A USB PD device configured at a near end of a USB cable is configured to (i) receive and process a signal...
US-9,310,823 Voltage reference
A voltage reference circuit includes a bipolar transistor and a circuit configured to measure the ratio of emitter current to base current of the bipolar...
US-9,310,434 Scan topology discovery in target systems
Topology discovery of a target system having a plurality of components coupled with a scan topology may be performed by driving a low logic value on the data...
US-9,308,620 Permeated grooving in CMP polishing pads
A polishing pad for polishing a semiconductor wafer or other materials, having grooves in the polishing pad to enhance the usable lifetime of the polishing pad.
US-9,307,262 Methods and systems for facilitating multimedia data encoding utilizing configured buffer information
Several methods and systems for facilitating multimedia data encoding are disclosed. In an embodiment, a plurality of picture buffers associated with multimedia...
US-9,306,743 One-way key fob and vehicle pairing verification, retention, and revocation
Embodiments of the invention provide methods for key fob to control unit verification, retention, and revocation. After an initial pairing between a key fob and...
US-9,306,548 Pulse generator having a phase and voltage varying pulse width
A pulse generator generates a square-wave pulsed signal that has a variable pulse width. The pulse width, which is defined by the delay through a delay line,...
US-9,306,458 Adaptive boost driver charging circuit
A power circuit combination includes a series capacitor buck converter including a first half-bridge including a first high side power switch (HSA), first low...
US-9,306,263 Interface between an integrated circuit and a dielectric waveguide using a dipole antenna and a reflector
An electronic device has a multilayer substrate that has an interface surface configured for interfacing to a dielectric waveguide. A conductive layer on the...
US-9,306,259 Horn antenna for launching electromagnetic signal from microstrip to dielectric waveguide
A horn antenna is formed within a multilayer substrate and has a generally trapezoidal shaped top plate and bottom plate formed in different layers of the...
US-9,306,013 Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS...
A method of fabricating a MOSFET transistor in a SiGe BICMOS technology and resulting structure having a drain-gate feedback capacitance shield formed between a...
US-9,305,998 Adhesion of ferroelectric material to underlying conductive capacitor plate
Deposition of lead-zirconium-titanate (PZT) ferroelectric material over iridium metal, in the formation of a ferroelectric capacitor in an integrated circuit....
US-9,305,971 Integrated piezoelectric resonator and additional active circuit
A semiconductor device comprises a semiconductor wafer; a piezoelectric resonator formed on the wafer, and an active circuit also formed on the wafer. The...
US-9,305,872 DC-DC converter having terminals of semiconductor chips directly attachable to circuit board
A power supply system has a QFN leadframe with leads and a pad. The pad surface facing a circuit board has a portion recessed with a depth and an outline...
US-9,305,871 High pin count, small packages having heat-dissipating pad
A plastic package for high power has a pair of oblong metal pins exposed from a surface of the plastic, the pins straddling a corner of the package; each pin...
US-9,305,869 Packaged semiconductor device having leadframe features as pressure valves against delamination
A packaged semiconductor device (100) comprising a leadframe having a pad (101) with an assembled semiconductor chip (110), a plurality of straps (102)...
US-9,305,852 Silicon package for embedded electronic system having stacked semiconductor chips
An electronic system comprises a first chip (101) of single-crystalline semiconductor including a first electronic device embedded in a second chip (102) of...
US-9,305,848 Elongated contacts using litho-freeze-litho-etch process
A process of forming an integrated circuit containing elongated contacts which connect to three active areas and/or MOS gates, and elongated contacts which...
US-9,305,812 Die eject assembly for die bonder
Disclosed herein is a die eject assembly for a die bonder that may include a poker pin having an elongate shaft portion with a first end and a second end. The...
US-9,305,688 Single photomask high precision thin film resistor
An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of...
US-9,305,664 Memory repair categorization tracking
An integrated circuit includes a set of non-volatile bits that may be programmed during multiprobe testing of the integrated circuit (IC). A defective portion...
US-9,305,184 Packet-processing scheduler, security context, authentication, packet header, air cipher subsystem
An electronic circuit (200) includes one or more programmable control-plane engines (410, 460) operable to process packet header information and form at least...
US-9,304,954 Multi processor bridge with mixed Endian mode support
An asynchronous dual domain bridge is implemented between the cache coherent master and the coherent system interconnect. The bridge has 2 halves, one in each...
US-9,304,925 Distributed data return buffer for coherence system with speculative address support
The MSMC (Multicore Shared Memory Controller) described is a module designed to manage traffic between multiple processor cores, other mastering peripherals or...
US-9,304,890 Method for throttling trace data streams
A method of managing a debug trace data stream by detecting conditions where the trace data generated exceeds the available transmission bandwidth, and...
US-9,304,283 Bond-pad integration scheme for improved moisture barrier and electrical contact
An apparatus includes first and second electrodes separated by an insulative material (such as a piezoelectric material). The apparatus also includes a...
US-9,303,986 Navigation assistance based on visual codes
Visual codes are scanned to assist navigation. The visual code may be a Quick Response (QR) code that contains information useful to calibrating a variety of...
US-9,303,953 Digital system for the detection of variations in operating conditions of an integrated circuit
A system for detecting tamper events in a digital circuit by having a Critical Path Replica (CPR) circuit operable in parallel with the circuit being monitored,...
US-9,300,975 Concurrent access shared buffer in a video encoder
A video encoder includes a buffer, a DMA engine, a motion estimator and a motion compensator. The buffer includes four pages where macroblocks are stored. The...
US-9,300,361 Enabling co-existence among power line communication (PLC) technologies
Systems and methods for enabling co-existence among power line communications (PLC) technologies are described. In some embodiments, a method performed by a PLC...
US-9,300,247 RC oscillator with additional inverter in series with capacitor
In an electronic device, an RC oscillator generally includes a resistor, a capacitor and at least one inverter. The resistor and capacitor generate a...
US-9,300,222 Three-dimensional power supply module with passive stacked over cavity
A power converter sub-assembly/module includes a power switching assemblage defining a cavity within which can be mounted a driver IC. The power switching...
US-9,300,025 Interface between an integrated circuit and a dielectric waveguide using a carrier substrate with a dipole...
A system includes an integrated circuit that has a substrate with a top surface and a bottom surface. Semiconductor circuitry is including a radio frequency...
US-9,300,024 Interface between an integrated circuit and a dielectric waveguide using a dipole antenna, a reflector and a...
A system includes an electronic device coupled to a mating end of a dielectric wave guide (DWG). The electronic device has a multilayer substrate that has an...
US-9,299,832 High voltage lateral DMOS transistor with optimized source-side blocking capability
An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an...
US-9,299,830 Multiple shielding trench gate fet
A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The...
US-9,299,697 High breakdown voltage microelectronic device isolation structure with improved reliability
A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low...
US-9,298,665 Multicore, multibank, fully concurrent coherence controller
This invention optimizes non-shared accesses and avoids dependencies across coherent endpoints to ensure bandwidth across the system even when sharing. The...
US-9,298,643 Performance and power improvement on DMA writes to level two combined cache/SRAM that is cached in level one...
This invention optimizes DMA writes to directly addressable level two memory that is cached in level one and the line is valid and dirty. When the level two...
US-9,294,346 Proxy pair identification communication though separate proxy devices and paths
In one form of invention a process of operating a host computer coupled to a communications network including: determining whether a diversity flag is set, when...
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