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Patent # Description
US-6,707,702 Volatile memory with non-volatile ferroelectric capacitors
Memory apparatus and methods are provided for storing data in a semiconductor device, comprising volatile and non-volatile portions, where the non-volatile...
US-6,707,690 Power converter employing switched split transformer primary
A pulse-width modulated apparatus to convert an input voltage to an output voltage at advantaged duty-cycles utilizes more than two switches in a converter...
US-6,707,629 Digital temperature monitor
A digital temperature monitor (DTM (24) includes a proportional-to-absolute temperature (PTAT) sensor (44) and reference circuit (48) coupled to the inputs of a...
US-6,707,404 Integral nonlinearity error correction circuitry and method for DAC
An M+N bit DAC includes an N-bit interpolation circuit for interpolating between a first voltage (Vhigh) on a first conductor (17A) and a second voltage (Vlow)...
US-6,707,282 Switched control of inductor ringing for a boost switched power supply
A power supply circuit for generating regulated voltages includes a storage circuit to store the voltages, a control circuit to control the level of stored...
US-6,707,135 Semiconductor leadframe for staggered board attach
The semiconductor integrated circuit device comprises a planar leadframe having lead segments arranged in alternating order into first and second pluralities,...
US-6,707,124 HID land grid array packaged device having electrical and optical interconnects
A high density interconnect device which creates a thin, electrically and thermally high performance package for semiconductor devices having a mechanically...
US-6,706,635 Innovative method to build a high precision analog capacitor with low voltage coefficient and hysteresis
The present invention relates to a method for forming an anlog capacitor on a semiconductor substrate. The method comprises forming a field oxide over a portion...
US-6,706,623 Method and system for avoiding plasma etch damage
An electronic device and method of construction are disclosed that provide for a dielectric layer (12) having a low dielectric constant. A conductive sheath...
US-6,706,606 Buried zener diode structure and method of manufacture
A buried Zener diode structure and method of manufacture requires no additional process steps beyond those required in a basic standard bipolar flow with up-down...
US-6,706,605 Transistor formed from stacked disposable sidewall spacer
A method of forming an integrated circuit transistor (80), comprising providing a semiconductor region (90) and forming a gate structure (92, 94) in a fixed...
US-6,706,561 Method for fabricating preplated nickel/palladium and tin leadframes
A method for fabricating a leadframe structure comprising a chip mount pad and a plurality of lead segments, each having a first end near the mount pad and a...
US-6,704,903 Simplified branch metric and method
A branch metric computation using limited bits by clipping the dynamic range and/or approximating the square of the difference between a sample value and the...
US-6,704,895 Integrated circuit with emulation register in JTAG JAP
An emulation device including a serial scan testability interface having at least first and second scan paths, and state machine circuitry connected and...
US-6,704,847 Host access to shared memory with a high priority mode
A digital system is provided with a memory (42) that can be shared by two or more data requestors (10, 20). Two modes of access are provided. In a shared access...
US-6,704,582 Personalized incoming call signal for communication devices
Apparatus and methods are presented to allow the creation of a personalized audio signal for a communication device., An option to record audio input and create...
US-6,704,218 FeRAM with a single access/multiple-comparison operation
A comparator-type sense amplifier compares a constant voltage that was read out of a FeRAM cell to a sequence of reference voltage levels. A multiple-comparison...
US-6,704,132 Micromirror truss structure and fabrication method
A micromirror (110) includes a frame portion (112), a gimbal portion (114) and a mirror portion (116) formed from a single piece of material. A plurality of...
US-6,704,131 MEMS enclosure
A low-cost, high-performance, reliable micromirror package (300) that replaces the ceramic substrate in conventional packages with a printed circuit board...
US-6,704,013 Function graphing method with detection of discontinuities
A function graphing method for detecting discontinuities. The method involves scanning piecewise linear segments of the function graph and detecting large...
US-6,703,900 Fast, stable overload recovery circuit and method
A differential amplifier includes an input stage (13) and an output stage (100) including an output transistor (M11) having a source coupled to a supply voltage...
US-6,703,890 Voltage supply circuit with parasitic oscillation compensation
A voltage supply circuit in which parasitic oscillation of a charge pump driver circuit can be restrained, charge pump driving currents can be generated at a...
US-6,703,884 System and method for distributing a reference clock in an integrated circuit using filtered power supply line
A clock distribution system and method for an integrated circuit includes a power supply line and a plurality of clock distribution elements. The power supply...
US-6,703,872 High speed, high common mode range, low delay comparator input stage
The comparator input stage uses low voltage transistors 20 and 21 as the input pair. They have a small threshold voltage, and hence support a low common mode....
US-6,703,816 Composite loop compensation for low drop-out regulator
A composite loop compensation circuit and method for a low drop-out regulator configured to facilitate stable operation at very low output load currents is...
US-6,703,815 Low drop-out regulator having current feedback amplifier and composite feedback loop
A low drop-out regulator is configured to provide high output current with a fast response during transient conditions, while also maintaining low quiescent...
US-6,703,673 SOI DRAM having P-doped poly gate for a memory pass transistor
An integrated circuit including a DRAM is disclosed, wherein the DRAM includes a memory array including a plurality of pass gate transistors and a plurality of...
US-6,703,259 System and method for achieving planar alignment of a substrate during solder ball mounting for use in...
A system (10) and method (30) for precisely depositing a solder compound onto a substrate (18). The system (10) generally includes a receiving member (20) having...
US-6,701,418 Automatic detection and correction of relatively rearranged and/or inverted data and address signals to shared...
A set of related methods for detecting the existence and exact nature of any rearrangements and/or inversions of address lines and/or data lines to a memory...
US-6,701,388 Apparatus and method for the exchange of signal groups between a plurality of components in a digital signal...
As the digital signal processor has become more flexible, the direct memory access controller has assumed greater computational power to permit the core...
US-6,700,919 Channel estimation for communication system using weighted estimates based on pilot data and information data
A method (50) of operating a communications receiver (20). The method receives a communications signal (10) which is transmitted via a channel, where the...
US-6,700,719 Preamp reader design for high resistance read heads
A differential circuit to read differential data from a disk by a voltage bias includes a read circuit to read the differential data from the disk by maintaining...
US-6,700,535 Location estimation in narrow bandwidth wireless communication systems
The phase difference between a known stable reference signal (11) and a known signal output by a wireless mobile communication device (5, 5B) is determined at...
US-6,700,522 Signal settling device and method
A method and device are configured for providing for both quick and accurate signal settling. A high accuracy component is configured in parallel with a high...
US-6,700,484 Networked miniature chemical optical sensors
A network for detecting a substance includes at least two detectors that are capable of transmitting a signal, and a remote station capable of receiving the...
US-6,700,449 Saw oscillation circuit
An oscillation circuit uses a SAW oscillator and is able to control the oscillation frequency easily and correct the temperature characteristic of the oscillator...
US-6,700,445 Filter circuits based on trans-conductor circuits
A filter circuit uses a trans-conductor circuit coupled to a control circuit having similar characteristics as the trans-conductor circuit. The control circuit...
US-6,700,399 High density parasitic measurement structure
A method for testing a partially fabricated wafer is provided that comprises the following steps: providing a device under test (DUT) overlying a substrate of...
US-6,700,360 Output stage compensation circuit
An output stage compensation circuit and method for a low drop-out regulator configured to facilitate stable operation while providing output voltage and current...
US-6,700,359 Method for simultaneous output ramp up of multiple regulators
An apparatus for generating a supply voltage includes a first regulator for generating a first supply voltage, a second regulator for generating a second supply...
US-6,700,350 Method and apparatus for controlling charge balance among cells while charging a battery array
A method for controlling voltage levels among cells while charging a battery array to a target voltage uses cell balancing modes employing respective charging...
US-6,700,160 Double-diffused MOS (DMOS) power transistor with a channel compensating implant
An improved DMOS power transistor (20) with a single p-body implant (12) and including an n-type channel compensating implant (NCCI) (24). The improved DMOS...
US-6,699,771 Process for optimizing junctions formed by solid phase epitaxy
A method of forming a semiconductor device includes forming at least one amorphous region within an at least partially formed semiconductor device. The method...
US-6,699,763 Disposable spacer technology for reduced cost CMOS processing
A method of fabricating a CMOS transistor using a silicon germanium disposable spacer (114) for the source/drain implant. After gate etch, silicon germanium...
US-6,699,745 Capacitor and memory structure and method
A rugged polysilicon electrode for a capacitor has high surface area enhancement with a thin layer by high nucleation density plus gas phase doping which also...
US-6,698,649 Desolder apparatus
Apparatus and methods for removing solder ball connections from electrical circuits are disclosed. The apparatus and methods comprise a solder ball removing tool...
US-6,698,082 Micro-electromechanical switch fabricated by simultaneous formation of a resistor and bottom electrode
The present invention provides a method and product-by-method of integrating a bias resistor in circuit with a bottom electrode of a micro-electromechanical...
US-6,697,982 Generating netlist test vectors by stripping references to a pseudo input
A method for enabling test vectors to be generated for a customer designed integrated circuit having an embedded vendor circuit is disclosed. The embedded vendor...
US-6,697,916 Cache with block prefetch and DMA
A digital system and method of operation is provided in which the digital system has at least one processor, with an associated multi-segment cache memory...
US-6,697,642 Wireless communications apparatus
Apparatus for a wireless communication network, comprises: a directional beam antenna, an antenna controller for directing said directional beam antenna in an...
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