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Patent # Description
US-6,727,757 Biasing circuit for transconductors
A transconductor circuit, including a differential transconductor amplifier circuit. The transconductor circuit includes an input pair of transistors adapted to...
US-6,727,755 High speed linear variable gain amplifier architecture
A two stage amplifier circuit (10), the first stage (12) comprising a modified quad configuration and the second stage (14) comprising a translinear current...
US-6,727,752 Modulation scheme for switching amplifiers to reduce filtering requirements and crossover distortion
A modulation scheme can drive an associated load that is coupled between a pair of outputs by providing a switching signal at one of the outputs and a...
US-6,727,722 Process of testing a semiconductor wafer of IC dies
Integrated circuit die on a wafer are tested individually, without probing any of the die, using circuitry (TC1-8, BC1-8, LR1-8, RR1-8, PA1-PA4) provided on the...
US-6,727,578 Semiconductor device having power supply voltage routed through substrate
A semiconductor device (200) having a substrate routed power supply voltage is disclosed. The semiconductor device (200) includes a relatively highly doped...
US-6,727,185 Dry process for post oxide etch residue removal
A cleanup process that uses a dilute fluorine in oxygen chemistry in a downstream plasma tool to remove organic and inorganic polymeric residues (116).
US-6,727,133 Integrated circuit resistors in a high performance CMOS process
An integrated circuit resistor (150) is formed on an isolation dielectric structure (20) formed in a semiconductor (10). A patterned silicon nitride layer (74)...
US-6,727,131 System and method for addressing junction capacitances in semiconductor devices
A method of forming a semiconductor device is provided that comprises forming a gate conductor proximate to and insulated from an outer surface of a...
US-6,725,409 DSP instruction for turbo decoding
The addition of a specialized instruction to perform the MAX star function provides a way to get better performance turbo decoding on a digital signal processor....
US-6,725,391 Clock modes for a debug port with on the fly clock switching
An integrated circuit constructed for easy debug and emulation includes a function clock circuit and an operation circuit operating in synchronism with a...
US-6,725,202 Transaction accounting of toll transactions in transponder systems
This invention allows a toll authority to monitor transaction numbers which are sent from a transponder (14) to an interrogator (12). By incrementing the...
US-6,725,025 Interference cancellation among wireless units using Gibbs sampling
An improved interference cancellation technique is disclosed. Digital baseband circuitry (40) includes user and symbol detection circuitry (50) for performing a...
US-6,724,828 Mobile switching between STTD and non-diversity mode
A communication circuit is designed with a detector circuit (720) coupled to receive a first signal. The detector circuit is arranged to produce a multipath...
US-6,724,646 Dummy cell structure for 1T1C FeRAM cell array
A ferroelectric memory structure is described for the 1T1C arrangement in a ferroelectric capacitor cell array for FeRAM memory device applications. The device...
US-6,724,556 Single pole voltage bias loop for increased stability
A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data...
US-6,724,551 Preamp fast head switch technique for servo mode
A differential circuit to read differential data from a disk by a current bias on a plurality of read heads includes a read circuit to read the differential data...
US-6,724,431 Program network specific information for TV or radio
A communication system is desccribed which comprises a transmitter which transmits a standard broadcast format with an associated text string and a receiver for...
US-6,724,327 Lower latency coding/decoding
An electronic device may receive a packet comprising a plurality of codewords comprising pre-processing logic, a first decoder, and a second decoder. The...
US-6,724,264 Controller for a device with change in characteristics
A device characteristic changing apparatus is provided for changing a characteristic of a device. The device characteristic changing apparatus comprises a time...
US-6,724,260 Low power current feedback amplifier
A low power current feedback amplifier having a lower output impedance input stage is provided. To reduce the output impedance, an input stage comprises a...
US-6,724,258 Highly-linear, wide-input-range, wide control-range, low-voltage differential voltage controlled transconductor
A voltage controlled transconductor (VCT) for receiving a differential input signal comprising a first voltage signal and a second voltage signal, and for...
US-6,724,236 Buffered bootstrapped input switch with cancelled charge sharing for use in high performance sample and hold...
A buffered bootstrapped input switch employs cancelled charge sharing for use in high performance sample and hold switched capacitor circuits especially useful...
US-6,724,070 Fine pitch lead frame
A lead frame including a first set of leads in a first plane and a second set of leads in a second plane offset vertically from the second plane. The leads in...
US-6,724,066 High breakdown voltage transistor and method
An integrated circuit that includes a high breakdown voltage bipolar transistor. The bipolar transistor includes an emitter 36, a base 32, and a collector...
US-6,724,050 ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta
A vertical bipolar transistor having low breakdown voltage, low ESD clamping voltage and high beta is fabricated in a semiconductor 301 of a first conductivity...
US-6,724,047 Body contact silicon-on-insulator transistor and method
A method for fabricating a body contact silicon-on-insulator transistor (10) includes forming a semiconductor substrate (12) over an insulator (14) and lightly...
US-6,723,658 Gate structure and method
A MOSFET structure with silicate gate dielectrics and silicon or metal gates with HF-based wet silicate gate dielectric etch.
US-6,723,636 Methods for forming multiple damascene layers
According to one embodiment of the invention, a method for forming multiple layers of a semiconductor device is provided. The method includes defining a via...
US-6,723,629 Method and apparatus for attaching solder members to a substrate
The invention discloses a method for attaching solder members (114) to a substrate (112). The method includes forming a decal (110) with a plurality of solder...
US-6,723,616 Process of increasing screen dielectric thickness
A method of forming a semiconductor device using shallow trench isolation, includes forming a trench within a semiconductor substrate and forming a screen...
US-6,723,172 Method and system for processing semiconductor wafers
A method for processing semiconductor wafers includes processing a semiconductor wafer in a processing chamber having upper and lower chambers, decoupling the...
US-6,722,210 System and method for measuring air flow at multiple points of an air channel
A device measures air flow at multiple points in an air channel. The device includes a metering plate that has multiple passages through the metering plate. The...
US-6,721,774 Low power multiplier
A digital multiplier 110 for multiplying a plurality of multiplicand signals X0-X23 representing a multiplicand and a plurality of multiplier signals Y0-Y23...
US-6,721,710 Method and apparatus for audible fast-forward or reverse of compressed audio content
A method for performing audible fast-forward or reverse of audio content represented in a compressed format, such as, but not limited to, MPEG-1 Layer 3 (MP3) or...
US-6,721,687 Electronic device evaluation system
An electronic device evaluation system (100) includes a potential customer located at a site (102) that accesses a company site (106) via a computer network such...
US-6,721,428 Automatic loudspeaker equalizer
A method for generating digital filters for equalizing a loudspeaker. First digital data is provided, for a tolerance range for a target response curve of sound...
US-6,721,295 Triple data system for high data rate communication systems
A slot-aligned IQ data buffer scheme has a third buffer that allows a processing engine to slide the selection of a vector to be processed so that it aligns with...
US-6,721,217 Method for memory sensing
Methods are disclosed for reading data from memory cells such as a ferroelectric memory cell in a memory device, where one sense amp bitline is coupled with a...
US-6,721,200 Dummy cell structure for 1T1C FeRAM cell array
A ferroelectric memory structure is described for the 1T1C arrangement in a ferroelectric capacitor cell array for FeRAM memory device applications. The device...
US-6,721,119 System and method for controlling an actuator motor during retract
A system and method are provided for controlling operation of an actuator for retracting a read/write head of a hard disk drive system. One aspect of the system...
US-6,721,115 System and method for enhancing write driver performance
A technique for presenting an optimally timed control signal to an upper H-switch driver in a fashion capable of achieving a very fast transition of the current...
US-6,720,959 Area efficient, low power and flexible time digitizer
A non-linear time digitizer delay chain and a respective lookup table for converting the phase error into a digital code together prevent a phase error pulse...
US-6,720,856 Calibration structure for circuit breakers having bimetallic trip member
A thermally compensated circuit breaker has a movable contact assembly (24) which mounts a movable electrical contact (24m) for movement between open and closed...
US-6,720,825 Method and circuit for reduction of audible turn-on and turn-off transients in switching amplifiers
A system and method for reducing audible turn-on and turn-off transients in switching amplifiers employs a frequency shaped start sequence in front of a...
US-6,720,788 High resolution current measurement method
The present invention provides a system and method for high resolution current measurements of an integrated circuit (13). With the present invention, no DFT...
US-6,720,780 High density probe card apparatus and method of manufacture
A high density probe card contact apparatus including a support block fitted into an opening in a probe card, and holding a plurality of fine tipped needles...
US-6,720,749 Three-phase motor protector apparatus
A three-phase motor protector uses two toroids to monitor all three phases of a three-phase motor. Current and phase loss are monitored directly in phases A and...
US-6,720,574 Method of testing a semiconductor chip
An apparatus for testing a semiconductor die and the method wherein there is provided a package having a cavity therein with a plurality of terminals in the...
US-6,720,255 Semiconductor device with silicon-carbon-oxygen dielectric having improved metal barrier adhesion and method of...
A method (100) of fabricating an electronic device (200) formed on a semiconductor wafer. The method forms a dielectric layer (226) in a fixed position relative...
US-6,720,247 Pre-pattern surface modification for low-k dielectrics using A H2 plasma
A low-k dielectric layer (104) is treated with a dry H.sub.2 plasma pretreatment to improve patterning. Resist poisoning occurs due to an interaction between...
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