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Patent # Description
US-6,671,797 Microprocessor with expand instruction for forming a mask from one bit
A data processing system is provided with a digital signal processor which has an instruction for expanding one bit to form a mask field. In one form of the...
US-6,671,765 Architecture enabling code overlay using a dedicated endpoint
A USB function device (14) for coupling to a USB host (12). The USB function device (14), comprises circuitry (32) for providing a capability to the USB host,...
US-6,671,665 Emulation system with search and identification of optional emulation peripherals
In-circuit-emulation of an integrated circuit permits location and identification of optional emulation resources. Each emulation resource is assigned a memory...
US-6,671,663 Time domain noise analysis
A circuit simulator is provided for simulating the operation of a circuit in the time domain by accounting for the physical fluctuation (noise) in the time...
US-6,670,828 Programmable termination for CML I/O
A programmable termination circuit (12) selectively providing a termination voltage to a driver or receiver of a high-speed serial link, such as CML I/O's. The...
US-6,670,685 Method of manufacturing and structure of semiconductor device with floating ring structure
A high voltage semiconductor device includes a drain region disposed within a semiconductor substrate. The semiconductor device further includes a field oxide...
US-6,668,366 System and method for processing a transistor channel layout
A system for processing a transistor channel layout includes a processor coupled to an input device, an output device, a memory, and a data retrieval device. The...
US-6,668,345 Synchronous semiconductor allowing replacement with redundant memory cell while maintaining access time
The higher order bit of the output from an address latch circuit is applied to a predecoder that operates a predecode signal to select a column select line and...
US-6,668,008 Ultra-wide band communication system and method
A system and method for generating an ultra-wide band communication signal having data occurring a specific frequencies precisely excised at baseband. The data...
US-6,667,993 Communication channel
A digital system (100) has two or more nodes (120, 130) and a communication channel (110, 111) for transferring a single stream of ordered data from one node to...
US-6,667,896 Grouped plate line drive architecture and method
An integrated circuit device includes a two-dimensional array of ferroelectric memory cells in which plate lines within the array are grouped. The grouping of...
US-6,667,865 Efficient design of substrate triggered ESD protection circuits
A semiconductor device is designed with a common supply voltage terminal (330). A plurality of standard cells (360-364), each having a plurality of leads...
US-6,667,650 Current leakage compensation circuit and method
A leakage compensation circuit and technique is provided that compensates for losses in a referenced current of an amplifier circuit due to leakage elements. The...
US-6,667,597 Method of extending the operating speed range of a rotor flux based MRAS speed observer in a three phase AC...
A method of AC induction motor speed control employing a rotor flux based MRAS (Model Reference Adaptive System) speed observer. Rotor flux-based MRAS speed...
US-6,667,560 Board on chip ball grid array
A package for an integrated circuit includes a circuit board 122 for mounting the integrated circuit 114 having a first surface and a second surface, a...
US-6,667,433 Frequency and phase interpolation in sinusoidal model-based music and speech synthesis
A quadratic phase interpolation method for synthesis of musical tones incorporates both phase and frequency measurements at the boundaries of a data frame using...
US-6,667,231 Method of forming barrier films for copper metallization over low dielectric constant insulators in an...
An integrated circuit structure and method of making the same is disclosed, in which the adhesion of copper conductors (12, 22) to a low-dielectric constant...
US-6,667,226 Method and system for integrating shallow trench and deep trench isolation structures in a semiconductor device
A semiconductor device and a method for constructing a semiconductor device is disclosed. A deep trench isolation structure (108) is formed proximate a surface...
US-6,667,210 Flash memory cell process using a hardmask
A method is described for forming a memory structure using a hardmask (65). The hardmask (65) protects the second polysilicon layer (55) during a SAS etch...
US-6,666,691 Socket for removably mounting electronic packages
A socket (1) has a base (2) on which rows of contact pins 4 are arranged, the contact pins being elastically deformable in the vertical direction, an adaptor (5)...
US-6,665,767 Programmer initiated cache block operations
This invention enables a program controlled cache state operation on a program designated address range. The program controlled cache state operation could be...
US-6,665,696 Delayed adaptive least-mean-square digital filter
A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite...
US-6,665,695 Delayed adaptive least-mean-square digital filter
A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite...
US-6,665,693 Digital signal processing circuits, systems, and methods implementing approximations for a reciprocal
A digital signal system (10, 100) for determining an approximate reciprocal of a value of x. The system includes an input (12) for receiving a signal, and...
US-6,665,277 Comma free codes for fast cell search using tertiary synchronization channel
A method of processing data comprises the receiving a frame of data having a predetermined number of time slots (502,504,506). Each time slot comprises a...
US-6,665,110 Diagonal to rectangular pixel mapping for spatial light modulator
A method of mapping diagonal rows and columns of two-dimensional grid elements to rectangular rows and columns of two-dimensional grid elements. The method is of...
US-6,664,912 Preamplifier with improved CMRR and temperature stability and associated amplification method
A preamplifier that is substantially resilient to temperature and input common-mode variations includes a feedback network coupled to regulate a common mode...
US-6,664,847 CTAT generator using parasitic PNP device in deep sub-micron CMOS process
A control circuit generates a current that remains substantially constant over temperature using a bandgap reference for providing a PTAT current. A first...
US-6,664,779 Package with environmental control material carrier
A drop-in environmental control material carrier assembly 55, which improves the performance and lowers the cost of semiconductor packages. The environmental...
US-6,664,622 Header for electronic components board in surface mount and through-hole assemble
A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material...
US-6,664,166 Control of nichorme resistor temperature coefficient using RF plasma sputter etch
A method for processing a partially fabricated semiconductor wafer having a layer of nichrome resistor material patterned to form a plurality of nichrome...
US-6,663,243 Projection device comprising a prism system including at least one totally internally reflecting surface at a...
A projection device includes one or more deformable mirror arrays (803) arranged to spatially modulate incident light. A totally internally reflecting surface...
US-6,662,291 Synchronous DRAM System with control data
A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit...
US-6,661,900 Digital graphic equalizer control system and method
A digital graphic equalizer uses a predetermined number of equalizing bands each having a different center frequency, and the center frequencies span a...
US-6,661,683 Charge pump having very low voltage ripple
A charge pump circuit is configured for continuous control of the output of the charge pump circuit through continuous use of at least one charge pump capacitor...
US-6,661,534 Selective screening for printing files in a page description language
This invention involves approximating a gray scale tone with a more limited range image producer, a process known as screening. This invention reduces the time...
US-6,661,517 Shot averaging for fine pattern alignment with minimal throughput loss
A way to average alignment measurements that obtains the advantage of multiple alignment marks per shot without requiring actual measurement of all alignment...
US-6,661,465 Television interface for handheld calculator for use with multiple calculator display formats
An interface (10) for connecting a calculator (12) to a standard television (11), so that the calculator's display can be re-displayed on the television (1). The...
US-6,661,330 Electrical fuse for semiconductor integrated circuits
The present invention relates to a fuse and a method for forming a fuse over a semiconductor substrate. The fuse comprises forming a first contact member and a...
US-6,661,288 Apparatus for effecting high speed switching of a communication signal
An apparatus for effecting high speed switching of a communication signal between a first component and a second component includes: (a) a switching circuit...
US-6,661,266 All digital built-in self-test circuit for phase-locked loops
In general, a built-in self test circuit and method is provided that measures error in any periodic signal and, particularly, a Phase Lock Loop (PLL) output...
US-6,661,255 Interface circuit
An interface circuit for a printer to prevent transmission of an incorrect control signal when power is input into the printer. The interface circuit improves...
US-6,661,216 Apparatus and method for controlling startup of a precharged switching regulator
An apparatus for presenting a regulated output at an output locus established at a precharge level includes: (a) an error indicator generating an error signal...
US-6,660,989 CMOS imager having asynchronous pixel readout in order of pixel illumination
This CMOS imager represents illuminance in the time domain. Once per frame, each pixel outputs a pulse after a time proportional to the illuminance on that...
US-6,660,650 Selective aluminum plug formation and etchback process
An embodiment of the instant invention is a method of fabricating an electronic device over a semiconductor substrate having an interconnecting structure...
US-6,660,616 P-i-n transit time silicon-on-insulator device
A transit time device (15, 15') in a silicon-on-insulator (SOI) technology is disclosed. An anode region (18) and a cathode region (20) are formed on opposing...
US-6,660,612 Design to prevent tungsten oxidation at contact alignment in FeRAM
One aspect of the invention relates to a method of manufacturing a semiconductor device in which an alignment mark is formed by a plurality of adjacent filled...
US-6,660,605 Method to fabricate optimal HDD with dual diffusion process to optimize transistor drive current junction...
Methods are discussed for forming a transistor comprising a source/drain region having both a graded HDD portion and a sharp HDD portion in a semiconductor...
US-6,660,603 Higher voltage drain extended MOS transistors with self-aligned channel and drain extensions
An integrated circuit drain extension transistor. A transistor gate (72) is formed over a CMOS n-well region (10). A transistor source extension region (50), and...
US-6,660,595 Implantation method for simultaneously implanting in one region and blocking the implant in another region
A method of fabricating different transistor structures with the same mask. A masking layer (214) has two openings (204, 202) that expose two transistor areas...
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