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Method of planarizing a conductive plug situated under a ferroelectric
An embodiment of the instant invention is a method of fabricating a planar conductive via in an opening through a dielectric layer having a top surface, a bottom...
Method of patterning a FeRAM capacitor with a sidewall during bottom
A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the patterning of a top electrode layer and a dielectric layer to form a...
Methods of preventing reduction of IrOx during PZT formation by
metalorganic chemical vapor deposition or other...
A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the decreases a reduction in a bottom electrode material during formation of...
Two pass process for producing a fine pitch lead frame by etching
A method of fabricating a lead frame. The method includes providing an electrically conductive layer having a pair of opposing major surfaces. A pattern is...
Method for low perfluorocarbon compound emission
A method of reducing perfluorocarbon emissions wherein a plasma reactor or thermal chamber is provided and a gaseous single halogen-containing perfluorocarbon is...
Application of ozonated DI water to scrubbers for resist strip and particle
A method for resist strip and particle removal. Wafers (108) with a patterned resist formed thereon are placed on a wafer chuck (104) in a scrubber tool...
Optical proximity correction
An improvement to the optical proximity correction process used in photolithography. Mask pattern modeling is added to the optical proximity correction process,...
Processor having real-time power conservation
A processor, comprising a monitor for measuring the relative amount of Input/Output (I/O) within the processor, results of the measuring being used by the...
Method and apparatus for using a universal serial bus to provide power to a
portable electronic device
A method and apparatus for using a universal serial bus "USB" in a computer as a power source for a portable electronic device. In one embodiment of the...
Log-spectral compensation of PMC Gaussian mean vectors for noisy speech
recognition using log-max assumption
Reducing mismatch between HMMs trained with clean speech and speech signals recorded under background noise can be approached by distribution adaptation using...
Speech recognition front-end feature extraction for noisy speech
An estimate of clean speech vector, typically Mel-Frequency Cepstral Coefficient (MFCC) given its noisy observation is provided. The method makes use of two...
Micromirror optical switch
A family of optical switches. Each switch (400) includes a holder block (402) to hold optical fibers (410, 412) and ferrules (414) in alignment with a...
High voltage protection circuit for improved oxide reliability
A structure is designed with an external terminal (100) and a reference terminal (130). A first transistor (106) has a current path coupled to the external...
Method of encoding video data for serial transmission
An encoding scheme simplifies the TMDS encoding algorithm described in the DVI 1.0 specification while retaining compatibility with most existing DVI receivers....
Sense amplifier-based flip-flop with asynchronous set and reset
A flip-flop including a first stage and a second stage. The first stage receives a pair of differential signals to generate a set and reset signal. The...
Compact, sealed pressure switch
A pressure switch 1 of this invention comprises a base electrode 2, a terminal 3, a disc 4 and a diaphragm 5. The base electrode 2 has a switching chamber 7 for...
Method of ammonia annealing of ultra-thin silicon dioxide layers for
uniform nitrogen profile
An embodiment of the present invention is a method of forming an ultra-thin dielectric layer by providing a substrate having a semiconductor surface; forming an...
Disposable spacer technology for reduced cost CMOS processing
A method of fabricating a CMOS transistor using a silicon germanium disposable spacer (114) for the source/drain implant. After gate etch, silicon germanium...
A projecting display system includes a light source (101) which produces light which is spatially modulated by a number of spatial light modulators (105, 107). A...
System and method for self-tuning feedback control of a system
A tuned run-to-run controlled system is disclosed that provides tuned run-to-run control of a system. The system includes a controlled system coupled to a tuned...
Jitter feedback slicer
A method and apparatus to make the signal slice level during data qualification in an Optical Disc apparatus adaptable to DSV variation. According to this...
Method of reducing a frequency-response peaking of a magneto-resistive
preamplifier in a mass data storage...
A mass data storage device system (70) and method for providing frequency compensation within it are disclosed. The system has a moving media (72) that contains...
High beta output stage for high speed operational amplifier
The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over...
System for reducing silicon-consumption through selective deposition
Disclosed is a system for fabricating a semiconductor device (100). A layer of cobalt (32) is deposited onto a silicon region (104, 106, 108) and annealed to...
Method and system for testing the performance of DSP
A method of testing the performance of real time DSP algorithms after customer code has been added and includes the steps of embedding a signature equation in...
Apparatus for and method of generating a clock from an available clock of
An apparatus for and method of generating a clock signal having a desired frequency that is derived from a clock source having any arbitrary,frequency. The...
Method and apparatus for accessing a memory core multiple times in a single
An apparatus and method for using self-timing logic to make at least two accesses to a memory core in one clock cycle is disclosed. In one embodiment of the...
Cache memory controlled by system address properties
A digital system is provided with a microprocessor (100), a cache (120) and various memory and devices (140a-140n). Signals to control certain cache memory modes...
System and method to reduce bond program errors of integrated circuit
A computerized system and method for reducing bond program errors in a slave bonder, prepared to attach connecting bonds onto bond pads of a slave integrated...
Method and system for defining and recognizing complex events in a video
Given a system which detects simple events, one can define a complex event by constructing a list of sub-events. In order to recognize a complex event, the...
Bias cell for four transistor (4T) SRAM operation
Quiescent current drawn by an array of four-transistor loadless static random access memory (SRAM) cells is minimized by using a negative feedback loop to set a...
System and method for electrostatic discharge protection using lateral PNP
or PMOS or both for substrate biasing
The invention comprises a system and method for providing electrostatic discharge protection. In one embodiment of the invention, an integrated circuit (10)...
Method and circuit for trimming offset and temperature drift
An exemplary trimming circuit can be further simplified to include a single current source to provide for trimming of offset and temperature drift in a device,...
Method and apparatus for exponential gain variations with a linearly
varying input code
A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is...
System and method to speed-up operation of a driver
Transitions (e.g. high to low and/or low to high) associated with operation of the driver are employed to implement control, which can be applied as a pulse in...
Clamping and unclamping apparatus for a semiconductor test board
A system for simultaneously securing a plurality of integrated circuits in a test fixture, comprising a base supporting a test board having a plurality of...
Integrated low ripple, high frequency power efficient hysteretic controller
for dc-dc converters
The present invention relates to a method of improving power efficiency in a converter circuit at low load currents. The method comprises the steps of monitoring...
Linear sinusoidal waveform spindle driver and method for driving a
polyphase, brushless DC motor using...
A circuit and method for providing drive currents to a polyphase dc motor are presented. The circuit (40) includes a circuit for generating a user-defined...
Structure and method of MOS transistor having increased substrate
Structure and fabrication method of a lateral MOS transistor, positioned on the surface of an integrated circuit fabricated in a semiconductor of a first...
Apparatus and method for selectively restricting process fluid flow in
A semiconductor processing apparatus (10) is disclosed which includes a process chamber (12) and at least one substrate support (18) disposed within the process...
Reflow method for construction of conductive vias
A method of constructing a semiconductor device 10 is disclosed which includes a reflow step. The device 10 comprises a conductive via 20 electrically connected...
Integrated circuit and method of using porous silicon to achieve component
isolation in radio frequency...
The invention relates to an improved substrate (100) using a layer (112) or region (130) of porous silicon that is created in the bulk silicon substrate material...
System and method for reinforcing a bond pad
A reinforcing system for a bond which includes at least one dielectric layer or stack disposed under the bond pad. A reinforcing patterned structure is disposed...
Processing devices with improved addressing capabilities systems and
A data processing device comprising a storage circuit accessible by assertion of addresses, an arithmetic logic unit connected to the storage circuit operative...
Methods and apparatus for use in simultaneously generating multiple data
sequences using a single data access...
Inventive methods and apparatus for use in simultaneously generating two or more pseudorandom noise (PN) sequences for spread spectrum communications are...
Micromechanical memory element
A micromechanical memory 100 element comprising a deflectable member 102 located between a first member 104 and a second member 106. The first member 104 is...
Fluorinated coating for an optical element
A protective cover (10) for an optical device, such as a spatial light modulator or an infrared detector or receiver. The cover (10) has an optically...
Switched capacitor integrator that shares a capacitor for input signal and
A switched capacitor integrator that shares a switched capacitor CAP1 at the input of the integrator for the signal input and the reference capacitor. The...
Low-voltage, broadband operational amplifier
A low voltage, broadband differential operational amplifier which eliminates the long tail current source from the amplifier, thereby relieving the headroom...
Level detection by voltage addition/subtraction
A circuit is designed with a first transistor (661) having a current path coupled between a supply terminal (32) and a first output terminal (665). A second...