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Switched capacitor integrator that shares a capacitor for input signal and
A switched capacitor integrator that shares a switched capacitor CAP1 at the input of the integrator for the signal input and the reference capacitor. The...
Low-voltage, broadband operational amplifier
A low voltage, broadband differential operational amplifier which eliminates the long tail current source from the amplifier, thereby relieving the headroom...
Level detection by voltage addition/subtraction
A circuit is designed with a first transistor (661) having a current path coupled between a supply terminal (32) and a first output terminal (665). A second...
Reduction of propagation delay dependence on supply voltage in a digital
In one embodiment, a digital circuit element has a propagation delay that is substantially constant over a range of supply voltages applied to the digital...
High speed voltage mode differential digital output driver with
edge-emphasis and pre-equalization
A differential driver includes two feedback loops 20 and 22, and two inverter pairs 24 and 26. The two feedback loops 20 and 22 regulate the source voltages for...
Drain-extended MOS ESD protection structure
A protection structure (30; 30'; 30") for safely conducting charge from electrostatic discharge (ESD) at a terminal (IN) is disclosed. The protection structure...
ESD robust bipolar transistor with high variable trigger and sustaining
An ESD robust bipolar transistor (200) that includes first and second bipolar elements (210, 220), wherein a first trigger voltage of the first bipolar element...
Effective solution and process to wet-etch metal-alloy films in
A solution and method is described for etching TaN, TiN, Cu, FSG, TEOS, and SiN on a silicon substrate in silicon device processing. The solution is formed by...
Polysilicon processing using an anti-reflective dual layer hardmask for 193
A lithographic method of forming submicron polysilicon features on a semiconductor substrate, including the steps of coating said substrate with an...
Reliable interconnects with low via/contact resistance
Two barrier layers are used for a via or contact. A thin CVD barrier (124) (e.g., SiN, TiSiN, TaSiN, etc.) is deposited over a structure including within a via...
System and method for controlling a wafer polishing process
A method is provided for controlling a wafer polishing process. The method includes determining a polishing characteristic for a particular type of device from a...
Method and apparatus for operating a system to test integrated circuits
A testing system for testing an integrated circuit device includes a test definition generator program which generates an initial test definition from...
Timing window elimination in self-modifying direct memory access processors
A direct memory access function for servicing real-time events, ensures that any parameter reloads occur during times when the direct memory access channel is...
The present invention pertains to a type of frequency synthesizer which can correctly compensate for the ripple current. Frequency synthesizer 1 has PLL loop...
Error resilient video coding using reversible variable length codes (RVLCs)
Video compression coding with partitioning of data into motion vector data and texture data with reversible Golomb-Rice type codes for the data. ...
Ring configuration for network switches
Network switching systems (10, 110, 210, 310, 410) for use in an Ethernet network are disclosed. Each of the switching systems includes switch devices (20)...
Transport packet parser
A transport packet parser (42) includes a transport packet header decoder (50)for identifying a packet identifier (PID) and continuity counter (CC) associated...
Method for providing a low power read only memory banking methodology with
efficient bus muxing
A low power Read Only Memory (ROM) bank accessing system with efficient bust muxing is provided. The memory access system includes separate pre-charge and...
Write-to-read switching improvement for differential preamplifier circuits
in hard disk drive systems
The present invention relates to a preamplifier circuit comprising a plurality of amplifier stages coupled together and operable to consecutively amplify a...
Accurately scheduling rendering of bands in a printer
A printer controller which renders the bands in a plane of a page to measure the resources required to render each band of the plane. The measured parameters are...
Common color wheel speed system
A display system 100 in which light from source (102) is focused onto a spinning color wheel (104). The spinning color wheel (104) creates of beam of light that...
Attenuating undesired frequencies while sampling a communication signal
An analog signal (V.sub.IN) is converted into a digital signal (24) by sampling the analog signal at a plurality of points in time to produce a sampled signal...
Impedance matching for programmable gain amplifiers
Digital subscriber modems (8, 15) for use in Asynchronous Digital Subscriber Line (ADSL) communications are disclosed. The central office modem (8) includes a...
Supply voltage compensation circuit for high speed LVDS predrive
A circuit that provides a stable predrive to a BiCMOS LVDS output which compensates for supply voltage variations while maintaining a suitably fast signal path....
Current sense amplifier and method
A current sense amplifier (10) for measuring current flowing through a sense resistor (12) coupled between first (11) and second (13) terminals, respectively, of...
CMOS photodiode having reduced dark current and improved light sensitivity
A light-sensing diode having improved efficiency due to an extended junction geometry that provides more than one level of interaction with the light input.
Aluminum hardmask for dielectric etch
An aluminum hardmask (106, 214) is used for etching a dielectric layer (102, 210). A fluorine-based etch is used that does not etch the aluminum hardmask (106,...
Silicided undoped polysilicon for capacitor bottom plate
A capacitor (110) having a bottom plate (104) that includes undoped polysilicon (106) which has been silicided (108). An advantage of the invention is providing...
Method of forming a metal oxide semiconductor transistor with self-aligned
A transistor (50) comprising a gate conductor (68) and a gate insulator (66) separating the gate conductor from a semiconductor material (64) having a first...
Optical engine for front or rear screen SLM display systems
An optical engine (15) for an SLM-type display system, which may be either a front or rear projection system (10, 20). The optical engine (15) provides for a...
Nickel plating process having controlled hydrogen concentration
A flexible plating method by continuously controlling the hydrogen concentration of the plating bath by adding controlled amounts of hydrogen gas. The control of...
System and method for pruning a bridging diagnostic list
A system for generating a pruned diagnostic list of potential bridging faults in a circuit includes a pattern generator operable to generate test patterns for...
Method and architecture for controlling asymmetry of an LMS adaptation
algorithm that controls FIR filter...
A circuit (48) and method, which can be used in a mass data storage device, controls adaptation asymmetry of coefficients of an FIR filter (20) using an...
Micromirror optical switch
An optical switch using an array of mirrors (608) to selectively reflect light from an input fiber (610) to either of a first output fiber (612) or a second...
DAC architecture for analog echo cancellation
Echo cancellation in data communication between modems utilizes analog echo cancellation to lessen reduction of usable dynamic range of the received signal at...
Processor-based method for the acquisition and despreading of
A digital signal processing architecture is disclosed which is operable to receive a spread-spectrum/CDMA signal and perform the despreading operation thereon....
Method and device for providing a multiple phase power on reset
A method and apparatus is provided for performing an intelligent power-on-reset, and enabling the verification of a current voltage level with a reconfigurable...
Charge pump with controlled charge current
A charge pump circuit is configured for suitably controlling the charging current in the charge pump capacitors. The charge pump circuit comprises an input...
System and method for determining the position of a device
A position sensor includes a stationary platform and a moveable platform. The position sensor further includes at least one beam coupling the moveable platform...
To suppress undesired scattered light and leaking light so as to improve the optical function and reliability. In this DMD, as the address circuit of one cell,...
Mismatch-independent reset sensing for CMOS area array sensors
Two methods for suppressing the fixed pattern noise effects of a pixel reset switch by ensuring that the reset NMOS device operates in its linear region. The...
Resistor string DAC with current source LSBs
A method and apparatus for converting an N-bit digital word to an analog voltage signal. A first circuit converts the MSBs of the N-bit word and a second circuit...
High output swing comparator stage
A circuit and method is provided that provides an amplification stage to a comparator device that matches transistor transconductances to provide adequate...
Low-current compliance stack using nondeterministically biased Zener
Systems and methods are provided for limiting voltage to low-voltage devices employing a high-voltage supply. The systems and methods employ voltage limiting...
Differential pair with high output signal crossover
A buffer circuit includes a differential pair output switch having an additional NPN device and resistor operational to increase the common mode output voltage...
Reduced cost, high speed integrated circuit test arrangement
An integrated circuit device test arrangement includes a plurality of microcomputers. Each of the microcomputers is interconnected directly through a separate...
Method and system for isolated coupling
A method for isolatively coupling an input signal to an output signal, where the input signal is a first voltage differential, comprises three steps. Step one...
Compare path bandwith control for high performance automatic test systems
The compare path bandwidth control for high performance automatic test systems provides a standard dual comparator mode with single ended transmission lines for...
MOS type reference voltage generator having improved startup capabilities
A reference voltage generator having high-speed starting at a low power source voltage and with high stability and high precision, without substantially...
Switched power supply with voltage regulator having PWM with hysteretic
loop controller and method for...
A switched power supply (40) has a pulse width modulator to adjust a pulse width that controls the output voltage (104). The width modulator includes a...