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Patent # Description
US-6,621,586 Accurately scheduling rendering of bands in a printer
A printer controller which renders the bands in a plane of a page to measure the resources required to render each band of the plane. The measured parameters are...
US-6,621,529 Common color wheel speed system
A display system 100 in which light from source (102) is focused onto a spinning color wheel (104). The spinning color wheel (104) creates of beam of light that...
US-6,621,441 Attenuating undesired frequencies while sampling a communication signal
An analog signal (V.sub.IN) is converted into a digital signal (24) by sampling the analog signal at a plurality of points in time to produce a sampled signal...
US-6,621,346 Impedance matching for programmable gain amplifiers
Digital subscriber modems (8, 15) for use in Asynchronous Digital Subscriber Line (ADSL) communications are disclosed. The central office modem (8) includes a...
US-6,621,308 Supply voltage compensation circuit for high speed LVDS predrive
A circuit that provides a stable predrive to a BiCMOS LVDS output which compensates for supply voltage variations while maintaining a suitably fast signal path....
US-6,621,259 Current sense amplifier and method
A current sense amplifier (10) for measuring current flowing through a sense resistor (12) coupled between first (11) and second (13) terminals, respectively, of...
US-6,621,064 CMOS photodiode having reduced dark current and improved light sensitivity and responsivity
A light-sensing diode having improved efficiency due to an extended junction geometry that provides more than one level of interaction with the light input.
US-6,620,727 Aluminum hardmask for dielectric etch
An aluminum hardmask (106, 214) is used for etching a dielectric layer (102, 210). A fluorine-based etch is used that does not etch the aluminum hardmask (106,...
US-6,620,700 Silicided undoped polysilicon for capacitor bottom plate
A capacitor (110) having a bottom plate (104) that includes undoped polysilicon (106) which has been silicided (108). An advantage of the invention is providing...
US-6,620,692 Method of forming a metal oxide semiconductor transistor with self-aligned channel implant
A transistor (50) comprising a gate conductor (68) and a gate insulator (66) separating the gate conductor from a semiconductor material (64) having a first...
US-6,619,804 Optical engine for front or rear screen SLM display systems
An optical engine (15) for an SLM-type display system, which may be either a front or rear projection system (10, 20). The optical engine (15) provides for a...
US-6,619,538 Nickel plating process having controlled hydrogen concentration
A flexible plating method by continuously controlling the hydrogen concentration of the plating bath by adding controlled amounts of hydrogen gas. The control of...
US-6,618,830 System and method for pruning a bridging diagnostic list
A system for generating a pruned diagnostic list of potential bridging faults in a circuit includes a pattern generator operable to generate test patterns for...
US-6,618,740 Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter...
A circuit (48) and method, which can be used in a mass data storage device, controls adaptation asymmetry of coefficients of an FIR filter (20) using an...
US-6,618,520 Micromirror optical switch
An optical switch using an array of mirrors (608) to selectively reflect light from an input fiber (610) to either of a first output fiber (612) or a second...
US-6,618,480 DAC architecture for analog echo cancellation
Echo cancellation in data communication between modems utilizes analog echo cancellation to lessen reduction of usable dynamic range of the received signal at...
US-6,618,431 Processor-based method for the acquisition and despreading of spread-spectrum/CDMA signals
A digital signal processing architecture is disclosed which is operable to receive a spread-spectrum/CDMA signal and perform the despreading operation thereon....
US-6,618,312 Method and device for providing a multiple phase power on reset
A method and apparatus is provided for performing an intelligent power-on-reset, and enabling the verification of a current voltage level with a reconfigurable...
US-6,618,296 Charge pump with controlled charge current
A charge pump circuit is configured for suitably controlling the charging current in the charge pump capacitors. The charge pump circuit comprises an input...
US-6,618,217 System and method for determining the position of a device
A position sensor includes a stationary platform and a moveable platform. The position sensor further includes at least one beam coupling the moveable platform...
US-6,618,186 Micro-electromechanical system
To suppress undesired scattered light and leaking light so as to improve the optical function and reliability. In this DMD, as the address circuit of one cell,...
US-6,618,083 Mismatch-independent reset sensing for CMOS area array sensors
Two methods for suppressing the fixed pattern noise effects of a pixel reset switch by ensuring that the reset NMOS device operates in its linear region. The...
US-6,617,989 Resistor string DAC with current source LSBs
A method and apparatus for converting an N-bit digital word to an analog voltage signal. A first circuit converts the MSBs of the N-bit word and a second circuit...
US-6,617,921 High output swing comparator stage
A circuit and method is provided that provides an amplification stage to a comparator device that matches transistor transconductances to provide adequate...
US-6,617,906 Low-current compliance stack using nondeterministically biased Zener strings
Systems and methods are provided for limiting voltage to low-voltage devices employing a high-voltage supply. The systems and methods employ voltage limiting...
US-6,617,886 Differential pair with high output signal crossover
A buffer circuit includes a differential pair output switch having an additional NPN device and resistor operational to increase the common mode output voltage...
US-6,617,872 Reduced cost, high speed integrated circuit test arrangement
An integrated circuit device test arrangement includes a plurality of microcomputers. Each of the microcomputers is interconnected directly through a separate...
US-6,617,846 Method and system for isolated coupling
A method for isolatively coupling an input signal to an output signal, where the input signal is a first voltage differential, comprises three steps. Step one...
US-6,617,844 Compare path bandwith control for high performance automatic test systems
The compare path bandwidth control for high performance automatic test systems provides a standard dual comparator mode with single ended transmission lines for...
US-6,617,835 MOS type reference voltage generator having improved startup capabilities
A reference voltage generator having high-speed starting at a low power source voltage and with high stability and high precision, without substantially...
US-6,617,834 Switched power supply with voltage regulator having PWM with hysteretic loop controller and method for...
A switched power supply (40) has a pulse width modulator to adjust a pulse width that controls the output voltage (104). The width modulator includes a...
US-6,617,833 Self-initialized soft start for Miller compensated regulators
A Miller compensated voltage regulator, adapted to be supplied with power from a voltage supply, and having an input port and an output port. The voltage...
US-6,617,832 Low ripple scalable DC-to-DC converter circuit
A circuit for boosting an input voltage (V.sub.IN) to provide a low ripple output voltage (V.sub.OUT) regulates flow of current between a source of the input...
US-6,617,828 Circuit assembly for doubling the voltage of a battery
A circuit assembly for doubling the voltage of a battery includes a charge pump (12) fed by the battery voltage and controlled by a clock generator (10). The...
US-6,617,758 Integrated charge and voltage mode drive circuit for piezo actuators used in mass data storage devices, or the like
A driver (40) for supplying drive signals to a piezo element (48) of a milli-actuator device (21) in a mass data storage device (10) in a charge mode of...
US-6,617,567 Analog pre-processor with improved input common mode range
An analog circuit 20 includes an amplifier 30 with a positive input node, a negative input node, a positive output node and a negative output node. A first...
US-6,617,231 Method for forming a metal extrusion free via
A process whereby elimination of metal extrusion through the via-barrier layer into the base of etched via holes is accomplished by controlling the process...
US-6,617,217 Reduction in well implant channeling and resulting latchup characteristics in shallow trench isolation by...
Retrograde wells are formed by implanting through nitride films (40). Nitride films (40) are formed after STI (20) formation. By selectively masking a portion of...
US-6,617,211 Method for forming a memory integrated circuit
A process for fabricating a crown-cell capacitor in a memory integrated circuit. The process includes the step of forming a transistor having a contact region...
US-6,617,208 High capacitance damascene capacitors
The invention describes a high capacitance damascene capacitor. A etch-stop/capacitor dielectric layer 60 is sandwiched between two conductive plates 40 and 75...
US-6,617,178 Test system for ferroelectric materials and noble metal electrodes in semiconductor capacitors
A method is provided for ferroelectric layer testing. An adhesion layer is deposited over a semiconductor substrate to be of a phase pure material lacking a...
US-6,616,967 Method to achieve continuous hydrogen saturation in sparingly used electroless nickel plating process
An improved wire bonding process for copper-metallized integrated circuits is provided by a nickel layer that acts as a barrier against up-diffusing copper. In...
US-6,615,391 Current controlled multi-state parallel test for semiconductor device
A semiconductor memory device (300) having a parallel test circuit is disclosed. A test data path (308) receives parallel I/O line (I/O0-I/O7) values, and...
US-6,614,847 Content-based video compression
A video compression method and system including object-oriented compression plus error correction using decoder feedback.
US-6,614,703 Method and system for configuring integrated systems on a chip
A method for configuring an integrated circuit chip having a non-volatile memory having a plurality of registers and a volatile memory includes, the method...
US-6,614,576 Surface micro-planarization for enhanced optical efficiency and pixel performance in SLM devices
A method for enhancing the optical performance of a reflective spatial light modulator by micro-planarizing surfaces within the SLM, such as the reflective...
US-6,614,466 Telescopic reconstruction of facial features from a speech pattern
To reduce the needed bandwidth of video communication system, a portion of the video image that differs from a preceding frame of the video image is predicted...
US-6,614,379 Precise differential voltage interpolation analog-to-digital converter having double interpolation using...
A flash analog-to-digital converter having precise differential voltage interpolation without the use of silicide-blocked resistors. A reference conversion...
US-6,614,375 Sigma-delta analog-to-digital converter having improved reference multiplexer
A low power, sigma-delta analog-to-digital converter having an improved reference multiplexer that eliminates noise in a reference voltage signal. The...
US-6,614,310 Zero-overhead class G amplifier with threshold detection
The present invention provides an apparatus and method for operating driver amplifier (20) of a line driver circuit (10) from a lower set of power supply...
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