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Patent # Description
US-6,578,703 Magnetic latch transport loader
A leadframe loader having a magnetic latch of predefined strength connecting a drive arm mechanism and a pusher system is the preferred embodiment of a transport...
US-6,578,123 Relocatable overland peripheral paging
Apparatus for flexibly locating the data page on which the peripheral registers are located. External hardware contentions are eliminated because the peripheral...
US-6,577,997 System and method of noise-dependent classification
A noise-dependent classifier for a speech recognition system includes a recognizer (15) that provides scores and score differences of two closest in-vocabulary...
US-6,577,481 Cascoded NPN electrostatic discharge protection circuit
The electrostatic discharge protection circuit includes: at least two bipolar transistors Q1-Qn coupled in series; a top one Qn of the at least two bipolar...
US-6,577,173 Inductive load driving circuit
The objective of the invention is to provide an inductive load driving circuit that can prevent occurrence of surge voltage. Output transistor 5 and auxiliary...
US-6,577,135 Battery pack with monitoring function utilizing association with a battery charging system
A battery detect circuit (32) is provided that is operable to dispose a sense resistor (50) in series with the battery to determine whether the charge is being...
US-6,576,961 Substrate resistance ring
An embodiment of the invention is a doped region within the silicon substrate 20 of an integrated circuit where the silicon substrate 10 separates the doped...
US-6,576,959 Device and method of low voltage SCR protection for high voltage failsafe ESD applications
A semiconductor circuit for multi-voltage operation having built-in electrostatic discharge (ESD) protection is described, comprising a drain extended nMOS...
US-6,576,957 Etch-stopped SOI back-gate contact
The buried oxide region has a layer added which etches selectively with respect to oxide, allowing the contacts to a gate or to a back gate to be created without...
US-6,576,922 Ferroelectric capacitor plasma charging monitor
Plasma charging devices and methods are disclosed for detecting plasma charging during semiconductor wafer processing. Charging monitors are disclosed having...
US-6,576,546 Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for...
An embodiment of the instant invention is a method of forming a conductive barrier layer on a dielectric layer, the method comprising the steps of: providing the...
US-6,576,535 Carbon doped epitaxial layer for high speed CB-CMOS
A method for fabricating a high speed complementary bipolar/CMOS device is disclosed which enables the forming of a silicon epitaxial layer in a PNP transistor...
US-6,576,519 Method and apparatus for fabricating self-aligned contacts in an integrated circuit
An integrated circuit includes a substrate with a gate section projecting upwardly between spaced source and drain regions. Side walls project upwardly beyond...
US-6,576,482 One step deposition process for the top electrode and hardmask in a ferroelectric memory cell
One aspect of the invention relates to a one-step process for forming a transition metal aluminum oxynitride layer over a transition metal aluminum nitride...
US-6,574,760 Testing method and apparatus assuring semiconductor device quality and reliability
An automatic test apparatus for assuring quality and reliability of semiconductor integrated circuit devices comprising a computerized tester controller...
US-6,574,724 Microprocessor with non-aligned scaled and unscaled addressing
A data processing system having a central processing (CPU) unit and a method of operation is provided. The CPU has an instruction set architecture that is...
US-6,574,683 External direct memory access processor implementation that includes a plurality of priority levels stored in...
An external direct memory access unit includes an event recognizer storing plural event types in an event register, a priority encoder selecting for service one...
US-6,574,575 Method for rapid calibration of beverage dispensing machine
A rapid sensor calibration technique applied prior to each Sensor 9 measuring a beverage in which water (zero Brix), at same temperature as beverage, is drawn...
US-6,574,213 Wireless base station systems for packet communications
A process (111,101) of sending packets of real-time information at a sender (311) includes steps of initially generating at the sender the packets of real-time...
US-6,574,135 Shared sense amplifier for ferro-electric memory cell
A ferro-electric memory device system and method is described for accessing and sensing memory cells of an FeRAM memory array with an open bit line architecture....
US-6,573,951 Non-terminating pulse width modulation for displays
A method for using pulse-width modulation in displays. A series of PWM sequences is established. Each subsequent sequence clears the previous sequence before it,...
US-6,573,694 Stable low dropout, low impedance driver for linear regulators
A voltage regulator circuit that provides the current necessary to drive an output driver during transients and maintain low output impedance, while having a...
US-6,573,549 Dynamic threshold voltage 6T SRAM cell
An embodiment of the instant invention is a memory device comprising: a memory cell including: a first transistor (108 of FIG. 1) having a control electrode, a...
US-6,573,194 Method of growing surface aluminum nitride on aluminum films with low energy barrier
An integrated circuit having an interconnect layer (104) that comprises a first barrier layer (106) and an aluminum-based layer (108) overlying the first barrier...
US-6,573,167 Using a carbon film as an etch hardmask for hard-to-etch materials
A carbon hardmask (122) for etching hard-to-etch materials (110/112/114) such as Pt, Ir, Ru, IrO.sub.2, RuO.sub.2, BST, PZT, SBT, FeNi, and FeNiCo and other used...
US-6,573,165 Method of providing polysilicon spacer for implantation
An improved method of implanting source and drain for CMOS devices is provided by a hard mask and dry etching to form polysilicon gates 20 percent longer than...
US-6,572,461 Method for producing wafer notches with rounded corners and a tool therefor
A semiconductor wafer for use in the fabrication of semiconductor devices which includes a circular wafer (13) of semiconductor material having a perimeter and a...
US-6,571,363 Single event upset tolerant microprocessor architecture
A single-event-upset, fault-tolerant data processor architecture enables error detection and correction according to algorithms given. A hardware intensive...
US-6,571,268 Multiplier accumulator circuits
A multiply-accumulate (MAC) unit, having a first binary operand X, a second binary operand Y, a third binary operand, Booth recode logic for generating a...
US-6,571,106 Method and apparatus for glitchless signal generation
A digital system is provided with an interface circuit for interconnecting two modules in different clock domains. The interface circuit can selectively respond...
US-6,570,608 System and method for detecting interactions of people and vehicles
A video surveillance system that implements object detection and event recognition employing smart monitoring algorithms to analyze a video stream and recognize...
US-6,570,561 Portable computer with low voltage differential signaling adapter
A computer (10) uses a TTL-to-LVDS converter board (34) coupled to a graphics controller (32). The graphics controller (32) outputs video information using TTL...
US-6,570,516 Multi-output DAC and method using single DAC and multiple s/h circuits
A single-DAC, multiple sample/hold conversion circuit includes a digital-to-analog converter and a plurality of sample/hold circuits each including an output...
US-6,570,435 Integrated circuit with current limited charge pump and method
One aspect of the invention is an integrated circuit (613)comprising a current source (611) coupled to voltage source (610) and an output load (635). The...
US-6,570,415 Reduced voltage swing digital differential driver
A predriver for a differential pair having a reduce voltage swing is disclosed having fast switching speed and low power consumption. The predriver includes a...
US-6,570,410 Feed-forward approach for timing skew in interleaved and double-sampled circuits
The present invention relates to a clock generator circuit which comprises a clock generator subcircuit which is operable to generate two clock signals having...
US-6,570,398 Socket apparatus particularly adapted for LGA type semiconductor devices
A socket (10) has a cover (14) pivotably mounted to a base (12). The base is formed with a seat (12a) for mounting a semiconductor device on a contact mounting...
US-6,570,242 Bipolar transistor with high breakdown voltage collector
A transistor that includes a doped buried region 320 within a semiconductor body 300, 340. The doped buried region includes a portion having a first thickness...
US-6,570,181 Semiconductor metal interconnect reliability test structure
A semiconductor reliability test structure (10) is formed on a face of a semiconductor substrate. The test structure (10) includes a chain of a plurality of long...
US-6,569,741 Hydrogen anneal before gate oxidation
A process for preparing a silicon surface for gate dielectric formation. The silicon is annealed in a hydrogen ambient prior to gate dielectric formation. The...
US-6,569,734 Method for two-sided fabrication of a memory array
A method for fabricating a memory array includes fabricating a first portion (110, 310, 510) of a memory array on a first side (14, 214, 414) of a substrate (12,...
US-6,569,733 Gate device with raised channel and method
A method of forming a gate device which includes an elongated projection on a substrate. The elongated projection protrudes from a surrounding area of the...
US-RE38,126 Large die photolithography
An improved reticle (20) and method of using it to expose layers of wafers for large integrated circuits (10). The integrated circuit (10) is designed so that...
US-6,567,933 Emulation suspension mode with stop mode extension
Emulation and debug circuitry is provided that can be incorporated into a variety of digital systems. A stop mode of operation is provided in which an associated...
US-6,567,910 Digital signal processing unit with emulation circuitry and debug interrupt enable register indicating...
An improved microprocessor is provided having a program control unit for storing and then decoding instructions, a program address generation unit for generating...
US-6,567,906 Secure computing device including virtual memory table look-aside buffer with non-relocatable page of memory
A diagnostic program can check the security of a program. The program is stored at predetermined non-relocatable physical address in memory. The diagnostic...
US-6,567,895 Loop cache memory and cache controller for pipelined microprocessors
A microprocessor and method for operating this microprocessor are disclosed. The microprocessor contains multiple execution units that receive instructions from...
US-6,567,887 Buffering of partition tables, file system directory structures and individual file cluster chains in a mass...
A computer system for storing data includes a host computer having system RAM associated with the computer system, and a file directory peripheral bus connected...
US-6,567,559 Hybrid image compression with compression ratio control
A block based hybrid compression method with compression ratio control. The input page is classified as SOLID, TEXT, SATURATED TEXT or IMAGE type, and the...
US-6,567,489 Method and circuitry for acquiring a signal in a read channel
A method for acquiring a signal in a read channel (18), the read channel (18) having an equalizer (48), includes performing an automatic gain control sequence;...
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