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Patent # Description
US-6,548,366 Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a...
US-6,548,362 Method of forming MOSFET with buried contact and air-gap gate structure
A method of forming MOSFET with buried contacts and air-gap gate structure is disclosed. The method comprises following steps firstly, a gate is formed of pad...
US-6,548,359 Asymmetrical devices for short gate length performance with disposable sidewall
An asymmetrical channel implant from source to drain improves short channel characteristics. The implant provides a relatively high V.sub.T net dopant adjacent...
US-6,548,343 Method of fabricating a ferroelectric memory cell
An embodiment of the instant invention is a method of fabricating a ferroelectric capacitor which is situated over a structure, the method comprising the steps...
US-6,547,580 Socket apparatus particularly adapted for land grid array type semiconductor devices
A socket (10) has a cover (14) pivotably mounted to a base (12). The base is formed with a seat (12a) for mounting a semiconductor device on a contact mounting...
US-6,546,518 Detector error suppression circuit and method
Device and method of EEPR4 post processing in an EPR4 detection system to remove single bit errors by applying 1+D to the samples and comparing this to...
US-6,546,510 Burn-in mode detect circuit for semiconductor device
A synchronous dynamic random access memory (SDRAM) is disclosed that includes an operational mode in which the functionality of the SDRAM can be tested under...
US-6,546,505 Processor condition sensing circuits, systems and methods
A data processing device including a semiconductor chip, an electronic processor on-chip and an on-chip condition sensor connected to the electronic processor...
US-6,546,477 Memory management in embedded systems with dynamic object instantiation
A system and method is provided for enabling the reuse of algorithms in multiple application frameworks with no alterations required of the algorithm once it is...
US-6,546,407 Reduced computation digital filter
A method for providing a multi-stage filter on an input stream of digital data. In the method, the input stream of digital data is operated on with a first...
US-6,545,903 Self-aligned resistive plugs for forming memory cell with phase change material
Memory devices are disclosed for storage and retrieval of information, wherein resistive plugs are provided above and below a phase change material to form a...
US-6,545,814 Optical architectures for combining multiple lamps in light valve projectors
An integrating rod (100) for combining light beams from two or more sources. A first light beam (104) enters the integrating rod 100 through a first entrance...
US-6,545,740 Method and system for reducing motion artifacts
A motion artifact reduction system (10) includes a series of cinematic feature image frames (IF.sub.m, IF.sub.m+1)captured at an incoming frame rate. The motion...
US-6,545,623 High speed analog-domain shuffler for analog to digital converter
A method for use in a system including an analog-to-digital converter subsystem (ADC) and a digital-to-analog converter subsystem (DAC), wherein the ADC samples...
US-6,545,549 Remotely controllable phase locked loop clock circuit
This invention is a remotely controllable clock circuit embodied in a single integrated circuit device. The clock circuit includes at least one externally...
US-6,545,547 Method for tuning a VCO using a phase lock loop
A very fast lock integer N PLL with hybrid digital coarse VCO tuning and VCO temperature drift compensation provides for a fully digital tuning scheme without...
US-6,545,538 Rail-to-rail class AB output stage for operational amplifier with wide supply range
A rail-to-rail class AB output stage includes a P-channel pull-up transistor (4) having a source coupled to a first supply rail voltage (V.sup.+), a gate coupled...
US-6,545,533 Class D audio speaker amplifier circuit with pseudo noise modulation
The present invention relates to a Class D amplifier and method dynamically modulate the transition zone of a square wave as a function of the input signal. An...
US-6,545,511 Adjustable temperature-compensated threshold circuit with trip-points exceeding the given supplies
The temperature compensated threshold circuit includes: a positive trip point circuit 60 for providing a positive trip point when an input voltage PSM is higher...
US-6,545,507 Fast locking CDR (clock and data recovery circuit) with high jitter tolerance and elimination of effects caused...
A system 400 and method 1200 is disclosed for a fast locking (e.g., within 1.5 sync bit times or the first data transition) clock and data recovery (CDR) system...
US-6,545,344 Semiconductor leadframes plated with lead-free solder and minimum palladium
A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering said base metal; a plated layer of...
US-6,545,342 Pre-finished leadframe for semiconductor devices and method of fabrication
A leadframe for use with integrated circuit chips comprising a base metal, usually copper or a copper alloy, having a modified surface adapted to provide...
US-6,544,906 Annealing of high-k dielectric materials
A method for annealing a high dielectric constant (high-k) gate dielectric layer includes placing a wafer including one or more partially formed transistors in...
US-6,544,886 Process for isolating an exposed conducting surface
A method of isolating an exposed conductive surface. An aluminum layer (130) is selectively formed over the exposed conductive (106) surface (e.g., Cu) but not...
US-6,544,875 Chemical vapor deposition of silicate high dielectric constant materials
A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the...
US-6,544,816 Method of encapsulating thin semiconductor chip-scale packages
An apparatus for the fabrication of a semiconductor device comprising: a mold having top and bottom halves, each with cavities for holding semiconductor chips...
US-6,543,048 Debugger with real-time data exchange
A collection of program instructions capable of executing on a host processor suitable for reading from a memory location of a target processor and suitable for...
US-6,542,621 Method of dealing with occlusion when tracking multiple objects and people in video sequences
This invention employs probabilistic templates, or p-templates, which probabilistically encode the rough position and extent of the tracked object's image. The...
US-6,542,547 Efficient heuristic based motion estimation method for video compression
A heuristic based motion estimation system and method for video compression may include: defining the target block 70; defining a simplified signature block 72;...
US-6,542,282 Post metal etch clean process using soft mask
A method of patterning a metal layer that cleans the residue from a metal etch process without removing a photoresist etch mask. The method is particularly...
US-6,542,221 Integrated circuit system with automated best focus determination based on change in alignment due to...
A method (40) of determining a best focus for an integrated circuit stepper (10). The method repeats various steps for a plurality of different focus levels. The...
US-6,542,032 Extremely linear, high speed, class AB rail to rail bipolar amplifier output stage with high output drive
The amplifier output stage circuit includes: a translinear loop 30 having first and second input nodes Vin+ and Vin-; a first transistor Q7 coupled between a...
US-6,542,017 Feed-forward approach for timing skew in interleaved and double-sampled circuits
The present invention relates to a clock generator circuit which comprises a clock generator subcircuit which is operable to generate two clock signals having...
US-6,542,015 Duty cycle correction circuit and apparatus and method employing same
A method and apparatus for correcting the duty cycle of an uncorrected differential clock signal having a sinusoidal characteristic and outputting a corrected...
US-6,542,009 Signal hold circuit
A peak hold circuit that can operate to follow changes in peak value even if the changes are abrupt. The peak hold circuit (1) of the present invention has...
US-6,541,952 On-line cancellation of sampling mismatch in interleaved sample-and-hold circuits
The present invention relates to a high speed sample and hold circuit having a plurality of sample and hold subcircuits coupled in parallel between an input and...
US-6,541,946 Low dropout voltage regulator with improved power supply rejection ratio
The low dropout voltage regulator (LDO) circuit with improved power supply rejection ratio includes: a first amplifier 20 having a first input coupled to a...
US-6,541,832 Plastic package for micromechanical devices
Low-cost plastic cavity-up land-grid array packages and ball-grid array packages are provided, suitable for wire-bonded chips having micromechanical components....
US-6,541,352 Semiconductor die with contoured bottom surface and method for making same
Methods are disclosed for manufacturing semiconductor device dies and for removing material from the bottom side of the wafer dies, wherein a contoured surface...
US-6,539,526 Method and apparatus for determining capacitances for a device within an integrated circuit
An integrated circuit (10) includes a device such as a transistor. A layout (90) of the device is prepared, which in the case of the transistor includes a ground...
US-6,539,497 IC with selectively applied functional and test clocks
A data processing device formed in a single semiconductor chip. The data processing device includes an electronic processor, and on-chip peripheral circuitry...
US-6,539,467 Microprocessor with non-aligned memory access
A data processing system (1300) is provided with a digital signal processor (DSP) (1301) that has an instruction set architecture (ISA) that is optimized for...
US-6,539,448 Priority first come first serve interrupt controller
A microprocessor interrupt controller capable of receiving a plurality of interrupt requests organized in a plurality of groups, at least one of the groups...
US-6,539,061 Efficient method for decompressing difference coded signals
A data processing system for the compression and decompression of data using Differential Pulse Code Modulation, and optimized for fast execution using a...
US-6,538,833 System and method for improving frequency response in a magneto-resistive preamplifier
A preamplifier system includes an amplifier stage having at least one feedback network. The feedback network has a feedback resistance that may be adjusted to...
US-6,538,832 Single ended preamplifier having multiple first stage banks for improved noise characteristics
In hard disk drives (HDD), a magnetic read head moves over a portion of the hard disk when reading data. A preamplifier, having an initial amplification stage of...
US-6,538,503 Instrumentation amplifier and method for obtaining high common mode rejection
An instrumentation amplifier is provided which can provide high common mode rejection without the use of precision resistors. The instrumentation amplifier can...
US-6,538,500 Power efficient line driver with 4X supply voltage swing and active termination
A differential line driver with 4X supply voltage swing with a 1:1 transformer, which enhances the loop length for applications such as digital subscriber line...
US-6,538,478 Noise immune peak detector
A peak detector circuit for detecting a peak output signal including an input circuit for inputting an input signal, a comparator for comparing the input signal...
US-6,538,477 Input buffer for analog-to-digital convertor
An input buffer circuit for use with an analog-to-digital converter is provided. The input buffer circuit comprises a first amplifier configured with a second...
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