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Patent # Description
US-6,518,898 System and method of background offset cancellation for flash ADCs
A background offset cancellation technique based on interleaved auto-zero (IAZ) architecture for flash ADCs, moves the reference tap values up and down to...
US-6,518,838 Circuit for compensating noise and errors from an output state of a digital amplifier
In a digital amplifier of the PCM-UPWM type there is no negative feedback stage, which means that noise caused by the switching output stage of such an amplifier...
US-6,518,800 System and method for reducing timing mismatch in sample and hold circuits using the clock
The present invention relates to a high speed sample and hold circuit which comprises a plurality of sample and hold subcircuits coupled in parallel between an...
US-6,518,663 Constant impedance routing for high performance integrated circuit packaging
An electrical connection web, operable at high frequency and configured on a dielectric substrate, comprising a plurality of generally parallel signal lines...
US-6,518,647 Plated aluminum leadframes for semiconductor devices, including two nickel layers, and method of fabrication
A leadframe for use with integrated circuit chips, comprising a leadframe base made of aluminum or aluminum alloy having a surface layer of zinc; a first layer...
US-6,518,525 Gear recognition switch system
A recognition switch assembly (10) has a movable contact assembly (24) mounted on an actuator (22) mounted for sliding movement along a longitudinal direction...
US-6,518,111 Method for manufacturing and structure of semiconductor device with dielectric diffusion source and CMOS...
A method for manufacturing a semiconductor device includes forming a collector region of a semiconductor substrate and forming an isolation structure adjacent at...
US-6,518,089 Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly
A robust, low inductance electronic package for small area semiconductor chips is provided which includes a flexible polymer film having electronic circuitry on...
US-6,516,408 Various length software breakpoint in a delay slot
A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy...
US-6,516,025 High-speed upstream modem communication
A client-side modem (20) having capability of improved data rate upstream communications via a codec (2) in a central office (CO) to an Internet service provider...
US-6,515,880 Soft-start control for DC/DC switching regulators
Startup operation of a DC/DC switching regulator is controlled by providing a first signal (MAXDC) whose waveform has a duty cycle that varies over time,...
US-6,515,605 Base station having high speed, high resolution, digital-to-analog converter with off-line sigma delta...
A wireless base station having an improved DAC operable at higher speed than heretofore achievable which exploits the sigma-delta principle in a different way....
US-6,515,524 Power-up control circuit
A power-up control circuit architecture that utilizes zero current under normal operation. The power-up control circuit will sense a common supply voltage, Vcc,...
US-6,514,881 Hybrid porous low-K dielectrics for integrated circuits
An organically modified dielectric network structure (208) and solid halide-containing material (206) are co-deposited using a chemical vapor deposition process....
US-6,514,845 Solder ball contact and method
The invention is a method for attaching an electronic component (40) having Ball Grid Array contacts (36) to a circuit board contact array (31) to prevent the...
US-6,514,810 Buried channel PMOS transistor in dual gate CMOS with reduced masking steps
A buried channel PMOS transistor for analog applications is integrated into a digital CMOS process. A third well region (105) is formed by implanting a region in...
US-6,513,085 Link/transaction layer controller with integral microcontroller emulation
An IEEE 1394 serial bus (58) is interfaced utilizing a physical layer (54) to extract the data and a link/transaction layer controller (200) to interface the...
US-6,512,280 Integrated CMOS structure for gate-controlled buried photodiode
A light-sensing diode fabricated in a semiconductor substrate having a surface protected by an insulator, comprising a first region of one conductivity type in...
US-6,512,272 Increased gate to body coupling and application to dram and dynamic circuits
An FET and DRAM using a plurality of such FETs wherein each transistor has a body region of a first conductivity type including a relatively high V.sub.T region...
US-6,512,257 System with meshed power and signal buses on cell array
A method and apparatus for providing a meshed power and signal bus system on an array type integrated circuit that minimizes the size of the circuit. In a...
US-6,511,777 Method for manufacturing a phase shift photomask
A method for fabricating a phase shift photomask (10) includes providing a photomask (12) having a substantially opaque layer (16) on a surface (14) of a...
US-6,510,557 Apparatus for the integration of television signals and information from an information service provider
A Java television receiver (10) includes a Java television platform (12) that has a bidirectional Internet connection (14) capable of sending Internet data to...
US-6,510,507 Page address look-up range ram
A Page Address Look-up Range RAM is disclosed which allows for individual comparisons to be made on a number of consecutive addresses. The upper bits of the bus...
US-6,510,394 Charge pump with switched capacitor feedback
A system and method is provided for monitoring a voltage level of a charge pump device. The system and method employ a first charging device that is coupled to...
US-6,510,240 Automatic detection of die absence on the wire bonding machine
An apparatus detects the presence or absence of a semiconductor device. The apparatus includes a wire bonding machine to form a connection with the semiconductor...
US-6,510,012 High-speed CMOS buffer circuit with programmable quadratic transfer function
An asymmetry correction circuit for correcting an asymmetry signal includes a first transconductance circuit for transforming the asymmetry signal to a bias...
US-6,509,857 Digital-to-analog converting method and digital-to-analog converter
A digital-to-analog (D/A) converter with a required accuracy can be implemented in a smaller chip area and at a lower cost. The D/A converter comprises a decoder...
US-6,509,852 Apparatus and method for gain calibration technique for analog-to-digital converter
A method and apparatus for performing gain calibration of an analog to digital converter is provided. During a calibration mode, an input sampling circuit...
US-6,509,795 CMOS input stage with wide common-mode range
A different amplifier with rail-to-rail input including a single differential transistor pair utilizes a feedback circuit to control the threshold voltage of the...
US-6,509,764 Low component circuit for reducing power dissipation capacitance
An improved pre-driver circuit 33, which uses only three additional components to bypass the back-gate current blocking diodes for increased circuit speed during...
US-6,509,727 Linear regulator enhancement technique
A linear regulator circuit to regulate an output voltage includes a first current path to conduct a first current, a feedback path to provide feedback to...
US-6,509,574 Optocouplers having integrated organic light-emitting diodes
An optocoupler structure comprising a semiconductor chip having an integrated circuit and an optically transparent, electrically insulating layer having first...
US-6,507,921 Trace fifo management
A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length. A trace FIFO (800) is provided for tracing...
US-6,507,233 Method and circuit for compensating VT induced drift in monolithic logarithmic amplifier
A temperature-compensated monolithic logarithmic amplifier includes a logarithmic amplifier cell (26) configured to produce a logarithmic voltage signal (V3)...
US-6,507,179 Low voltage bandgap circuit with improved power supply ripple rejection
Methods and apparatus are disclosed for reducing output ripple voltages in bandgap voltage reference circuits. Ripple rejection circuitry is connected to a...
US-6,507,082 Flip-chip assembly of protected micromechanical devices
A low-cost ceramic package, in land-grid array or ball-grid array configuration, for micromechanical components is fabricated by coating the whole integrated...
US-6,507,054 Solid-state imaging device
A solid-state imaging device having contacts for a charge sweeping component or the like, with which increases in dark current can be suppressed while increases...
US-6,506,616 Photolithographic method for fabricating organic light-emitting diodes
A method of photolithographically patterning an organic semiconductor device, comprising the steps of protecting the organic layer of the device by depositing a...
US-6,504,948 Apparatus and method for automatically detecting defects on silicon dies on silicon wafers
An apparatus and method for automatically detecting defects on silicon dies on silicon wafers comprising a silicon wafer acquisition system (30) and a computer...
US-6,504,685 Microelectricalmechanical device immobilization and sealing
A microelectromechanical (MEM) device with an expanded PTFE material over the gap between movable structures to provide electrical connection across the gap and...
US-6,504,662 Apparatus for measuring and characterizing thermal asperities in a mass data storage device
A method and apparatus for characterizing a magnetic disk (40) of the type that contains data to be read by a magneto-resistive type head (18) in proximity...
US-6,504,435 Feedback clamp circuit to prevent overcharge in compensation capacitor
The present invention provides a dual stage amplifier with a clamping circuit and a methodology, along with a clamping circuit for use with a dual stage...
US-6,504,419 High-speed closed loop switch and method for video and communications signals
A circuit for multiplexing a selected one of a plurality of input signals to an output conductor includes a plurality of diamond follower input buffers each...
US-6,504,238 Leadframe with elevated small mount pads
A semiconductor device comprising a lead frame that includes a large area mount pad having small elevated pads to which a semiconductor chip is attached. The...
US-6,503,846 Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a...
US-6,503,838 Integrated circuit isolation of functionally distinct RF circuits
A method of fabricating an integrated circuit having active components, conductors and isolation regions on a substrate is disclosed, including forming a portion...
US-6,503,647 Battery protection device and method of making same
A battery protection device (10) has a hollow casing body (11) formed by ultrasonic welding of a first casing member (12) and a second casing member (13) with...
US-6,502,152 Dual interrupt vector mapping
A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy...
US-6,501,607 Channel quality monitor (CQM) for digital peak detection (DPD)
The present invention relates to a method of providing error margin information for threshold errors associated with a digital peak detector. The method...
US-6,501,411 System and method for optimizing power in pipelined data converters
A pipelined data converter current biasing system employs a frequency-to-voltage converter (FVC) operational to convert a plurality of desired sampling...
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