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Patent # Description
US-6,526,430 Reconfigurable SIMD coprocessor architecture for sum of absolute differences and symmetric filtering (scalable...
The proposed architecture is integrated onto a Digital Signal Processor (DSP) as a coprocessor to assist in the computation of sum of absolute differences,...
US-6,526,144 Data protection system
A method of communicating from a transmitter to a receiver over a communication medium. For the transmitter, the method includes the step of formatting data into...
US-6,526,090 Demodulation element assignment for a receiver capable of simultaneously demodulating multiple spread spectrum...
A method (32) of operating a spread spectrum communications receiver (20). The method demodulates a current path group with a demodulator (28), wherein the...
US-6,525,594 Eliminating power-down popping in audio power amplifiers
The circuit includes: a transistor 22; and a switch 32 coupled to a backgate of the transistor 22 for switching between a power supply node and current-path node...
US-6,525,574 Gate bootstrapped CMOS sample-and-hold circuit
A sample and hold circuit to sample and hold a signal, includes a load capacitor to hold the signal, a switch to control the charging of said load capacitor, and...
US-6,525,521 Sample and hold phase detector having low spurious performance and method
A method for lowering the spurious output of a sample and hold phase detector includes the steps of charging a ramp node (502) to a first voltage level after a...
US-6,525,424 Semiconductor device and its manufacturing method
Improve the productivity and cost for the manufacturing of a semiconductor device referred to as a wafer level CSP. The manufacturing method for a semiconductor...
US-6,525,410 Integrated circuit wireless tagging
A semiconductor device comprising an integrated circuit and an information unit, said unit being electrically separate from said integrated circuit; an...
US-6,525,396 Selection of materials and dimensions for a micro-electromechanical switch for use in the RF regime
The present invention provides an apparatus and method of selecting a unique combination of materials and dimensions for fabrication of a micro-electromechanical...
US-6,524,930 Method for forming a bottom corner rounded STI
Methods are disclosed for the formation of isolation structures and trenches in semiconductor devices, in which lower corners of an isolation trench are rounded...
US-6,523,081 Architecture using dedicated endpoints and protocol for creating a multi-application interface and improving...
A USB function device (14) for coupling to a USB host (12). The USB function device (14) comprises circuitry (32) for providing a capability to the USB host,...
US-6,523,052 Method and architecture to facilitate achieving a fast EPR4 equalization start-up in a magnetic recording read...
A method and circuit (10) for achieving a fast EPR4 equalization start-up for an FIR filter (14) in a magnetic recording read channel is presented in which a...
US-6,522,985 Emulation devices, systems and methods utilizing state machines
An emulation device including a serial scan testability interface having at least first and second scan paths, and state machine circuitry connected and...
US-6,522,730 DSL communication system with improved bandwidth
A telecommunications system using DSL modems (36, 38) detects on-hook or off-hook states of a local loop telecommunications line (18). If the local loop (18) is...
US-6,522,494 Apparatus and method for writing servo patterns on a computer hard disk
A method for writing servo patterns on a hard disk drive disk in a hard disk drive assembly. The assembly includes a disk having at least one magnetic surface in...
US-6,522,492 Write to read switching time trim circuit
An offset circuit to correct an offset between differential signals includes a read circuit to read the differential signals, a circuit to measure the offset of...
US-6,522,489 Efficient analog-to-digital converter for digital systems
An analog-to-digital converter 16 includes first and second analog-to-digital converters 22 and 24 both of which receive an input signal. The first...
US-6,522,454 Hidden hinge digital micromirror device with improved manufacturing yield and improved contrast ratio
An improved DMD type spatial light modulator having an array of pixels (18). The pixels (18) are of the "hidden hinge" design, each pixel having a mirror (30)...
US-6,522,355 Digital nonuniformity correction for image sensors
A method of compensating for nonuniformities in an image sensor includes: providing an image sensing device 20; measuring test pixel signals from the image...
US-6,522,209 Oscillator averaging phase shift generator
Two oscillators, such as in two pulse width modulator circuits of DC to DC power converters, are maintained in synchronization and at a predetermined phase shift...
US-6,522,204 Phase-locked loop for ADSL frequency locking applications
A phase-locked loop (PLL), particularly useful for ADSL frequency locking applications, uses inexpensive external components in combination with versatile logic...
US-6,522,200 Process-insensitive, highly-linear constant transconductance circuit
A process-insensitive, highly-linear, constant transconductance circuit employs a CMOS multiplier in the signal path that is offset biased with a specific...
US-6,522,113 Synchronous coupled inductor switching regulator with improved output regulation
The present invention relates to circuits and method for providing regulated output voltages from an unregulated input voltage. A switching power supply and/or a...
US-6,522,110 Multiple output switching regulator
A voltage regulator is provided for taking an input voltage and providing a multiple of output voltages of differing voltage values. The voltage regulator...
US-6,521,975 Scribe street seals in semiconductor devices and method of fabrication
An integrated circuit wafer, covered by a protective overcoat, comprising an array of integrated circuit chips bordered by seal regions and separated by dicing...
US-6,521,946 Electrostatic discharge resistant extended drain metal oxide semiconductor transistor
A semiconductor device comprising a first transistor (40) and a second transistor (100), both formed in a semiconductor substrate (50). The first transistor...
US-6,521,479 Repackaging semiconductor IC devices for failure analysis
The present invention provides a system and method for preparing semiconductor integrated circuits ("ICs"), particularly ball grid arrays ("BGAs"), quad flat...
US-6,521,042 Semiconductor growth method
Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include...
US-6,519,729 Reduced power testing with equally divided scan paths
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to...
US-6,519,641 Calculator network in which a master calculator can restrict communication between client calculators in the...
A group of client calculators (18) communicates by determining whether a aster calculator (14) is a member of the group. If the master calculator (14) is...
US-6,518,902 PC card and WLAN system having high speed, high resolution, digital-to analog converter with off-line sigma...
A PC card and corresponding WLAN system having an improved DAC operable at higher speed than heretofore achievable which exploits the sigma-delta principle in a...
US-6,518,899 Method and apparatus for spectral shaping of non-linearity in data converters
An improved dynamic element matching technique for providing noise-shaping of non-linearity in data converters, such as a multi-bit digital-to-analog converter,...
US-6,518,898 System and method of background offset cancellation for flash ADCs
A background offset cancellation technique based on interleaved auto-zero (IAZ) architecture for flash ADCs, moves the reference tap values up and down to...
US-6,518,838 Circuit for compensating noise and errors from an output state of a digital amplifier
In a digital amplifier of the PCM-UPWM type there is no negative feedback stage, which means that noise caused by the switching output stage of such an amplifier...
US-6,518,800 System and method for reducing timing mismatch in sample and hold circuits using the clock
The present invention relates to a high speed sample and hold circuit which comprises a plurality of sample and hold subcircuits coupled in parallel between an...
US-6,518,663 Constant impedance routing for high performance integrated circuit packaging
An electrical connection web, operable at high frequency and configured on a dielectric substrate, comprising a plurality of generally parallel signal lines...
US-6,518,647 Plated aluminum leadframes for semiconductor devices, including two nickel layers, and method of fabrication
A leadframe for use with integrated circuit chips, comprising a leadframe base made of aluminum or aluminum alloy having a surface layer of zinc; a first layer...
US-6,518,525 Gear recognition switch system
A recognition switch assembly (10) has a movable contact assembly (24) mounted on an actuator (22) mounted for sliding movement along a longitudinal direction...
US-6,518,111 Method for manufacturing and structure of semiconductor device with dielectric diffusion source and CMOS...
A method for manufacturing a semiconductor device includes forming a collector region of a semiconductor substrate and forming an isolation structure adjacent at...
US-6,518,089 Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly
A robust, low inductance electronic package for small area semiconductor chips is provided which includes a flexible polymer film having electronic circuitry on...
US-6,516,408 Various length software breakpoint in a delay slot
A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy...
US-6,516,025 High-speed upstream modem communication
A client-side modem (20) having capability of improved data rate upstream communications via a codec (2) in a central office (CO) to an Internet service provider...
US-6,515,880 Soft-start control for DC/DC switching regulators
Startup operation of a DC/DC switching regulator is controlled by providing a first signal (MAXDC) whose waveform has a duty cycle that varies over time,...
US-6,515,605 Base station having high speed, high resolution, digital-to-analog converter with off-line sigma delta...
A wireless base station having an improved DAC operable at higher speed than heretofore achievable which exploits the sigma-delta principle in a different way....
US-6,515,524 Power-up control circuit
A power-up control circuit architecture that utilizes zero current under normal operation. The power-up control circuit will sense a common supply voltage, Vcc,...
US-6,514,881 Hybrid porous low-K dielectrics for integrated circuits
An organically modified dielectric network structure (208) and solid halide-containing material (206) are co-deposited using a chemical vapor deposition process....
US-6,514,845 Solder ball contact and method
The invention is a method for attaching an electronic component (40) having Ball Grid Array contacts (36) to a circuit board contact array (31) to prevent the...
US-6,514,810 Buried channel PMOS transistor in dual gate CMOS with reduced masking steps
A buried channel PMOS transistor for analog applications is integrated into a digital CMOS process. A third well region (105) is formed by implanting a region in...
US-6,513,085 Link/transaction layer controller with integral microcontroller emulation
An IEEE 1394 serial bus (58) is interfaced utilizing a physical layer (54) to extract the data and a link/transaction layer controller (200) to interface the...
US-6,512,280 Integrated CMOS structure for gate-controlled buried photodiode
A light-sensing diode fabricated in a semiconductor substrate having a surface protected by an insulator, comprising a first region of one conductivity type in...
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