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Patent # Description
US-6,501,400 Correction of operational amplifier gain error in pipelined analog to digital converters
A pipeline analog to digital converter that includes a main pipeline including a plurality of analog to digital converter stages and a shadow pipeline for...
US-6,501,334 Actively biased class AB output stage with low quiescent power, high output current drive and wide output...
A class `AB` amplifier output stage has an active current bias source that provides base drive current to the output transistors that is proportional to the...
US-6,501,332 Apparatus and method for electrical signal amplification
An apparatus and method for utilizing a correction loop amplifier in conjunction with a main amplifier to produce signal amplification with low total harmonic...
US-6,501,308 Generation of clock signals for a semiconductor memory that are edge-synchronous with the output signals of a...
The circuit configuration for the generation of clock signals for a semiconductor memory (14) that are edge-synchronous with the output signals of a clock...
US-6,501,305 Buffer/driver for low dropout regulators
The buffer/driver for low dropout regulators (LDO) uses a feedback amplifier with low output impedance to drive the gate of the pass device MP6 of the regulator....
US-6,501,152 Advanced lateral PNP by implant negation
A lateral NPN transistor (LPNP) (102) having the lightly doped drain extension implant blocked from the emitter region (118) but not the collector region (120)....
US-6,500,678 Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other...
A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the decreases a reduction in a bottom electrode material during formation of...
US-6,499,863 Combining two lamps for use with a rod integrator projection system
A display system (800) combining light from two sources into a single light beam that is modulated by a light valve to form an image. Light from a first light...
US-6,499,131 Method for verification of crosstalk noise in a CMOS design
In deep submicron technologies, coupling capacitance significantly dominates the total parasitic capacitance. This causes crosstalk noise to be induced on...
US-6,499,098 Processor with instruction qualifiers to control MMU operation
A processor (100) is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy...
US-6,499,080 Post write buffer for a dual clock system
A post write buffer for a dual clock system which improves the utilization of host data bus (10) bandwidth is provided which consists of an address buffer (60),...
US-6,499,070 Circuitry and method of transferring parallel and serial data
A serial and parallel data communication system utilizing a data forwarding element and a data forwarding multiplexer; providing a method of data conversion...
US-6,498,939 Wireless network
An antenna network system comprises a server including a transmitter and an antenna, and a client including a receiver and a steerable antenna. There is also...
US-6,498,537 Phase comparison circuit having a controlled delay of an input signal
A phase comparison circuit capable of realizing high-speed response by the PLL circuit in order to realize high-speed reproduction of the signals. An input...
US-6,498,525 Configurable dual-supply voltage translating buffer
The voltage configurable circuit includes: a first transistor 20 having a first end coupled to a first power supply node VCCA; a second transistor 21 having a...
US-6,498,502 Apparatus and method for evaluating semiconductor structures and devices
An apparatus and method for evaluating semiconductor structures and devices are provided. A method for evaluating at least one selected electrical property of a...
US-6,498,405 Supply voltage reference circuit
A supply reference voltage circuit is coupled to an output node, a supply voltage node and a supply reference voltage node and is operable to connect the output...
US-6,497,824 One mask solution for the integration of the thin film resistor
A method for integrating a thin film resistor (60) into an interconnect process flow. Metal interconnect lines (40) are formed over a semiconductor body (10). An...
US-6,497,055 System and method for controlling a vapor dryer process
A system and method are disclosed including a vapor dryer chamber (12) with a lid (14). A heater (16) is disposed within the vapor dryer chamber to vaporize...
US-6,496,740 Transfer controller with hub and ports architecture
The transfer controller with hub and ports (TCHP) performs the task of communication throughout an entire system in a centralized function. A single hub (435)...
US-6,496,602 Sorting device of variable-length code
A sorting device for a variable-length code containing the following parts: a coding part 43 that converts the length value to a first bit column according to...
US-6,496,477 Processes, articles, and packets for network path diversity in media over packet applications
In one form of the invention, a process of sending real-time information from a sender computer to a receiver computer coupled to the sender computer by a packet...
US-6,496,352 Post-in-crown capacitor and method of manufacture
A post-in-crown capacitor is disclosed. The post-in-crown capacitor (60) includes a crown (44) coupled to a conductive via (20). A post (48) is disposed within...
US-6,496,317 Accurate adjustable current overshoot circuit
A write driver controls current path for current of an H-bridge circuit. The H-bridge circuit is controlled by a differential pair switch for adjusting a voltage...
US-6,496,133 Resistor string integrated circuit and method for reduced linearity error
Linearity of an n-bit integrated resistor string is improved by arraying the 2.sup.n resistors in 2.sup.k columns of 2.sup.m series coupled resistors each. The...
US-6,496,063 Selectable diode bias for power amplifier control in a wireless telephone handset
A power amplifier controller (45) for a wireless communications device (10), such as a wireless telephone, is disclosed. The power amplifier controller (45) has...
US-6,495,982 Electric motor control
A start-up switch 50 for an electric motor 1 comprises a resistive element (54) which is so constituted as to be connectable to an electric current path (15) and...
US-6,495,907 Conductor reticulation for improved device planarity
A semiconductor device and process for making the same are disclosed which use reticulated conductors and a width-selective planarizing interlevel dielectric...
US-6,495,905 Nanomechanical switches and circuits
A highly miniaturized nanomechanical transistor switch is fabricated using a mechanical cantilever which creates a conductive path between two electrodes in its...
US-6,493,868 Integrated development tool
An integrated code development tool, comprising of an editor, a project management and build system, a debugger, a profiler, and a graphical data visualization...
US-6,493,853 Cell-based noise characterization and evaluation
In deep submicron technologies, coupling capacitance significantly dominates the total parasitic capacitance. This causes crosstalk noise to be induced on...
US-6,493,850 Integrated circuit design error detector for electrostatic discharge and latch-up applications
For quantitatively identifying sensitivities against electrostatic discharge (ESD) and latch-up in an integrated circuit (IC) design (before the actual IC is...
US-6,493,818 Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundaries
This invention is a data synchronous apparatus for synchronization between a first clock domain to a second clock domain asynchronous with the first clock...
US-6,493,782 Method for performing hot docking of a portable computer into a docking station
A method and apparatus for allowing hot docking of a portable computer (15) into a docking station (20) comprising the steps of making a physical connection...
US-6,492,870 Class AB, high speed, input stage with base current compensation for fast settling time
The improved Class AB input stage monitors the needs of base current in the slewing transistors 22-25 and supplies that base current with extremely fast and...
US-6,492,847 Digital driver circuit
A digital driver circuit with one or more CMOS inverters intended as input stages, whereby for the MOS FETs of the inverters the channel width/length (W/L) ratio...
US-6,492,841 Integrated NAND and flip-flop circuit
A combination NAND and flip-flop circuit includes a pre-NAND scan circuit operable to receive a plurality of input signals and produce first and second output...
US-6,492,840 Current mode logic gates for low-voltage high-speed applications
A new family of current mode logic (CML) gates (14) which, in one embodiment includes OR/NOR and AND/NAND gates, as well as more complex logic functions. The...
US-6,492,793 High efficiency switching DC-DC regulator
A synchronous switching DC-DC regulator uses the output switching node as the control reference for the main FET gate drive voltage limiting and the appropriate...
US-6,492,222 Method of dry etching PZT capacitor stack to form high-density ferroelectric memory devices
An embodiment of the instant invention is a method of fabricating a ferroelectric memory device (125 of FIG. 1) comprised of a top electrode (128 and 130 of FIG....
US-6,490,641 Addressable shadow port circuit
A protocol and associated circuitry operable for efficiently extending serial bus capability in system environments is disclosed. The protocol is designed to...
US-6,490,112 Supply and method for providing differential positive supply voltages to a load with reduced common mode voltages
A circuit (50) and method are presented to provide positive biasing voltages to an MR head (18) in a mass data storage device (10). The circuit (50) includes...
US-6,489,909 Method and apparatus for improving S/N ratio in digital-to-analog conversion of pulse density modulated (PDM)...
A method and apparatus for improving an S/N ratio in a digital-to-analog conversion of a PDM signal are provided. A digital-to-analog conversion system comprises...
US-6,489,908 Wireless local loop terminal and system having high speed, high resolution, digital-to-analog converter with...
A wireless local loop apparatus and corresponding system having an improved DAC operable at higher speed than heretofore achievable which exploits the ...
US-6,489,886 Security system to prevent unauthorized starting of the engine of a vehicle
A security system to prevent unauthorized starting of the engine of a vehicle has a remote control unit (18) equipped with a transponder which, on reception of...
US-6,489,813 Low power comparator comparing differential signals
A comparator comparing a differential input signal (represented by INM and INP single ended signals) with a differential reference signal (REFP and REFM) to...
US-6,489,673 Digital signal processor/known good die packaging using rerouted existing package for test and burn-in carriers
A package for a semiconductor die having a header with a cavity. The cavity includes a floor, sidewalls and a plurality of vertically spaced apart rows along the...
US-6,489,238 Method to reduce photoresist contamination from silicon carbide films
Silicon carbide layers are often used as hardmask layers in semiconductor processing. The photoresist used to pattern the silicon carbide layers during the...
US-6,489,178 Method of fabricating a molded package for micromechanical devices
A plastic land-grid array package, a ball-grid array package, and a plastic leaded package for micromechanical components are fabricated by a molding process...
US-6,489,173 Method for determining lead span and planarity of semiconductor devices
A method for detecting and screening integrated circuit devices having all leads in a row out of planarity specification wherein the leads are deformed at the...
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