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Patent # Description
US-9,304,890 Method for throttling trace data streams
A method of managing a debug trace data stream by detecting conditions where the trace data generated exceeds the available transmission bandwidth, and...
US-9,304,283 Bond-pad integration scheme for improved moisture barrier and electrical contact
An apparatus includes first and second electrodes separated by an insulative material (such as a piezoelectric material). The apparatus also includes a...
US-9,303,986 Navigation assistance based on visual codes
Visual codes are scanned to assist navigation. The visual code may be a Quick Response (QR) code that contains information useful to calibrating a variety of...
US-9,303,953 Digital system for the detection of variations in operating conditions of an integrated circuit
A system for detecting tamper events in a digital circuit by having a Critical Path Replica (CPR) circuit operable in parallel with the circuit being monitored,...
US-9,300,975 Concurrent access shared buffer in a video encoder
A video encoder includes a buffer, a DMA engine, a motion estimator and a motion compensator. The buffer includes four pages where macroblocks are stored. The...
US-9,300,361 Enabling co-existence among power line communication (PLC) technologies
Systems and methods for enabling co-existence among power line communications (PLC) technologies are described. In some embodiments, a method performed by a PLC...
US-9,300,247 RC oscillator with additional inverter in series with capacitor
In an electronic device, an RC oscillator generally includes a resistor, a capacitor and at least one inverter. The resistor and capacitor generate a...
US-9,300,222 Three-dimensional power supply module with passive stacked over cavity
A power converter sub-assembly/module includes a power switching assemblage defining a cavity within which can be mounted a driver IC. The power switching...
US-9,300,025 Interface between an integrated circuit and a dielectric waveguide using a carrier substrate with a dipole...
A system includes an integrated circuit that has a substrate with a top surface and a bottom surface. Semiconductor circuitry is including a radio frequency...
US-9,300,024 Interface between an integrated circuit and a dielectric waveguide using a dipole antenna, a reflector and a...
A system includes an electronic device coupled to a mating end of a dielectric wave guide (DWG). The electronic device has a multilayer substrate that has an...
US-9,299,832 High voltage lateral DMOS transistor with optimized source-side blocking capability
An integrated circuit and method having an extended drain MOS transistor with a buried drift region, a drain diffused link, a channel diffused link, and an...
US-9,299,830 Multiple shielding trench gate fet
A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The...
US-9,299,697 High breakdown voltage microelectronic device isolation structure with improved reliability
A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low...
US-9,298,665 Multicore, multibank, fully concurrent coherence controller
This invention optimizes non-shared accesses and avoids dependencies across coherent endpoints to ensure bandwidth across the system even when sharing. The...
US-9,298,643 Performance and power improvement on DMA writes to level two combined cache/SRAM that is cached in level one...
This invention optimizes DMA writes to directly addressable level two memory that is cached in level one and the line is valid and dirty. When the level two...
US-9,294,346 Proxy pair identification communication though separate proxy devices and paths
In one form of invention a process of operating a host computer coupled to a communications network including: determining whether a diversity flag is set, when...
US-9,294,316 Scrambling sequences for wireless networks
An integrated circuit includes logic configured to generate scrambling sequences, each based on a different scrambling seed, for a smart-utility-network data...
US-9,294,170 Efficient rank and precoding matrix feedback for MIMO systems
The present disclosure provides a receiver, a transmitter and methods of operating a receiver or a transmitter. In one embodiment, the receiver includes a...
US-9,294,153 Systems and methods of wireless power transfer with interference detection
Systems and methods of wireless power transfer system with interference detection disclosed herein detects possible excessive energy transfer associated with...
US-9,294,138 Mixer sequence design for N-path filters
A bandpass filter includes a plurality of parallel paths, each receiving the input signal to the bandpass filter. Each path includes a first mixer, a low-pass...
US-9,294,116 Digital to analog converter discharge circuit and associated method for analog to digital converter circuits
A circuit includes an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC)....
US-9,294,082 Circuit for current sensing in high-voltage transistor
An integrated circuit including a high-voltage n-channel MOS power transistor, a high-voltage n-channel MOS blocking transistor, a high-voltage n-channel MOS...
US-9,294,061 Low power, low out-of-band harmonic content radio
A radio that includes a transceiver to transmit and receive RF signals. The transceiver including a transmitter, a transformer, and a receiver, the transformer...
US-9,294,000 Direct conversion output driver
A circuit and method for providing a fully integrated differential boost converter and amplifier. A first half bridge circuit has a first output node and a...
US-9,293,460 ESD protection device with improved bipolar gain using cutout in the body well
An integrated circuit includes an NMOS SCR in which a p-type body well of the NMOS transistor provides a base layer for a vertical NPN layer stack. The base...
US-9,293,422 Optoelectronic packages having magnetic field cancelation
A stacked optoelectronic packaged device includes a bottom die having a top surface including bottom electrical traces and a light source die coupled to...
US-9,293,357 Sinker with a reduced width
The width of a heavily-doped sinker is substantially reduced by forming the heavily-doped sinker to lie in between a number of closely-spaced trench isolation...
US-9,293,254 Heated capacitor and method of forming the heated capacitor
A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an...
US-9,292,721 NFC receiver architecture with improved power sensitivity
An electronic communication device includes an antenna configured to receive a radio frequency (RF) signal and generate a differential current signal at a first...
US-9,292,038 Synchronization circuit
A synchronization circuit receives an external clock input. The circuit includes an internal oscillator; a clock detection circuit, coupled to the external...
US-9,291,819 Multi-focus heads-up display using single picture generator unit
Apparatus and methods are described for creating multiple different heads-up display (HUD) images at different apparent distances from a viewer using a single...
US-9,291,675 Boundary control scan cells, data cells, resynchronization memories, and multiplexers
An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a...
US-9,291,648 Hybrid closed-loop/open-loop magnetic current sensor
Hybrid magnetic current sensors and sensing apparatus are presented with closed-loop and open-loop circuitry employs first and second integrated magnetic...
US-9,288,500 Luma-based chroma intra-prediction for video coding
A method for luma-based chroma intra-prediction in a video encoder or a video decoder is provided that includes filtering reconstructed neighboring samples of a...
US-9,287,876 Fully automated. high throughput, configurable digital design internal functional node probing mechanism and method
A device includes a plurality of functional logic blocks, a cascaded arrangement of multiplexers and a digital counter. Each of the plurality of functional...
US-9,287,875 Load switch for controlling electrical coupling between power supply and load
Circuits and methods for controlling electrical coupling by a load switch are disclosed. In an embodiment, the load switch includes a pass element, level-shift...
US-9,287,869 Data bus synchronizer without an enable signal input
A data bus synchronizer includes a plurality of registers arranged in a cascade, configured to generate a synchronized output in response to sampling an...
US-9,287,862 Bootstrapped sampling switch circuits and systems
A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage;...
US-9,287,858 Low leakage shadow latch-based multi-threshold CMOS sequential circuit
Multi-threshold CMOS (MTCMOS) sequential circuits are presented with a first latch circuit formed of transistors with threshold voltages in a first range, along...
US-9,287,776 Low power switching mode regulator having automatic PFM and PWM operation
A circuit and method for operating a switching mode power supply. A clock is driven by a current source to generate pulses at a fixed frequency using pulse...
US-9,286,492 Public/private non-volatile memory battery with root key index, identity key
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In...
US-9,285,426 Blocking the effects of scan chain testing upon a change in scan chain topology
A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain...
US-9,285,425 Test access mechanism, controller, selector, scan router, external data bus
A device test architecture and interface is provided to enable efficient testing embedded cores within devices. The test architecture interfaces to standard...
US-9,282,504 Joining process for powerline communication (PLC) networks
Systems and methods for routing protocols for power line communications (PLC) are described. In some embodiments, a method performed by a PLC device, such as a...
US-9,282,333 Methods and systems for masking multimedia data
Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one...
US-9,281,976 Transmitter and method of transmitting
At least one tone is generated. An output signal is generated in response to an input signal and the at least one tone. The output signal is modulated. The...
US-9,281,881 4TX codebook enhancement in LTE
Channel state information (CSI) feedback in a wireless communication system is disclosed. A precoding matrix is generated for multi-antenna transmission based...
US-9,281,832 Circuits and methods for bandwidth estimation optimization of analog to digital converters
A bandwidth estimator circuit for an analog to digital converter. The bandwidth estimator computes a bandwidth estimate of an analog signal and includes: an...
US-9,281,789 Integrated circuit for use in a hybrid output stage
This invention generally relates to the technical field of integrated circuits. More specifically the invention relates to output stages for providing an output...
US-9,281,743 Charge pump power supply with output voltage sensing using residual charge on a flying capacitor
A regulated charge pump power supply is implemented with a QP regulation loop providing QP clocking to control pumping operation based on sensing output voltage...
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