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Patent # Description
US-9,355,436 Method, system and computer program product for enhancing a depth map
A first depth map is generated in response to a stereoscopic image from a camera. The first depth map includes first pixels having valid depths and second...
US-9,354,876 Processor with execution unit wait control
A processor includes a processor core. The processor core includes a first execution unit and a second execution unit. The first execution unit is configured to...
US-9,354,186 X-ray sensor and signal processing assembly for an X-ray computed tomography machine
An apparatus having an X-ray sensor assembly with X-ray blocking pixels divided by X-ray transmitting gaps with the X-ray blocking pixels casting an X-ray...
US-9,354,138 Fixture for test circuit board reliability testing
A fixture for securing at least one test printed circuit board assembly (PCBA) including a PCB having semiconductor devices mounted thereon during vibration or...
US-9,351,326 Access point discoverability in multi-role multi-channel devices
Systems and methods for improved access point discoverability in multi-role multi-channel devices are described. When the multi-role multi-channel device leaves...
US-9,351,081 Capacitive micromachined ultrasonic transducer (CMUT) with through-substrate via (TSV) substrate plug
A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate of a single crystal material having a...
US-9,350,590 Method, system and apparatus for carrier frequency offset correction and channel estimation
A receiver is configured to use a first part of a received signal and a second part of the received signal to determine, respectively, a first estimate and a...
US-9,350,424 Coexistence method by requesting access to the channel
Systems and methods for implementing coexistence by requesting access to a channel in power line communications (PLC) are described. In an illustrative...
US-9,350,393 De-emphasis filtering audio signals in response to composite control signal
Digital values representing an audio signal are formed in a FM transmitter. The deviation of the amplitude of the audio signal as represented by the digital...
US-9,350,336 Timing compensation using the system clock
An integrated circuit including a plurality of internal clock generator circuits from which an internal clock is selected based on an external time reference. A...
US-9,350,327 Flip-flops with low clock power
The disclosure provides a flip-flop that utilizes low power as a result of reduced transistor count. The flip-flop includes a tri-state inverter that receives a...
US-9,350,249 Flyback power supply regulation apparatus and methods
Apparatus and methods disclosed herein are associated with a primary side voltage and/or current regulator (PSR) in a flyback power converter. Apparatus and...
US-9,350,240 Power converter soft start circuit
PWM control circuits and soft start circuitry thereof are presented in which a source follower circuit provides an input to a pulse generator error amplifier...
US-9,350,180 Load switch having load detection
Conventionally, current detection in load switches is implemented by monitoring the voltage across a small value sense resistor in series with the load switch,...
US-9,350,159 Methods and apparatus to clamp overvoltages for alternating current systems
Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described,...
US-9,350,063 Dielectric waveguide with non-planar interface surface and mating deformable material
A dielectric wave guide (DWG) has a dielectric core member having that has a first dielectric constant value. A cladding surrounding the dielectric core member...
US-9,349,933 Vertical thermoelectric structures
A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive...
US-9,348,558 Processor with efficient arithmetic units
A processor includes a carry save array multiplier. The carry save array multiplier includes an array of cascaded partial product generators. The array of...
US-9,348,349 Control for voltage regulators
A mixed signal approach is applied to detect an output voltage condition as applied to a load. A current mode monitoring approach can be adopted and applied in...
US-9,348,345 Fixed frequency DC to DC converter control circuit with improved load transient response
Analog pulse width modulation (PWM) control circuits and techniques are presented for improving output voltage load transient response in controlling DC to DC...
US-9,348,136 Micromirror apparatus and methods
A DMD having an array of micromirror pixels wherein each pixel comprises a right electrode on a first side of the pixel, a left electrode on a second side of...
US-9,347,994 Boundary scan with coarse and fine delay register clock circuitry
A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits...
US-9,347,992 IC and core taps with input and linking module circuitry
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for...
US-9,347,991 Scan throughput enhancement in scan testing of a device-under-test
Systems and methods for enabling scan testing of device-under-test (DUT) are disclosed. In an embodiment, a test system for scan testing the DUT, including P...
US-9,347,897 Characterizing dimensions of structures via scanning probe microscopy
A method comprising characterizing the dimensions of structures on a semiconductor device having dimensions less than approximately 100 nanometers (nm) using...
US-9,347,808 Flush mounted ultrasonic transducer arrays for flow measurement
A flow meter system includes a first ultrasonic transducer array to be flush-mounted to a pipe. The system also includes a second ultrasonic transducer array to...
US-9,345,088 LED control circuits and methods
An LED controller is disclosed herein. An embodiment of the controller includes a first input connectable to a power source and an output connectable to at...
US-9,344,743 Flexible region based sample adaptive offset (SAO) and adaptive loop filter (ALF)
A method for in-loop filtering in a video encoder is provided that includes determining filter parameters for each filtering region of a plurality of filtering...
US-9,344,696 Methods and apparatus for optical display using multiple spatial light modulators for increased resolution
A system for displaying a high resolution video image utilizing multiple spatial light modulators includes at least one illumination source configured to...
US-9,344,694 Spatial light modulator sub-pixel architecture and method
A semiconductor device comprises an array of individually controllable image pixels arranged in a plurality of reset groups. Each of the image pixels in the...
US-9,344,314 Computer generated sequences for downlink and uplink signals in wireless communication systems
The present disclosure provides a base station transmitter, a user equipment transmitter and methods of operating the base station and user equipment...
US-9,344,097 Fast acquisition frequency detector
A phase-frequency detector (PFD) circuit that includes a binary phase detector and a ternary phase detector coupled to the binary phase detector. The binary...
US-9,344,070 Relaxation oscillator with low drift and native offset cancellation
Relaxation oscillator circuitry is presented with low drift and native offset cancellation, including an amplifier amplifying a first current signal to provide...
US-9,344,066 Digital open loop duty cycle correction circuit
A duty cycle correction (DCC) circuit includes a master delay line that receives an input clock and determines a period of the input clock. A calibration module...
US-9,344,014 Piezoelectric device
Piezoelectric harvesting devices are disclosed herein. An embodiment of a harvesting device includes a cantilever having a resonant frequency associated...
US-9,343,962 Power regulator system with adaptive ramp signal generator
One embodiment includes a power regulator system. The system includes a switch control stage configured to generate at least one activation signal based on a...
US-9,343,949 Control circuit to detect a noise signal during a state change of a switch
Several circuits and methods for driver control of a switching circuit are disclosed. In an embodiment, a circuit for driver control of a switching circuit...
US-9,343,898 Driver current control apparatus and methods
Apparatus and methods disclosed herein implement steady-state and fast transient electronic current limiting through power transistors, including power...
US-9,343,468 Feed-forward bidirectional implanted split-gate flash memory cell
A split-gate flash memory cell (cell) includes a semiconductor surface. A first control gate (CG) on a first floating gate (FG) and a second CG on a second...
US-9,343,459 Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Complementary high-voltage bipolar transistors formed in standard bulk silicon integrated circuits are disclosed. In one disclosed embodiment, collector regions...
US-9,343,447 Optically pumped sensors or references with die-to-package cavities
An optoelectronic packaged device includes stacked components within a package including a package substrate providing side and a bottom wall. The stacked...
US-9,343,332 Alignment to multiple layers
A method of aligning a new pattern to more than one previously defined pattern during the manufacture of an integrated circuit. A method of aligning a...
US-9,342,482 On-chip spectral analysis using enhanced recursive discrete Fourier transforms
A computing device uses a recursive discrete Fourier transform (RDFT) engine to reduce time required by a frequency transform module, memory required to hold...
US-9,342,468 Memory time stamp register external to first and second processors
A method and system of inserting marker values used to correlate trace data as between processor cores. At least some of the illustrative embodiments are...
US-9,342,312 Processor with inter-execution unit instruction issue
A processor includes an instruction storage memory, a processor core, and an instruction merge unit. The processor core includes a plurality of execution units...
US-9,342,259 Nonvolatile logic array and power domain segmentation in processing device
A computing device includes a first set of non-volatile logic element arrays associated with a first function and a second set of non-volatile logic element...
US-9,342,124 Programmable and simultaneous load switch control for power sequencing
A power delivery and control device that includes a voltage input line, a voltage output line, a control logic unit coupled to the voltage input and voltage...
US-9,342,089 Verification of bandgap reference startup
A bandgap reference (BGR) startup verification circuit includes a current minor for receiving an output current from a bandgap reference (BGR) circuit and...
US-9,341,658 Fast on-chip oscillator trimming
Oscillation frequency measurements for trimming oscillators on an integrated circuit device are performed entirely on the device. The oscillation frequency...
US-9,341,543 Method and OTDR apparatus for optical cable defect location with reduced memory requirement
Optical time domain reflectometer (OTDR) systems, methods and integrated circuits are presented for locating defects in an optical cable or other optical cable,...
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