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Patent # Description
US-9,294,138 Mixer sequence design for N-path filters
A bandpass filter includes a plurality of parallel paths, each receiving the input signal to the bandpass filter. Each path includes a first mixer, a low-pass...
US-9,294,116 Digital to analog converter discharge circuit and associated method for analog to digital converter circuits
A circuit includes an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC)....
US-9,294,082 Circuit for current sensing in high-voltage transistor
An integrated circuit including a high-voltage n-channel MOS power transistor, a high-voltage n-channel MOS blocking transistor, a high-voltage n-channel MOS...
US-9,294,061 Low power, low out-of-band harmonic content radio
A radio that includes a transceiver to transmit and receive RF signals. The transceiver including a transmitter, a transformer, and a receiver, the transformer...
US-9,294,000 Direct conversion output driver
A circuit and method for providing a fully integrated differential boost converter and amplifier. A first half bridge circuit has a first output node and a...
US-9,293,460 ESD protection device with improved bipolar gain using cutout in the body well
An integrated circuit includes an NMOS SCR in which a p-type body well of the NMOS transistor provides a base layer for a vertical NPN layer stack. The base...
US-9,293,422 Optoelectronic packages having magnetic field cancelation
A stacked optoelectronic packaged device includes a bottom die having a top surface including bottom electrical traces and a light source die coupled to...
US-9,293,357 Sinker with a reduced width
The width of a heavily-doped sinker is substantially reduced by forming the heavily-doped sinker to lie in between a number of closely-spaced trench isolation...
US-9,293,254 Heated capacitor and method of forming the heated capacitor
A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an...
US-9,292,721 NFC receiver architecture with improved power sensitivity
An electronic communication device includes an antenna configured to receive a radio frequency (RF) signal and generate a differential current signal at a first...
US-9,292,038 Synchronization circuit
A synchronization circuit receives an external clock input. The circuit includes an internal oscillator; a clock detection circuit, coupled to the external...
US-9,291,819 Multi-focus heads-up display using single picture generator unit
Apparatus and methods are described for creating multiple different heads-up display (HUD) images at different apparent distances from a viewer using a single...
US-9,291,675 Boundary control scan cells, data cells, resynchronization memories, and multiplexers
An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a...
US-9,291,648 Hybrid closed-loop/open-loop magnetic current sensor
Hybrid magnetic current sensors and sensing apparatus are presented with closed-loop and open-loop circuitry employs first and second integrated magnetic...
US-9,288,500 Luma-based chroma intra-prediction for video coding
A method for luma-based chroma intra-prediction in a video encoder or a video decoder is provided that includes filtering reconstructed neighboring samples of a...
US-9,287,876 Fully automated. high throughput, configurable digital design internal functional node probing mechanism and method
A device includes a plurality of functional logic blocks, a cascaded arrangement of multiplexers and a digital counter. Each of the plurality of functional...
US-9,287,875 Load switch for controlling electrical coupling between power supply and load
Circuits and methods for controlling electrical coupling by a load switch are disclosed. In an embodiment, the load switch includes a pass element, level-shift...
US-9,287,869 Data bus synchronizer without an enable signal input
A data bus synchronizer includes a plurality of registers arranged in a cascade, configured to generate a synchronized output in response to sampling an...
US-9,287,862 Bootstrapped sampling switch circuits and systems
A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage;...
US-9,287,858 Low leakage shadow latch-based multi-threshold CMOS sequential circuit
Multi-threshold CMOS (MTCMOS) sequential circuits are presented with a first latch circuit formed of transistors with threshold voltages in a first range, along...
US-9,287,776 Low power switching mode regulator having automatic PFM and PWM operation
A circuit and method for operating a switching mode power supply. A clock is driven by a current source to generate pulses at a fixed frequency using pulse...
US-9,286,492 Public/private non-volatile memory battery with root key index, identity key
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In...
US-9,285,426 Blocking the effects of scan chain testing upon a change in scan chain topology
A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain...
US-9,285,425 Test access mechanism, controller, selector, scan router, external data bus
A device test architecture and interface is provided to enable efficient testing embedded cores within devices. The test architecture interfaces to standard...
US-9,282,504 Joining process for powerline communication (PLC) networks
Systems and methods for routing protocols for power line communications (PLC) are described. In some embodiments, a method performed by a PLC device, such as a...
US-9,282,333 Methods and systems for masking multimedia data
Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one...
US-9,281,976 Transmitter and method of transmitting
At least one tone is generated. An output signal is generated in response to an input signal and the at least one tone. The output signal is modulated. The...
US-9,281,881 4TX codebook enhancement in LTE
Channel state information (CSI) feedback in a wireless communication system is disclosed. A precoding matrix is generated for multi-antenna transmission based...
US-9,281,832 Circuits and methods for bandwidth estimation optimization of analog to digital converters
A bandwidth estimator circuit for an analog to digital converter. The bandwidth estimator computes a bandwidth estimate of an analog signal and includes: an...
US-9,281,789 Integrated circuit for use in a hybrid output stage
This invention generally relates to the technical field of integrated circuits. More specifically the invention relates to output stages for providing an output...
US-9,281,743 Charge pump power supply with output voltage sensing using residual charge on a flying capacitor
A regulated charge pump power supply is implemented with a QP regulation loop providing QP clocking to control pumping operation based on sensing output voltage...
US-9,281,355 Integrated thinfilm resistor and MIM capacitor with a low serial resistance
An electronic device comprising a semiconductor structure having a back end capacitor and a back end thin film resistor and a method of manufacturing the same....
US-9,281,304 Transistor assisted ESD diode
An integrated circuit includes a diode/bipolar ESD protection device. The diode/bipolar ESD device includes at least one gate separated ESD diode and at least...
US-9,281,275 Bond pad having ruthenium directly on passivation sidewall
A method of forming bond pads includes providing a substrate including an integrated circuit (IC) device formed thereon having an oxidizable uppermost metal...
US-9,281,269 Integrated circuit package and method of manufacture
An integrated circuit (IC) package, device, including a substrate having a top surface with an IC die mounting area and a peripheral area surrounding the...
US-9,281,245 Latchup reduction by grown orthogonal substrates
An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first...
US-9,281,232 Device having improved radiation hardness and high breakdown voltages
Radiation hardened NMOS devices suitable for application in NMOS, CMOS, or BiCMOS integrated circuits, and methods for fabricating them. A device includes a...
US-9,281,213 High precision capacitor dielectric
A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic...
US-9,280,524 Combining a handwritten marking with a rendered symbol to modify the rendered symbol
A first rendering of symbols is generated with typeset font, and the first rendering is displayed by a display device. From among the symbols, a selection is...
US-9,280,344 Repeated execution of instruction with field indicating trigger event, additional instruction, or trigger...
A processor includes a plurality of execution units. At least one of the execution units is configured to repeatedly execute a first instruction based on a...
US-9,277,789 Current, temperature or electromagnetic field actuated fasteners
A method of bonding or debonding objects includes providing a first object including a first substrate with moveable features thereon which provide an actuated...
US-9,277,194 Method and apparatus for image and video coding using hierarchical sample adaptive band offset
A method and apparatus for image coding using hierarchical sample adaptive band offset. The method includes decoding a signal of a portion of an image,...
US-9,276,765 Apparatus and system for an active star/stub/ring controller area network physical layer transceiver
A controller area network (CAN) node comprises an internal high differential bus line (CANH) and an internal low differential bus line (CANL). The CAN node...
US-9,276,764 Enhanced carrier sense multiple access (CSMA) protocols
Systems and methods for enhanced carrier sense multiple access (CSMA) protocols are described. In various implementations, these systems and methods may be...
US-9,276,638 Coupling circuits for power line communication devices
Coupling circuits for power line communication (PLC) devices are described. In an embodiment, a PLC device may comprise a processor and a coupling circuit...
US-9,276,636 Adaptive modulation system and method to minimize energy consumption
A communication device includes a modulating component, a transmitting component and a controlling component. The modulating component generates a first...
US-9,276,598 Trim-matched segmented digital-to-analog converter apparatus, systems and methods
One or more high-order bit linear branches of a segmented DAC are implemented as R-2R networks geometrically down-scaled from the DAC binary portion by a...
US-9,276,566 Dual edge-triggered retention flip-flop
A dual edge triggered retention flip-flop reduces clock tree power dissipation in an active mode and leakage power in a low-power (e.g., standby) mode. For...
US-9,276,475 Switched mode assisted linear regulator with decoupled output impedance and signal path bandwidth
A switched mode assisted linear (SMAL) amplifier/regulator architecture can be configured to supply regulated power to a dynamic load, such as an RF power...
US-9,276,056 Baluns for RF signal conversion and impedance matching
A magnetically-coupled structure is integrated with an integrated circuit in back end-of-line (BEOL) digital CMOS fabrication processes. A differential primary...
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