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System and method for implementing low-cost electronic gyroscopes and
Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter...
CQI feedback structure
Embodiments of the present disclosure provide a reporting allocation unit, an indicator interpretation unit and methods of operating a reporting allocation unit...
Method and system for detecting global brightness change for weighted
prediction in video encoding
A method of encoding a coding unit of a digital video sequence is provided that includes computing a brightness measure for each region in a plurality of...
Method for low memory footprint compressed video decoding
This invention is a method of memory saving in compressed video decoding. For each group of pictures the method determines whether less than the maximum number...
Imaging input/output with shared spatial modulator
An image input/output apparatus and method includes a light source in optical communication with a spatial radiation modulator for projecting an output image...
Coexistence method by requesting access to the channel
Systems and methods for implementing coexistence by requesting access to a channel in power line communications (PLC) are described. In an illustrative...
A system can include a close-in tone control configured to detect a set of close-in tones of an interleaved analog to digital converter (IADC) signal and output...
Boost capacitor sharing architecture for power supply active balancing
An apparatus includes multiple first channels configured to be coupled to a first boost capacitor and multiple second channels configured to be coupled to a...
Negative edge flip-flop with dual-port slave latch
In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable...
A DC-DC converter, having an output voltage and including at least one electronic switch; first circuitry controlling the output voltage by adjusting a...
Controlled on and off time scheme for monolithic cascoded power
A semiconductor device includes a depletion mode GaN FET cascoded with an enhancement mode NMOS transistor. A gate of the GaN FET is electrically coupled to a...
Integrated circuit package strip support assembly
An integrated circuit ("IC") package strip support assembly for a saw table including a first material having a first hardness and having a surface adapted to...
Method for creating bit planes using a digital signal processor and double
index addressing direct memory access
According to one embodiment of the present invention, a method for creating bit planes from frame data for a digital mirror device is disclosed including...
Multiport memory emulation using single-port memory devices
A multiport memory emulator receives first and a second memory commands for concurrent processing of memory commands in one operation clock cycle. Data operands...
Blocking the effects of scan chain testing upon a change in scan chain
A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain...
On-time based peak current density rule and design method
A method of computing a peak current density specification (j.sub.peakspec) for an electrical conductor line of an integrated circuit (IC) resulting from...
High voltage ultrasound transmitter with gate protection diodes and
intrinsic output zeroing
An ultrasound transmitter including intrinsic output zeroing is disclosed herein. A transmitter for generating ultrasound signals includes a first transmitter...
Etching cavity structures in silicon under dielectric membrane
A semiconductor device includes a semiconductor layer (2) and a dielectric stack (3) on the semiconductor layer. A plurality of etchant openings (24-1,2 . . . )...
Inductive sensing including inductance multiplication with series
Inductive position sensing uses inductance multiplication with series connected sensor coils. In one embodiment, a first sensing domain area is established in a...
Mapping schemes for secondary synchronization signal scrambling
Embodiments of the present disclosure provide a transmitter, a receiver and methods of operating a transmitter and a receiver. In one embodiment, the...
Method and apparatus for diagonal scan and simplified coding of transform
A method and apparatus for encoding video data. At least a portion of a two dimensional array of transform coefficients representing a portion of video data is...
PHY layer options for body area network (BAN) devices
In at least some embodiments, a communication device includes a transceiver with a physical (PHY) layer. The PHY layer is configured for body area network (BAN)...
Resource allocation and signaling for aperiodic sounding
This patent application considers the configuration aperiodic sounding reference signal parameters by radio resource control signaling and the triggering of...
Macro-block encoding of skipped video frames
A video system includes an encoder for generating a compressed bit stream in response to a received video signal. A transitional location is located in the bit...
ESD robust level shifter
An inverter type level shifter includes a first power supply voltage and a first ground voltage. A first inverter operates on the first power supply voltage and...
Inductive optical sensor utilizing frontside processing of photo sensitive
A photodetector detects the absence or presence of light by detecting a change in the inductance of a coil. The magnetic field generated when a current flows...
Segmented NPN vertical bipolar transistor
A segmented bipolar transistor includes a p-base in a semiconductor surface including at least one p-base finger having a base metal/silicide stack including a...
Register bank cross path connection method in a multi core processor
Scratch pad register banks are used as shared fast access storage between processors in a multi processor system. Instead of the usual one to one register...
Wireless telephone sending speech data in second packet secondary stage
An IC processor circuit has an interface for a microphone and a packet switched network. A memory holds bits for converting audible speech from the microphone...
Preserving text quality in video encoding
A video encoder receives a macro-block of an image frame, and determines whether the macro-block contains text. The video encoder computes a quantization...
Coherent cache system with optional acknowledgement for out-of-order
coherence transaction completion
To enable efficient tracking of transactions, an acknowledgement expected signal is used to give the cache coherent interconnect a hint for whether a...
Programmable interface-based validation and debug
A programmable interface-based validation and debug system includes, for example, a test connector that is arranged to communicatively couple a design under...
Method and apparatus for time of flight sensor 2-dimensional and
3-dimensional map generation
A method and apparatus for Time Of Flight sensor 2-dimensional and 3-dimensional map generation. The method includes retrieving Time Of Flight sensor fixed...
Coatings for relatively movable surfaces
A device has a microelectromechanical system (MEMS) component with at least one surface and a coating disposed on at least a portion of the surface. The coating...
Optimized algorithm for construction of composite video from a set of
discrete video sources
A method includes reading a composite video descriptor data structure and a plurality of window descriptor data structures. The composite video descriptor data...
Transforming wide dynamic range images to reduced dynamic range images
A method of transforming an N-bit raw wide dynamic range (WDR) Bayer image to a K-bit raw red-green-blue (RGB) image wherein N>K is provided that includes...
Decision feedback equalizer
A decision feedback equalizer (DFE) circuit includes a first equalization path and a second equalization path. Each equalization path includes a summing node, a...
Reference clock compensation in DVB-H receivers
A wireless receiver providing multiple services (FIG. 3) is disclosed. The wireless receiver includes an oscillator circuit (304, FIG. 4) arranged to produce a...
Adding predefined offset to coarse ADC residue output to SAR
A successive approximation register analog to digital converter (SAR ADC) receives an input voltage and a plurality of reference voltages. The SAR ADC includes...
Dual comparator-based error correction scheme for analog-to-digital
An analog-to-digital converter (ADC) includes a first comparator, a second comparator, and a decision timing comparison logic unit. The first comparator is...
Flatband shift for improved transistor performance
An integrated circuit includes MOS and DEMOS transistors with at least one of indium, carbon, nitrogen, and a halogen dopant raising the threshold voltage of a...
Electronic device and method for increasing reliability of bipolar
transistors under high voltage conditions
The invention relates to an electronic device with a bipolar transistor having an emitter, a base and a collector. The base has a first region of a first...
Method for transmission of unicast control in broadcast/multicast
transmission time intervals
Embodiments of the invention provide methods for maximizing the bandwidth utilization in the uplink of a communication system supporting time division...
Wireless sensor with FRAM
A wireless sensor module for use in a wireless sensor network. The sensor module collects sensor data in a periodic manner with a first time period. The sensor...
At speed TAP, dual port router, and command flip-flop circuitry
This disclosure describes different ways to improve the operation of a device's 1149.1 TAP to where the TAP can perform at-speed Update & Capture, Shift &...
Array and peripheral power control decoded from circuitry and registers
Systems and methods for discrete power control of components within a computer system are described herein. Some illustrative embodiments include a system that...
Load current compesating output buffer feedback, pass, and sense circuits
A load current compensating output buffer circuit and method are disclosed. The circuit includes a buffer amplifier coupled to a supply voltage and the...
IC and test interposer with stimulus generator circuitry and TAP
The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the...
JTAG multiplexer with clock/mode input, mode/clock input and mode output
The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG...
Electronic device and method for tracking energy consumption
The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least...