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Method to extend data retention for flash based storage in a real time
device processed on generic...
This invention is a method to extend data retention for FLASH based storage in a real time device embodied in generic semiconductor technology. This invention...
ASIP with reconfigurable circuitry implementing atomic operations of a PLL
A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit...
5-wire resistive touch screen pressure measurement circuit and method
A 5-wire touch screen system includes a touch screen (10) including a wiper (11) and a resistive layer (16) aligned with the wiper and first (UL), second (UR),...
Gating WSP update and TAP updatedr with TAP IR enable
In a first embodiment a TAP 318 of IEEE standard 1149.1 is allowed to commandeer control from a WSP 202 of IEEE standard P1500 such that the P1500 architecture,...
Address and command port with tap and master controller circuitry
An address and command port interface selectively enables JTAG TAP domain operations and Trace domain operations within an IC. The port carries TMS and TDI...
IC gating selection on first/second and deselection on second/third counts
Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path....
Separating Metallic and Semiconductor SWNTS with sinusoidal
dipole-inducing magnetic fields
A process of sorting metallic single wall carbon nanotubes (SWNTs) from semiconducting types by disposing the SWNTs in a dilute fluid, exposing the SWNTs to a...
Systems and methods for network coding using maximum distance separable
(MDS) linear network codes
A method for network coding includes generating a message matrix, where each column of the message matrix corresponds to one of K message packets and each...
Mapping between logical and physical uplink control resource blocks in
A transmission of information from a secondary to a primary node occurs in a plurality of N logical time durations on an uplink channel in a wireless network. A...
Multirole device muxing channel scan with channel scan time slices
Systems and methods for channel scanning for multirole device are disclosed. One implementation relates to a method for servicing functions by a multirole...
Synchronized channel access in coexisting wireless networks
A system and method for arbitrating channel access in a wireless device including co-located network transceivers are disclosed herein. A wireless device...
Signaling of random access preamble time-frequency location in wireless
Embodiments of the present disclosure provide a base station sub-system, a method of allocating random access configurations and a method of downlink signaling...
Systems and methods for construction of and network coding using
near-maximum distance separable (MDS) linear...
A method for network coding using a near-maximum distance separable linear network code includes generating a message matrix where each column of the message...
Interleaver design and header structure for ITU G.hnem
Embodiments of the invention provide an interleaver design and header fields for ITU-T G.hnem. The header may comprise two parts that are separately encoded. A...
Digital-to-analog sinusoidal driver apparatus, systems and methods
Input codes are sequenced at a lower-resolution linear DAC and the output is converted to a linear current waveform. A first of two interconnected analog...
Switched mode assisted linear regulator with AC coupling with capacitive
The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load,...
Switched mode assisted linear regulator with dynamic buck turn-off using
ZCD-controlled tub switching
A switched mode assisted linear regulator includes a linear amplifier (LA) and a buck converter configured as a current source. In example embodiments, the buck...
Converter and method for extracting maximum power from piezo vibration
A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage...
Dielectric waveguide combined with electrical cable
A communication cable includes one or more conductive elements surrounded by a dielectric sheath. The sheath member has a first dielectric constant value. A...
FET dielectric reliability enhancement
A semiconductor device may be formed by forming a silicon-containing gate dielectric layer over a semiconductor layer. A gate metal layer is formed over the...
Method for ensuring DPT compliance for auto-routed via layers
A method of generating an integrated circuit with a double patterning technology (DPT) compatible via pattern using a reduced DPT compatible via design rule...
Integrated circuit package with printed circuit layer
An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die.
IC resistor formed with integral heatsinking structure
A resistor is formed on field oxide with a portion of the resistor body configured to overlap an active region in an integrated circuit (IC) substrate to...
Read margin measurement in a read-only memory
Read margin measurement circuitry for measuring the read margin of floating-gate programmable non-volatile memory cells. In some embodiments, the read margin of...
Method and system to play background music along with voice on a CDMA
A method and system for compressing an audio signal. The method includes receiving a segment of an audio signal and selectively disabling noise suppression for...
Clock tree design
A clock tree design tool is described which receives input from a user via a graphical user interface (GUI) through a first window, the input including an...
Memory management unit that applies rules based on privilege identifier
A memory management and protection system that manages memory access requests from a number of requestors. Memory accesses are allowed or disallowed based on...
Antenna selection for GNSS receivers
Embodiments of the invention provide a system and method to improve the performance of a GNSS receiver using antenna switching. The system has a plurality of...
Methods and systems to determine a final value of random telegraph noise
time constant and magnitude
A method includes, for a device and at each of a plurality of sampling frequencies, measuring a parameter of the device to generate a plurality of signals and...
Source and diversity rate equal to a first transmission rate
Packets of real-time information are sent with a source rate greater than zero kilobits per second, and a time or path or combined time/path diversity rate...
Making ESD diode with P-S/D overlying N-well and P-EPI portion
An integrated circuit structure includes a semiconductor doped area (NWell) having a first conductivity type, and a layer (PSD) that overlies a portion of said...
Electronic device and method for generating a curvature compensated
bandgap reference voltage
The invention relates to an electronic device with a bandgap reference generator including a first path with series connection of a first bipolar transistor, a...
Apparatus and method for indoor positioning
Apparatus and method for positioning a wireless device. In one embodiment, a method for indoor positioning includes determining a reference location of a...
Delay testing capturing second response to first response as stimulus
Scan and Scan-BIST architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure improves upon low power Scan and...
Integrated circuit with plural comparators receiving expected data and
mask data from different pads
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
Automatable scan partitioning for low power using external control
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan...
Operating scan path generators and compactors sequentially and capturing
A Scan-BIST architecture is adapted into a low power Scan-BIST architecture. A generator 102, compactor 106, and controller 110 remain the same as in the known...
Hermetic plastic molded MEMS device package and method of fabrication
A hermetically packaged microelectromechanical system (MEMS) device has a substrate with an assembly pad (101) and a plurality of terminals (102); a chip (110)...
Relay attack prevention for passive entry/passive start systems
A keyfob is disclosed for use in detecting an attack on a vehicle. The keyfob includes a microcontroller, a wake receiver and an accelerometer. The wake...
Channel quality report processes, circuits and systems
Coordinated multi-point (CoMP) transmissions in a cellular network is performed using multi-broadcast single frequency network (MBSFN) subframes. During CoMP...
Apparatus for dimensioning the control channel for transmission efficiency
in communications systems
Embodiments of the invention provide methods for optimizing the spectral efficiency of control channel transmissions carrying scheduling assignments from a...
Method to use a preamble with band extension in power line communications
Embodiments include methods of powerline communications using a preamble with band extension is provided. A method may include receiving a packet data unit PDU....
Asynchronous sampling using a dynamically adustable snapback range
A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each...
Linear capacitively coupled touch sensor and method
A system includes a capacitively-coupled touch sensor having a conductive first layer and a conductive second layer on a first insulative layer. The width of...
Cascoded H-bridge pre-driver
An aspect of the present invention includes a circuit having a cascoded H-bridge, an upper voltage supply component, a lower voltage supply component and a...
Positive edge preset reset flip-flop with dual-port slave latch
In an embodiment of the invention, a flip-flop circuit contains a 2-input multiplexer, a master latch, a transfer gate and a slave latch. The scan enable...
Return control circuitry for VCM
To provide a disk drive capable of inhibiting the occurrence of acoustic noise caused by a voltage pulse when the head is retracted using a speed control method...
ESD protection circuit with isolated SCR for negative voltage operation
A semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108)...
Synchronized voltage scaling and device calibration
A method is provided for scaling voltage in an integrated circuit. A calibration operation is performed on a functional module on the integrated circuit...
Detecting and tracking touch on an illuminated surface using a machine
A method for touch detection that is performed by a touch processor in an optical touch detection system is provided. The method includes receiving an image of...