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Regulated multiple output isolated DC to DC converter
Disclosed examples include multiple output DC to DC converters with a buck converter including a half bridge switching circuit and transformer primary winding...
Dielectric waveguide combined with electrical cable
A communication cable includes one or more conductive elements surrounded by a dielectric sheath. The sheath member has a first dielectric constant value. A...
On chip characterization of timing parameters for memory ports
A circuit and method for memory characterization. The circuit includes first and second programmable delay lines, address and data registers, an output register...
File access method and system thereof
Several systems and methods for accessing files stored in a storage device are disclosed. In an embodiment, the method includes accessing a file allocation...
Projector with optical conversion media pumped by low etendue source
A projector system with a single imaging array has a low-etendue light source. The projector system includes a first optical path from the low-etendue light...
Vapor cell structure having cavities connected by channels for
micro-fabricated atomic clocks, magnetometers,...
A first apparatus includes a vapor cell having first and second cavities fluidly connected by multiple channels. The first cavity is configured to receive a...
Apparatus and method for measuring and controlling the internal
temperature of a semiconductor device
A method for controlling the temperature of a semiconductor device-under-test (DUT) by forming an apparatus (100) including a feedback loop between a...
Devices and methods for detecting USB devices attached to a USB charging
Methods and devices for detecting USB devices attached to a USB charging port including a USB port having a first data line D+, a second data line D-, and a...
Hermetically-sealed MEMS device and its fabrication
A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (101a), the substrate hermetically sealed to a...
Near-optimal QoS-based resource allocation for hybrid-medium communication
Embodiments of the invention provide a method for performing network resource allocation over hybrid networks so that application QoS requirements are met. The...
Guard subcarrier placement in an OFDM symbol used for synchronization
Embodiments of the present disclosure provide a transmitter, a receiver and methods of operating a transmitter and a receiver. In one embodiment, the...
Chopped operational-amplifier (OP-AMP) system
One example includes an OP-AMP circuit system. The system includes a signal amplification path comprising a signal amplification path comprising a signal...
Schottky diodes for replacement metal gate integrated circuits
An integrated circuit and method with a metal gate transistor and with a Schottky diode where the metal used to form the Schottky diode is the metal used to...
Semiconductor devices having metal bumps with flange
A semiconductor device having a terminal site (100) including a flat pad (110) of a first metal covered by a layer (130) of dielectric material, the layer over...
Flex over suspension fault detection under a write gate for magnetic disk
A system and method for Flex Over or On Suspension (FOS) fault detection under a write gate for magnetic disk drives may employ a flex over suspension fault...
Programmable level shifter for LCD systems
A programmable level shifter for providing upshifted control signals to an active matrix display based on logic-level control signals received from a timing...
Maintaining coherent synchronization between data streams on detection of
Trace data streams are generated for tracing target processor activity. Various trace data streams are synchronized using markers called sync points. The sync...
Integrated circuit wafer having plural dies with each die including test
circuit receiving expected data and...
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
Intra/inter mode decision for predictive frame encoding
This invention predicts that intra mode prediction is more effective for the macro blocks where motion estimation in inter mode prediction fails. This failure...
Pairwise temporal key creation for secure networks
A system and method for establishing a pairwise temporal key (PTK) between two devices based on a shared master key and using a single message authentication...
Multiple CQI feedback for cellular networks
Single user and multiuser MIMO transmission in a cellular network may be performed by a base station (eNB) transmitting either one or two transmission layers. A...
Amplifier with reduced idle power loss using single-ended loops
A method of audio signal processing includes receiving a first audio input signal (first input signal) at an input of a first integrating amplifier of a first...
Method of forming a semiconductor device having a GaNFET, an overvoltage
clamping component, and a voltage...
A method of forming a semiconductor device includes a GaN FET with an overvoltage clamping component electrically coupled to a drain node of the GaN FET and...
Scan testable through silicon VIAs
The disclosure describes a novel method and apparatus for testing different types of TSVs in a single die or different types of TSV connections in a stack of...
Feedback validation of arbitrary non-volatile memory data
An integrated circuit and method of performing a reliability screen of an electrically programmable non-volatile memory array in the integrated circuit. At a...
Processor micro-architecture for compute, save or restore multiple
registers, devices, systems, methods and...
An electronic circuit (4000) includes a bias value generator circuit (3900) operable to supply a varying bias value in a programmable range, and an instruction...
Protection of memories, datapath and pipeline registers, and other storage
elements by distributed delayed...
This invention is data processing apparatus and method. Data is protecting from corruption using an error correction code by generating an error correction code...
Detecting power supply sag in an integrated circuit
An integrated circuit is provided with a voltage sag detector (VSD) within the integrated circuit package. The VSD is coupled to a voltage reference and to the...
Navigation assistance based on visual codes
Visual codes are scanned to assist navigation. The visual code may be a Quick Response (QR) code that contains information useful to calibrating a variety of...
LED drive apparatus, systems and methods
Light flux levels sensed from a color LED array control both current availability to the array and disable/re-enable a current bypass switch to shunt...
Shared-path illumination and excitation optics apparatus and systems
A Gaussian-distributed excitation light beam of an excitation spectrum emitted from an excitation light source enters a light pipe and is there converted to a...
Wide dynamic range depth imaging
Wide dynamic range depth imaging in a structured light device is provided that improves depth maps for scenes with a wide range of albedo values under varying...
Enabling proximity operations with long-range wireless communication
Systems and methods for enabling proximity operations with long-range wireless communication interfaces are described. In an illustrative, non-limiting...
III-nitride device and method having a gate isolating structure
A semiconductor device containing a GaN FET has an isolating gate structure outside the channel area which is operable to block current in the two-dimensional...
Integrated circuit ("IC") assembly includes an IC die with a top
metallization layer and a conductive epoxy...
An integrated circuit ("IC") assembly includes an IC die with a metallization layer on a top surface thereof. A plurality of lead wires are bonded at first end...
Deep trench isolation with tank contact grounding
An integrated circuit is formed on a substrate containing a semiconductor material having a first conductivity type. A deep well having a second, opposite,...
Screening for later life stuck bits in ferroelectric memories
A reliability screen of integrated circuits including ferroelectric random access memory (FRAM) arrays for stuck bits. The FRAM devices are subjected to a high...
Pre-discharge circuit for multiplexed LED display
A system includes an output driver circuit configured to operate a light emitting diode (LED) display having a plurality of columns of LED devices. The output...
Integrated circuit with control node circuitry and processing circuitry
Traditionally, providing parallel processing within a multi-core system has been very difficult. Here, however, a system is provided where serial source code is...
Double data rate addressable tap interface with shadow protocol circuitry
A process and apparatus provide a JTAG TAP controller (302) to access a JTAG TAP domain (106) of a device using a reduced pin count, high speed DDR interface...
Multi-phased MEMS plate lowering and lifting system and method
A MEMS device includes a bottom plate structure supporting a conductive electrode. A flexible conductive top plate movably supported by a flexure is affixed to...
Parallel motion estimation in video coding
Methods for improved parallel motion estimation are provided that decouple the merging candidate list derivation and motion estimation for merge mode and skip...
Power supply architectures for powered devices
The single removable cable is capable of transporting both the power and the data between a powering device and one or more powered devices. At least one signal...
Closed loop multiple transmit, multiple receive antenna wireless
A wireless receiver (74) for receiving signals from a transmitter (72). The transmitter comprises a plurality of transmit antennas (TAT.sub.1', TAT.sub.2') for...
Calibration technique for current steering DAC
The disclosure provides a current steering digital to analog converter (DAC) that includes a plurality of DAC elements. At least one DAC element of the...
Angle/frequency selector in an electric motor controller architecture
A motor controller architecture and method of operating the same. The motor controller includes a function for estimating the low speed operation of the motor,...
DC-DC converter with temperature, process and voltage compensated dead
Temperature, process and supply compensated delay circuits, DC to DC converters and integrated circuits are presented in which switch driver dead time delays...
Pre-bias startup of a converter
A method includes comparing, by a voltage-second (VS) controller, a first duty cycle used to control a first switch at a primary side of a power transformer of...
Advanced control circuit for switched-mode DC-DC converter
A circuit for controlling a switched-mode DC-DC converter. An inductor is connected between a switching node and an output node, and an output capacitor is...
Switched reference MOSFET drive assist circuit
A power converter includes at least a first phase including a high-side MOSFET transistor (HSA) and a low-side (LS) MOSFET transistor (LSA) driving a first...