Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-8,977,915 pBIST engine with reduced SRAM testing bus width
A programmable Built In Self Test (pBIST) system used to test embedded memories where the memories under test are incorporated in a plurality of sub chips not...
US-8,977,884 Shared-PLL audio clock recovery in multimedia interfaces
A bit stream includes playback data having an associated clock rate and a variable reference clock that is synchronized to the bit stream. A playback clock...
US-8,977,878 Reducing current leakage in L1 program memory
An embodiment of the invention provides a method for decreasing power in an L1 program memory of a multi-level memory system. The power is decreased by enabling...
US-8,977,821 Parallel processing of multiple block coherence operations
A method to eliminate the delay of multiple overlapping block invalidate operations in a multi CPU environment by overlapping the block invalidate operation...
US-8,977,819 Prefetch stream filter with FIFO allocation and stream direction prediction
A prefetch filter receives a memory read request having an associated address for accessing data that is stored in a line of memory. An address window is...
US-8,976,980 Modulation of audio signals in a parametric speaker
Methods and systems for amplitude modulation in a parametric speaker system are provided that perform truncated double sideband (TDSB) frequency modulation of...
US-8,976,914 Multi-tap IQ imbalance estimation and correction circuit and method
A system for correcting gain imbalance and phase imbalance between first (I.sub.OUT) and second (Q.sub.OUT) signals which are 90.degree. out of phase, including...
US-8,976,860 Method and apparatus for determination of motion estimation search window area utilizing adaptive sliding...
A method and apparatus for motion estimation utilizing adaptive sliding window algorithm, the method includes estimating motion estimation search window size,...
US-8,976,292 Perceptual video quality improvement for videos containing black bars
A method of improving the perceptual video quality of video sequences containing black bars. Horizontal or vertical black bars caused by a missmatch between the...
US-8,976,273 Multiplexed read-out architecture for CMOS image sensors
This invention targets improvement in CMOS sensors using a multiplexed read-out architecture in which pixels are output at the pixel V.sub.N level instead of...
US-8,975,964 BEMF monitor gain calibration stage in hard disk drive servo integrated circuit
A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of...
US-8,975,963 Offset reduction for analog front-ends
A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based...
US-8,975,961 Power amplifier control circuits
Circuits for reducing power consumption in power amplifier circuits are disclosed. In certain embodiments, a circuit for power control in the transmitter...
US-8,975,948 Wide common mode range transmission gate
A transmission gate self-biases its transistors to provide a constant gate biasing that provides a consistent path for an input signal to be cleanly passed to...
US-8,975,886 Charging and distribution control
A system configured for charging and distribution control is provided. The system includes a switching regulator, a control circuit and a first converter. The...
US-8,975,722 MEMS device and method of manufacture
A MEMS logic device comprising agate which pivots on a torsion hinge, two conductive channels on the gate, one on each side of the torsion hinge, source and...
US-8,975,135 Analog floating-gate capacitor with improved data retention in a silicided integrated circuit
An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The...
US-8,972,821 Encode and multiplex, register, and decode and error correction circuitry
An electronic circuit includes a microcontroller processor (410), a peripheral (420) coupled with the processor, an endian circuit (470) coupled with the...
US-8,972,810 I/O circuitry free of test clock coupled with destination/source circuitry
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication...
US-8,972,809 Test messaging and control circuitry coupled to power pad
The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device....
US-8,972,807 Integrated circuits capable of generating test mode control signals for scan tests
Various embodiments of methods and integrated circuits capable of generating a test mode control signal for a scan test through a scan chain (such as in an...
US-8,971,634 Approximate pyramidal search for fast displacement matching
A method for approximate pyramidal search for displacement matching is provided that includes performing a complete window-based search at a coarsest resolution...
US-8,971,464 Crest factor reduction for signals with dynamic power and frequency distribution
A method to form a CFR cancellation filter for signals with dynamic power and frequency distribution by estimating the filter at the rate required by the input...
US-8,971,455 Near-integer channel spur mitigation in a phase-locked loop
A method includes relocating, to a frequency outside a cut-off frequency of a phase-locked loop, a spur frequency component at an input of the phase-locked loop...
US-8,971,448 Layer mapping for up link single user multiple input multiple output wireless telephony
This invention is a method and an apparatus to up link transmission of data from a user equipment to a base station for single user multiple input, multiple...
US-8,971,138 Method of screening static random access memory cells for positive bias temperature instability
A method of screening complementary metal-oxide-semiconductor CMOS integrated circuits, such as integrated circuits including CMOS static random access memory...
US-8,971,084 Context protection for a column interleaved memory
A semiconductor memory cell includes a set of circuit structures, each having column input/output circuits. The semiconductor memory cell further includes a set...
US-8,971,075 Method and apparatus for generating an adaptive switching frequency for operating power factor correction circuit
A method of operating a power factor correction (PFC) circuit and a corresponding power factor correction circuit include determining an adaptive switching...
US-8,970,459 System and method for timing color presentation of an image display system
In accordance with the teachings of the present disclosure, a method and system for the timing color of an image display are provided. In one embodiment, a...
US-8,970,411 Pipelined continuous-time sigma delta modulator
Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating...
US-8,970,300 Apparatus and method for transimpedance amplifiers with wide input current ranges
Improved preamplifier circuits for converting single-ended input current signals to differential output voltage signals, including first and second...
US-8,970,292 Universal filter implementing second-order transfer function
An apparatus includes a biquad filter having first and second lossy integrators and multiple input networks. Each lossy integrator includes an amplifier, and...
US-8,970,267 Asynchronous clock dividers to reduce on-chip variations of clock timing
This invention is a means to definitively establish the occurrence of various clock edges used in a design, balancing clock edges at various locations within an...
US-8,970,199 Electronic device and method for DC-DC conversion with variable bias current
The invention relates to an electronic device and a method for DC-DC conversion using a comparator for generating an output signal for driving a power switch of...
US-8,970,162 System and method for balancing electrical energy storage devices via differential power bus and capacitive...
System and method are provided for transferring electrical energy among multiple electrical energy storage devices via multiple differential power buses and...
US-8,970,151 Detection of back EMF in two terminal actuator
Back-emf for a motor is measured by measuring a voltage across the input terminals for a two terminal input actuator or motor when a high frequency driver...
US-8,966,647 Comparing central time stamp bits from bus and client circuitry
This invention is time stamping subsystem of an electronic apparatus. A time stamp generator generates a multibit time stamp value including a predetermined...
US-8,966,346 Apparatus and method for processing a physical layer convergence protocol header
Apparatus and method for processing a physical layer protocol convergence (PLCP) header. In one embodiment, a wireless device includes a PLCP header processor....
US-8,966,337 Powerline communication frames having CRC within header
A method of powerline communications including a first node and at least a second node on a powerline communications (PLC) channel in a PLC network. The first...
US-8,966,265 Pairwise temporal key creation for secure networks
A system and method for establishing a pairwise temporal key (PTK) between two devices based on a shared master key and using a single message authentication...
US-8,966,226 State machine for monitoring a trace port and verifying proper execution of a secure mode entry sequence...
A method and system of verifying proper execution of a secure mode entry sequence. At least some of the exemplary embodiments may be a method comprising...
US-8,965,010 Multi-stage amplifiers to reduce pop noise
An amplifier (50) for voice or audio signals, and particularly for headset applications, uses a low g.sub.m amplifier (54) for initially charging an output node...
US-8,964,918 IC first, second communication circuits each with three communication states
Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and...
US-8,964,916 Signal-to-noise ratio (SNR) dependent channel tracking for smart utility networks (SUN) orthogonal frequency...
An orthogonal frequency-division multiplexed (OFDM)-based receiver for channel tracking with signal-to-noise ratio dependent parameters that includes a memory;...
US-8,964,880 Reduction in power supply induced jitter on a SerDes transmitter
In an embodiment of the invention, a frequency divider in a phase-locked loop (PLL) circuit is provided power from the power supply that provides power to a...
US-8,964,877 Changing power to first transmission signals upon detecting ISM band
A method includes transmitting a first set of transmission signals over an operating frequency band. The method includes detecting if a second set of...
US-8,964,786 Communications in beacon-enabled networks
Systems and methods for designing, using, and/or implementing communications in beacon-enabled networks are described. In various implementations, these systems...
US-8,964,724 Clock synchronization and distributed guard time provisioning
Embodiments provide a method to accommodate clock drift and guard time in a distributed fashion. A first device is adapted to communicate with a second device....
US-8,964,586 Enhanced QOS support using Bluetooth low energy
Embodiments support stringent Quality of Service (QoS) requirements using adaptations to the existing Bluetooth Low Energy (BLE) protocols. In systems using an...
US-8,964,445 Ferroelectric random access memory with isolated power supply during write and write-back cycles
In an embodiment of the invention, a method is provided for isolating a ferroelectric memory from a power supply during a write-back cycle or a write cycle of...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.