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Patent # Description
US-8,941,181 Compensated well ESD diodes with reduced capacitance
An integrated circuit with a shallow trench isolated, low capacitance, ESD protection diode. An integrated circuit with a gate space isolated, low capacitance,...
US-8,941,109 Test output buffer functional output input, test output, enable input
Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding...
US-8,940,612 Poly resistor for metal gate integrated circuits
An integrated circuit containing a metal gate transistor and a thin polysilicon resistor may be formed by forming a first layer of polysilicon and removed it in...
US-8,940,598 Low temperature coefficient resistor in CMOS flow
A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of...
US-8,940,593 Enhancement-mode GaN MOSFET with low leakage current and improved reliability
An enhancement-mode GaN MOSFET with a low leakage current and an improved reliability is formed by utilizing a SiO.sub.2/Si.sub.3N.sub.4 gate insulation layer...
US-8,940,093 Method of controlling an epitaxial growth process in an epitaxial reactor
A method of controlling an epitaxial growth process in an epitaxial reactor. The method includes optimizing the thermocouple offset parameter for a second run...
US-8,938,739 Resource sharing aware task partitioning for multiprocessors
A multi processor task allocation method is described that considers task dependencies while performing task allocation in order to avoid blocking of a task's...
US-8,938,652 Addressable tap domain selection circuit with AUXI/O, TDI/TDO, TMS/TRCK leads
This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial...
US-8,938,651 Blocking the effects of scan chain testing upon a change in scan chain topology
A system comprises a plurality of components, scan chain selection logic coupled to the components, and override selection logic coupled to the scan chain...
US-8,938,649 Debug trace stream timestamping using upstream correlation
A method of correlating the timing of multiple interleaved trace data streams. A Time Stamp Trace stream logic monitors the event trace stream for a...
US-8,935,597 Receivers, circuits, and methods to improve GNSS time-to-fix and other performances
An electronic circuit (2250) for a satellite receiver (100, 2200). The electronic circuit (2250) includes a correlator circuit (2310) operable to supply a data...
US-8,935,585 Tap controller having TMS, TCK, enable inputs and control outputs
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these...
US-8,934,890 Transmission of data bursts on a constant data rate channel
A system and method for transmitting data bursts over a constant data rate link that transmits a continuous stream of data is disclosed. A transmitter node...
US-8,934,729 Method and apparatus for frame coding in vertical raster scan order for HEVC
A method and apparatus for frame coding in adaptive raster scan order. The method includes encoding at least one of image or video utilizing input frames and at...
US-8,934,522 Circuits, devices, and processes for improved positioning satellite reception and other spread spectrum reception
An integrated circuit for facilitating spread spectrum reception of data having a data bit period includes an hypothesis search circuit (120, 210, 220) operable...
US-8,933,657 Closed loop startup control for a sensorless, brushless DC motor
A method for driving a brushless direct current (DC) motor is provided. The brushless DC motor has a first phase that is coupled between a first terminal and a...
US-8,933,510 DEMOS formed with a through gate implant
An integrated circuit containing a MOS transistor and a DEMOS transistor of a same polarity may be formed by implanting dopants of a same conductivity type as...
US-8,933,461 III-nitride enhancement mode transistors with tunable and high gate-source voltage rating
A semiconductor device includes an enhancement mode GaN FET with a depletion mode GaN FET electrically coupled in series between a gate node of the enhancement...
US-8,932,942 Method of forming an electrical contact between a support wafer and the surface of a top silicon layer of a...
Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises...
US-8,930,783 pBIST read only memory image compression
A programmable Built In Self Test (pBIST) system used to test embedded memories where a plurality of memories requiring different testing conditions are...
US-8,930,136 Static heading detection in personal navigation device
A personal navigation device configured to determine heading readings continuously using data from a sensor in the personal navigation device. Heading readings...
US-8,929,500 Clock data recovery with out-of-lock detection
The disclosed clock-data recovery architecture includes out-of-lock (including false lock) detection. Out-of-lock detection is accomplished by sampling...
US-8,929,398 Data frame for PLC having destination address in the PHY header
A method of powerline communications including a first node and at least a second node on a PLC channel in a PLC network. The first node sends a physical layer...
US-8,929,121 Reference and read OTP sensors
The present disclosure provides a reference one time programmable (OTP) cell, wherein the reference OTP cell can generate a reference bias current in at least a...
US-8,928,406 Low-power inverter-based differential amplifier
A new inverter-based fully-differential amplifier is provided including one or more common-mode feedback transistors coupled to each inverter, which transistors...
US-8,928,398 Differential analog signal processing stage with reduced even order harmonic distortion
The even order harmonic distortion in a differential circuit is reduced or eliminated by treating the amplitude and phase mismatch sources that cause the...
US-8,928,299 Low power switching DC-DC converter and method of the same
A low power DC-DC converter includes a converter stage coupled to an input node, and having a low side switch and a rectifier switch. A peak current detector...
US-8,928,265 Sensorless field-oriented control (FOC) without current sampling for motors
An apparatus includes a sensorless field-oriented control (FOC) motor controller. The motor controller includes a pulse width modulation (PWM) controller...
US-8,928,243 Light driving system and method
A light driving system is provided that includes a light dimmer that receives an AC input signal and provides a dimmer output signal that includes a fast rising...
US-8,928,075 Power integrated circuit including series-connected source substrate and drain substrate power MOSFETs
A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the...
US-8,928,047 MOSFET with source side only stress
An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement...
US-8,927,385 ZTCR poly resistor in replacement gate flow
An integrated circuit having a replacement gate MOS transistor and a polysilicon resistor may be formed by removing a portion at the top surface of the...
US-8,926,514 Iterative time delay values for ultrasound beamforming
An iterative method of computing time delay values for ultrasound receive beamforming. Sensing signals are generated by transducer elements in a transducer...
US-8,926,136 Wavelength conversion apparatus
A wavelength conversion device comprising a plurality of regions. Each region for absorbing radiant energy and emitting light having a characteristic dependent...
US-8,924,831 Systems and methods for network coding using convolutional codes
A network coding method includes receiving a plurality of message packets each having a packet length. Encoding the plurality of message packets by applying a...
US-8,924,826 Forward error correction encoder
A method for encoding data words into a frame is provided. Input data words are received on a first bus having a first width. The input data words are buffered...
US-8,924,804 Synchronizer and buffers delaying strobe to individual parallel scan paths
Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these...
US-8,924,802 IC TAP with dual port router and additional capture input
This disclosure describes a test architecture that supports a common approach to testing individual die and dies in a 3D stack arrangement. The test...
US-8,924,767 Minimizing the use of chip routing resources when using timestamped instrumentation data by transmitting the...
A timestamp generator generates a timestamp value having a predetermined number of most significant bits and a predetermined number of least significant bits....
US-8,924,207 Method and apparatus for transcoding audio data
A method and apparatus for transcoding audio data. The method includes determining if AAC joint stereo exists, running a reference AC-3 rematrixing when the AAC...
US-8,924,155 System and method for access point based positioning
Apparatus and methods for scanning for access points (APs) for wireless local area network (WLAN) positioning. In one embodiment a wireless device includes a...
US-8,923,791 RFID transponder and method for operating the same
An RFID transponder having an analog front end receiver having an attenuator coupled to receive an RF-signal from an antenna and to attenuate the RF-signal, an...
US-8,923,416 Symbol-level repetition coding in power line communications
Systems and methods for implementing symbol-level repetition coding in power line communications (PLC) are described. In some embodiments, these systems and...
US-8,923,407 Sample adaptive offset (SAO) parameter signaling
A method for sample adaptive offset (SAO) filtering and SAO parameter signaling in a video encoder is provided that includes determining SAO parameters for...
US-8,923,388 Early stage slice cap decision in video coding
A method for making a slice cap decision during encoding of a video sequence in a video encoding pipe is provided that includes determining a prediction mode...
US-8,923,362 Wireless communications system with secondary synchronization code based on values in primary synchronization code
A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting...
US-8,923,017 Power converter implementing frequency smearing
The present invention relates to a power converter (90) and a method of operating same. There are numerous advantages to operating power converters using a...
US-8,922,267 Electronic device and method for kickback noise reduction of switched capacitive loads and method of operating...
An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge...
US-8,922,255 PWM controller with drive signal on current sensing pin
A PWM modulator as might be used in a power converter, a drive signal will be generated on an output pin of an integrated circuit PWM controller device which is...
US-8,922,189 Controlled on-time buck PFC
An apparatus for generating an output voltage from an input voltage is provided. The apparatus comprises a switch that receives the input voltage, an inductor...
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