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Patent # Description
US-8,903,706 System for embedded microcontroller and method
The invention is system for emulating a target application comprises a computer, and a capsular including a microcontroller, a programmable non-volatile memory,...
US-8,903,479 Real time QRS duration measurement in electrocardiogram
ECG data may be processed in a mobile device by receiving a stream of filtered ECG data samples comprising PQRST pattern cycles. An R point of a PQRST pattern...
US-8,903,196 Video presentation at fractional speed factor using time domain interpolation
This invention involves time domain interpolation of video signals. In order to adjust the presentation speed of a video data stream, a plurality of video...
US-8,903,119 Use of three-dimensional top-down views for business analytics
A method of analyzing a depth image in a digital system is provided that includes detecting a foreground object in a depth image, wherein the depth image is a...
US-8,902,930 Hybrid communication networks
Systems and methods for designing, using, and/or implementing hybrid communication networks are described. In various embodiments, these systems and methods may...
US-8,902,925 Forward error correction decoder
A method for determining an initial alignment for a frame of input data is provided. A frame for the input data is set, and the frame is synchronized....
US-8,902,922 Unified programmable interface for real-time Ethernet
This invention is a low level programmable logic that can communicate with Media Independent Interface (MII) (Ethernet) interface in a highly configurable...
US-8,901,995 Active low pass filter
Sallen-Key active low pass filters (LPFs) have been knows for many years; however, these LPFs generally include passive components (i.e., resistors and...
US-8,901,987 Unidirectional output stage with isolated feedback
A circuit includes an input stage configured to receive a regulated input signal and generate an input stage output signal in response to the regulated input...
US-8,901,974 Phase locked loop and method for operating the same
The invention generally relates to phase locked loops (PLL), and more specifically to ultra-low bandwidth phase locked loops. The invention may be for example...
US-8,901,968 Active pull-up/pull-down circuit
A circuit includes circuit portions operating from separate power supplies which are switched sequentially. An output of a first portion powered by a power...
US-8,899,828 Heat sensor correction
A heat sensor has the ability to correct for errors introduced during temperature changes of the hot junction of the thermopile for the heat sensor. For...
US-8,589,839 ESD protection validator, an ESD validation system and a method of validating ESD protection for an IC
Disclosed is an electrostatic discharge (ESD) protection validator, a method of validating ESD protection for an IC and an ESD validation system. In one...
US-8,589,748 Tap domain selection circuitry with multiplexer and control circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that...
US-8,589,747 Position independent testing of circuits
Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing...
US-8,589,746 Bidirectional clock, data, and control to functional and test circuitry
A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to...
US-8,589,744 State machine transitioning between idle, capture, shift-I, and shift-2 states
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to...
US-8,589,714 Falling clock edge JTAG bus routers
The disclosure describes a novel method and apparatus for allowing a controller to access a bus router using a communication occurring in response to one edge...
US-8,589,650 Dynamically configurable memory system
In a digital system with a processor coupled to a paged memory system, the memory system may be dynamically configured using a memory compaction manager in...
US-8,589,505 Method and apparatus for identifying and retrieving media content
The specification discloses a system and related method for retrieving encoded media content, such as retrieving audio tracks from a CD in MP3 format. The...
US-8,588,600 Stereoscopic auto-focus based on coordinated lens positions
Methods for automatic focus in a stereographic imaging device that includes two imaging sensor systems are provided. Focus searches are executed on both imaging...
US-8,588,536 Guaranteed-rate tiled image data compression
A method of compressing digital image data is provided that includes, for each image data block in a plurality of image data blocks in the digital image data,...
US-8,588,474 Motion detection in video with large areas of detail
A method for motion detection is provided that includes determining a first motion measure for a pixel based on differences between first neighboring pixels of...
US-8,588,353 Frequency selective IQ correction
In conventional radio frequency (RF) systems, transmitters will usually convert baseband signals to RF so as to be transmitted. As part of the conversion...
US-8,588,275 Electronic device and method for spread spectrum clock (SSC) modulation
The invention relates to an electronic device that includes a plurality of buffers and a phase locked loop. For each buffer a fractional divider is provided...
US-8,588,154 Mitigation of interference between wireless networks
A system and method for minimizing or preventing interference between wireless networks is disclosed. A network hub broadcasts a beacon signal within repeating...
US-8,588,080 System and method for use of reserved medium in coexisting wireless networks
A system and method for using reserved resources in coexisting wireless networks. In one embodiment, a wireless apparatus includes a receiver, a network...
US-8,587,967 System and method for indirect control of a converter output
One embodiment of the invention relates to a power apparatus. The power apparatus includes a power converter configured to convert an input voltage to an output...
US-8,587,349 Clock divider with multiple count signals
A clock divider circuit. The clock divider receives m input clock signals each of the same frequency. Each input clock signal after the first has a phase offset...
US-8,587,122 Semiconductor flip-chip system having three-dimensional solder joints
A solder joint between a trace (401) and an object (501). The trace having a solderable surface (503), a height (504), and a width (404), the trace including a...
US-8,587,099 Leadframe having selective planishing
A metal leadframe strip (500) for semiconductor devices is described. The leadframe strip has a plurality of sites (510) for assembling semiconductor chips. The...
US-8,586,395 Method and apparatus for reducing thermopile variations
Here, an apparatus is provided. The apparatus generally comprises a substrate and a thermopile. The thermopile includes a cavity that is etched into the...
US-8,586,130 Increasing exposure tool alignment signal strength for a ferroelectric capacitor layer
An improved alignment structure for photolithographic pattern alignment is disclosed. A topographical alignment mark in an IC under a low reflectivity layer may...
US-8,583,360 Usage mode determination of navigation system
A navigation system determines its usage mode. In some embodiments, a method comprises determining a usage mode of a navigation system based on at least one of...
US-8,582,908 Quantization method and apparatus
Quantization for oversampled signals with an error minimization searches based upon clusters of possible sampling vectors where the clusters have minimal...
US-8,582,699 Maintaining ADC input magnitude from digital par and peak value
Automatic gain control in a receiver. A method for controlling operating range of an analog-to-digital converter (ADC) by an automatic gain control circuit...
US-8,582,645 Reducing flicker in the display of video streams
Image frames of a video stream are encoded with the aim of reducing flicker in the video stream when displayed. In one embodiment, the quantization parameter...
US-8,582,550 Bounded power-save-polling (BPS)
In accordance with at least some embodiments, a system comprises an access point and a station in communication with the access point. The station has at least...
US-8,582,384 Process variability tolerant programmable memory controller for a pipelined memory system
In an embodiment of the invention, an integrated circuit includes a pipelined memory array and a memory control circuit. The pipelined memory array contains a...
US-8,582,032 Motion detection for interlaced video
Motion detection in interlaced video fields, as useful in de-interlacing, includes spatial-temporal maximum filtering, temporal IIR filtering dependent upon...
US-8,581,780 Concatenating free sections in memory that store satellite search signals
Enhancing search capacity of Global Navigation Satellite System (GNSS) receivers. A method for searching satellite signals in a receiver includes performing a...
US-8,581,770 Zero-power sampling SAR ADC circuit and method
A switched-capacitor circuit (10, 32 or 32A) samples a first signal (V.sub.IN.sup.+) onto a first capacitor (C1 or C.sub.IN1) by switching a top plate thereof...
US-8,581,660 Power transistor partial current sensing for high precision applications
A power transistor module including a power transistor with a first common power node, and a split control node. A first clip is connected to a portion of a...
US-8,581,640 Clock divider with a zero-count counter
A clock divider circuit. The clock divider receives m input clock signals each of the same frequency. Each input clock signal after the first has a phase offset...
US-8,581,634 Source follower input buffer
Traditionally, input source follower buffers for analog-to-digital converters (ADCs) lacked sufficiently high linearity. This was due in part to source follower...
US-8,581,629 Synchronous state machine with an aperiodic clock
An apparatus is provided. The apparatus includes an analog timing controller and a digital state machine. An input circuit in the digital state machine is...
US-8,581,324 Area-efficient electrically erasable programmable memory cell
Electrically erasable programmable "read-only" memory (EEPROM) cells in an integrated circuit, and formed by a single polysilicon level. The EEPROM cell...
US-8,581,317 SOI MuGFETs having single gate electrode level
A silicon on insulator (SOI) multi-gate field effect transistor electrically Programmable Read-Only Memory (MuFET EPROM) includes a substrate having a...
US-8,581,233 Variable capacitor single-electron transistor including a P-N junction gate electrode
The present invention provides a single-electron transistor device 100. The device comprises a source 105 and drain 110 located over a substrate 115 and a...
US-8,580,685 Integrated circuit having interleaved gridded features, mask set, and method for printing
A method for fabricating an integrated circuit includes the steps of: providing a substrate having a semiconductor surface; providing a hardmask material on the...
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