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Patent # Description
US-8,922,147 Quiet motor control system
A quiet motor control system is described. This system digitally determines modulated voltages applied to motor phases in a manner that compensates for winding...
US-8,920,326 Cancellation of products generated by harmonics of a square wave used in square-wave mixing
A mixer circuit includes three square wave mixers and a combiner. A first square wave mixer in the circuit multiplies an input signal with a first square wave....
US-8,918,688 Gating WSP capture and TAP ShiftDR with TAP IR enable
In a first embodiment a TAP 318 of IEEE standard 1149.1 is allowed to commandeer control from a WSP 202 of IEEE standard P1500 such that the P1500 architecture,...
US-8,918,687 IC clock doubler output gated to multiplexer and output buffer
The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform...
US-8,918,549 Robust cable-type detection for USB power delivery
A system and method for detecting a USB cable-type. A USB PD device configured at a near end of a USB cable is configured to (i) receive and process a signal...
US-8,918,445 Circuit which performs split precision, signed/unsigned, fixed and floating point, real and complex multiplication
An integrated multiplier circuit that operates on a variety of data formats including integer fixed point, signed or unsigned, real or complex, 8 bit, 16 bit or...
US-8,917,899 Methods and systems for watermarking digital media
A system is provided that includes a processor and a network interface coupled to the processor. The system also includes a system memory coupled to the...
US-8,917,756 Wireless communications system with secondary synchronization code based on values in primary synchronization code
A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting...
US-8,916,934 Bi-directional electrostatic discharge (ESD) protection circuit
A structure is designed with an external terminal (100) and a reference terminal (102). A first transistor (106) is formed on a substrate. The first transistor...
US-8,916,427 FET dielectric reliability enhancement
A semiconductor device may be formed by forming a silicon-containing gate dielectric layer over a semiconductor layer. A gate metal layer is formed over the...
US-8,916,408 Leadframe-based premolded package having air channel for microelectromechanical system (MEMS) device
A low-cost microelectromechanical system (MEMS) device has a mass-produced carrier fabricated as a pre-molded leadframe so that the space of the leadframe...
US-8,915,148 Motion conversion system
A motion conversion system is described. The motion conversion system comprises a first torsional member operative for rotating in a first direction. A second...
US-RE45,299 Receiving a pilot design and channel estimation
A receiver in an OFDM based communication system is adapted to perform channel estimation using a received reference signal transmitted from at least one...
US-8,914,234 Calibrating a tightly-coupled GNSS/MU integration filter
Embodiments of the invention provide methods of calibrating a blending filter based on extended Kalman filter (EKF), which optimally integrates the IMU...
US-8,913,748 Methods to improve bluetooth low energy performance
An expanded sequence number is added to PDUs in a Bluetooth.RTM. low energy system. The expanded sequence number provides more accurate identification of the...
US-8,913,495 Flow control for powerline communications
A method of powerline communications in a powerline communications (PLC) network including a first node and at least a second node. The first node transmits a...
US-8,912,810 Contactor with multi-pin device contacts
A contactor assembly for automated testing a device under test (DUT) that includes a plurality of separate electrodes including a first electrode includes a...
US-8,912,637 Self-adhesive die
A method and apparatus for enhancing the thermal performance of semiconductor packages effectively. The concept of this invention is to provide silicon...
US-8,912,076 Crack deflector structure for improving semiconductor device robustness against saw-induced damage
An integrated circuit containing a crack deflecting scribe seal which separates an interior region of the integrated circuit from a scribeline immediately...
US-8,910,369 Fabricating a power supply converter with load inductor structured as heat sink
A method for fabricating a power supply converter comprises a load inductor wrapped by a metal sleeve structured to transform the inductor into a heat sink...
US-8,910,003 Controller circuitry with state machines, address store/compare, and shift register
An address and command port interface selectively enables JTAG TAP domain operations and Trace domain operations within an IC. The port carries TMS and TDI...
US-8,908,412 Array architecture for reduced voltage, low power, single poly EEPROM
An Electrically Erasable Programmable Read Only Memory (EEPROM) memory array (FIG. 7) is disclosed. The memory array includes a plurality of memory cells...
US-8,908,063 Method and apparatus for a time-of-flight sensor with charge storage
A time-of-flight sensor device includes analog memory to store one or more sets of charges associated with a time-of-flight image frame captured by a...
US-8,907,965 Clipping a known range of integer values using desired ceiling and floor values
An aspect of the present invention clips a sequence of data values within a known range (defined by a set of integer values) by a ceiling value and a floor...
US-8,907,794 Cryptographic lock, method of operation thereof and secure container employing the same
Various cryptographic locks for securing assets, secure containers and methods of operating a cryptographic lock. One embodiment of a cryptographic lock...
US-8,907,611 Method and apparatus for space vector pulse width modulation of a three-phase current construction with single...
A method for driving a motor having a plurality of phases is provided. Initially, first, second, and third intervals for a pulse width modulation (PWM) period...
US-8,907,446 Integrated circuit structure with capacitor and resistor and method for forming
An integrated circuit structure with a metal-to-metal capacitor and a metallic device such as a resistor, effuse, or local interconnect where the bottom plate...
US-8,906,770 Semiconductor structure that reduces the effects of gate cross diffusion and method of forming the structure
Gate cross diffusion in a semiconductor structure is substantially reduced or eliminated by forming multiple n-type gate regions with different dopant...
US-8,904,260 Robust hamming code implementation for soft error detection, correction, and reporting in a multi-level cache...
The invention is a memory system having two memory banks which can store and recall with memory error detection and correction on data of two different sizes....
US-8,904,249 At speed testing of high performance memories with a multi-port BIS engine
A programmable Built In Self Test (BIST) system used to test embedded memories where the memories may be operating at a clock frequency higher than the...
US-8,904,115 Cache with multiple access pipelines
Parallel pipelines are used to access a shared memory. The shared memory is accessed via a first pipeline by a processor to access cached data from the shared...
US-8,904,110 Distributed user controlled multilevel block and global cache coherence with accurate completion status
This invention permits user controlled cache coherence operations with the flexibility to do these operations on all levels of cache together or each level...
US-8,903,706 System for embedded microcontroller and method
The invention is system for emulating a target application comprises a computer, and a capsular including a microcontroller, a programmable non-volatile memory,...
US-8,903,479 Real time QRS duration measurement in electrocardiogram
ECG data may be processed in a mobile device by receiving a stream of filtered ECG data samples comprising PQRST pattern cycles. An R point of a PQRST pattern...
US-8,903,196 Video presentation at fractional speed factor using time domain interpolation
This invention involves time domain interpolation of video signals. In order to adjust the presentation speed of a video data stream, a plurality of video...
US-8,903,119 Use of three-dimensional top-down views for business analytics
A method of analyzing a depth image in a digital system is provided that includes detecting a foreground object in a depth image, wherein the depth image is a...
US-8,902,930 Hybrid communication networks
Systems and methods for designing, using, and/or implementing hybrid communication networks are described. In various embodiments, these systems and methods may...
US-8,902,925 Forward error correction decoder
A method for determining an initial alignment for a frame of input data is provided. A frame for the input data is set, and the frame is synchronized....
US-8,902,922 Unified programmable interface for real-time Ethernet
This invention is a low level programmable logic that can communicate with Media Independent Interface (MII) (Ethernet) interface in a highly configurable...
US-8,901,995 Active low pass filter
Sallen-Key active low pass filters (LPFs) have been knows for many years; however, these LPFs generally include passive components (i.e., resistors and...
US-8,901,987 Unidirectional output stage with isolated feedback
A circuit includes an input stage configured to receive a regulated input signal and generate an input stage output signal in response to the regulated input...
US-8,901,974 Phase locked loop and method for operating the same
The invention generally relates to phase locked loops (PLL), and more specifically to ultra-low bandwidth phase locked loops. The invention may be for example...
US-8,901,968 Active pull-up/pull-down circuit
A circuit includes circuit portions operating from separate power supplies which are switched sequentially. An output of a first portion powered by a power...
US-8,899,828 Heat sensor correction
A heat sensor has the ability to correct for errors introduced during temperature changes of the hot junction of the thermopile for the heat sensor. For...
US-8,589,839 ESD protection validator, an ESD validation system and a method of validating ESD protection for an IC
Disclosed is an electrostatic discharge (ESD) protection validator, a method of validating ESD protection for an IC and an ESD validation system. In one...
US-8,589,748 Tap domain selection circuitry with multiplexer and control circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that...
US-8,589,747 Position independent testing of circuits
Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing...
US-8,589,746 Bidirectional clock, data, and control to functional and test circuitry
A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to...
US-8,589,744 State machine transitioning between idle, capture, shift-I, and shift-2 states
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to...
US-8,589,714 Falling clock edge JTAG bus routers
The disclosure describes a novel method and apparatus for allowing a controller to access a bus router using a communication occurring in response to one edge...
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